Power path management circuit and electronic equipment

Abstract

The utility model provides a power path management circuit and an electronic device, and relates to the technical field of circuits, and the power path management circuit comprises a processing unit and a power path management unit. The power supply path management unit is connected with the external power supply and the power supply system through the first level signal output by the general input and output interface of the processing unit, the external power supply accessed through the external connector supplies power to the power supply system of the electronic equipment and charges the battery at the same time, and when the external connector of the electronic equipment is connected with the external power supply, the battery can be charged. The effects of simultaneously using the electronic equipment and charging the battery are achieved, and the use experience of a user can be improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to circuit technical field especially relates to a power path management circuit and electronic equipment. BACKGROUND

[0002] The power supply source of electronic equipment when working usually has two kinds, one is through the battery of electronic equipment self -supporting power supply, another is through external power supply. The mode that electronic equipment connects external power supply mainly includes wired and wireless. Among them, electronic equipment can be configured with universal serial bus (Universal Serial Bus, USB) interface, DC JACK interface and other wired interfaces to be connected with external power supply through data line.

[0003] As Figure 1 The prior art, electronic equipment is configured with external connector, external connector is used for connecting with external power supply, and is connected with battery through battery charge and discharge management unit, and the battery is connected with the power system of electronic equipment.

[0004] However, when the external connector of electronic equipment is connected with external power supply, the electronic equipment cannot be used simultaneously and the battery is charged, and only two choices between charging the battery and using the electronic equipment, which is relatively inconvenient and affects the user experience. UTILITY MODEL CONTENT

[0005] The utility model provides a power path management circuit and electronic equipment to solve the defects in the prior art.

[0006] The utility model provides a power path management circuit, which comprises a processing unit and a power path management unit.

[0007] The analog-to-digital conversion interface is connected with the external connector of electronic equipment, the external connector is used for connecting external power supply, and is connected with the battery of electronic equipment through the battery charge and discharge management unit, and the battery charge and discharge management unit is configured to charge and discharge the battery.

[0008] The processing unit is configured to determine that the input voltage of the analog-to-digital conversion interface is higher than or equal to the target voltage, and output a first level signal from the general input and output interface.

[0009] The power path management unit is connected with the battery, the external connector, the general input and output interface and the power system of electronic equipment respectively.

[0010] The power path management unit is configured to connect the external power supply and the power system when the general input and output interface outputs the first level signal.

[0011] According to the power path management circuit, the processing unit is further configured to determine that the input voltage of the analog-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal;

[0012] The power path management unit is further configured to determine that the general input-output interface outputs the second level signal, and connect the battery and the power system.

[0013] According to the power path management circuit, the external connector comprises a wireless connector and a wired connector, and the analog-digital conversion interface comprises a first analog-digital conversion interface and a second analog-digital conversion interface;

[0014] The first analog-digital conversion interface is connected with the wireless connector;

[0015] The second analog-digital conversion interface is connected with the wired connector.

[0016] According to the power path management circuit, the wired connector determines the output voltage based on a charging protocol.

[0017] According to the power path management circuit, the first voltage dividing circuit and the second voltage dividing circuit are further included;

[0018] The wireless connector is connected with the first analog-digital conversion interface through the first voltage dividing circuit;

[0019] The wired connector is connected with the second analog-digital conversion interface through the second voltage dividing circuit.

[0020] According to the power path management circuit, the first voltage dividing circuit comprises a first voltage dividing resistor and a second voltage dividing resistor;

[0021] The wireless connector is connected with the first analog-digital conversion interface through the first voltage dividing resistor;

[0022] The wireless connector is grounded through the first voltage dividing resistor and the second voltage dividing resistor.

[0023] According to the power path management circuit, the second voltage dividing circuit comprises a third voltage dividing resistor and a fourth voltage dividing resistor;

[0024] The wired connector is connected with the second analog-digital conversion interface through the third voltage dividing resistor;

[0025] The wired connector is grounded through the third voltage dividing resistor and the fourth voltage dividing resistor.

[0026] The battery charging and discharging management unit comprises a battery charging chip.

[0027] The utility model further provides an electronic equipment, include: power supply system, battery charging and discharging management unit, battery, external connector and the power supply path management circuit of recitation.

[0028] The power supply path management circuit and the electronic equipment provided by the utility model, the power supply path management circuit comprises a processing unit and a power supply path management unit. The first level signal output by the general input and output interface of the processing unit is used to connect the power supply path management unit with an external power supply and a power supply system, and the external power supply connected through the external connector is used to supply power to the power supply system of the electronic equipment and charge the battery. When the external power supply is connected to the external connector of the electronic equipment, the electronic equipment can be used and the battery can be charged at the same time, and the use experience of the user can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0029] In order to more clearly illustrate the technical scheme in the utility model or the related technical scheme, the following will briefly introduce the drawings needed to be used in the embodiment or the related technical description. Obviously, the drawings in the following description are some embodiments of the utility model, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0030] Figure 1 It is the structural diagram of the prior power supply path management circuit.

[0031] Figure 2 It is one of the connection structure schematic diagram of the power supply path management circuit in the electronic equipment provided by the utility model.

[0032] Figure 3 It is the second connection structure schematic diagram of the power supply path management circuit in the electronic equipment provided by the utility model.

[0033] Figure 4 It is the external connection relationship schematic diagram of wired connector J1 in the power supply path management circuit provided by the utility model.

[0034] Figure 5 It is the external connection relationship schematic diagram of wireless connector J2 in the power supply path management circuit provided by the utility model.

[0035] Figure 6 It is the external connection relationship schematic diagram of micro control unit in the power supply path management circuit provided by the utility model.

[0036] Figure 7 It is the external connection relationship schematic diagram of battery charging chip in the power supply path management circuit provided by the utility model.

[0037] Figure 8 This is a schematic diagram of the first voltage divider circuit in the power path management circuit provided by this utility model.

[0038] Figure 9 This is a schematic diagram of the second voltage divider circuit in the power path management circuit provided by this utility model.

[0039] Figure 10 This is one of the structural schematic diagrams of the first management unit in the power path management circuit provided by this utility model.

[0040] Figure 11 This is the second schematic diagram of the structure of the first management unit in the power path management circuit provided by this utility model.

[0041] Figure 12 This is one of the structural schematic diagrams of the second management unit in the power path management circuit provided by this utility model.

[0042] Figure 13 This is the second schematic diagram of the structure of the second management unit in the power path management circuit provided by this utility model. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0044] Figure 2 This is a schematic diagram of a power path management circuit provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the power path management circuit includes a processing unit 111 and a power path management unit 112. The processing unit 111 includes an analog-to-digital converter (ADC) interface and a general-purpose input / output (GPIO) interface.

[0045] The ADC interface of the processing unit 111 is connected to the external connector 113 of the electronic device; the external connector 113 is used to connect to an external power supply 114 and is connected to the battery 115 of the electronic device through the battery charge / discharge management unit 116. The battery charge / discharge management unit 116 is configured to charge and discharge the battery 115.

[0046] The processing unit 111 is configured to determine that the input voltage of the ADC interface is higher than or equal to the target voltage, and output a first level signal by the GPIO interface.

[0047] The power path management unit 112 is connected with the battery 115, the external connector 113, the GPIO interface and the power system 117 of the electronic device respectively.

[0048] The power path management unit 112 is configured to connect the external connector 113 and the power system 117 when the GPIO interface outputs the first level signal.

[0049] Specifically, the electronic device can include the external connector 113, the battery 115 and the power system 117, and the external connector 113 can access the external power supply 114 through a charging circuit board. The external connector 113 can include a wired connector and a wireless connector, and the wired connector can include at least one of a Type-C connector and a DC JACK connector.

[0050] The charging circuit board can include a wired charging circuit board and a wireless charging circuit board, and the wired charging circuit board can be provided with a first connector connected with the wired connector and a second connector accessing the external power supply 114, and the wireless charging circuit board can be provided with a third connector connected with the wireless connector and a fourth connector accessing the external power supply 114. Here, the wired connector and the wireless connector can be used to access the external power supply 114, and the fourth connector can be a wireless charging coil.

[0051] The wired connector and the wireless connector can be connected with the battery 115 to charge the battery 115 by the external power supply 114. The battery 115 can be a three-section lithium battery, and the battery signal VBAT of the battery 115 can be 12.6V after being fully charged by the external power supply 114.

[0052] The electronic device can further include a master control system, and the master control system and the power system are integrated on a mainboard of the electronic device. The power system 117 can include a direct current conversion circuit for converting the received voltage signal into a voltage signal required by the master control system of the electronic device.

[0053] In the power path management circuit provided in the embodiment of the utility model, the processing unit 111 includes an ADC interface and a GPIO interface, the ADC interface is connected with the external connector 113 of the electronic device, and the input voltage of the ADC interface can be the output voltage of the wired connector or the output voltage of the wireless connector.

[0054] The processing unit 111 can compare the input voltage of the ADC interface with the target voltage, and the output signal of the GPIO interface is the first level signal when the input voltage is higher than or equal to the target voltage. The first level signal can be a high level signal. The processing unit 111 can be built-in with a conventional comparison program to compare the input voltage of the ADC interface with the target voltage. The processing unit 111 can also be built-in with a comparator, the positive input end of which can receive the input voltage, and the negative input end of which can access the target voltage. The target voltage can be generated by a target power supply, which can be 9V or other values, which are not limited here. It can be understood that the output signal of the GPIO interface is the second level signal by default, that is, the low level signal.

[0055] The power path management unit 112 can be connected with the battery 115, the external connector 113, the GPIO interface and the power system 117 of the electronic device respectively.

[0056] When the external connector 113 of the electronic device is not connected to the external power supply 114, the input voltage of the ADC interface is empty, and at this time the battery 115 is connected to the power system 117, and the power system 117 is powered by the battery 115.

[0057] When the external connector 113 of the electronic device is connected to the external power supply 114, if the input voltage of the ADC interface is higher than or equal to the target voltage, the output signal of the GPIO interface is the first level signal, which can be used as the enable signal of the power path management unit 112, triggering the power path management unit 112 to switch the connection between the battery 115 and the power system 117 to the connection between the external connector 113 and the power system 117, and the power system 117 is powered by the external power supply 114 connected through the external connector 113. At the same time, the battery 115 can be charged by the external power supply 114.

[0058] It can be understood that the power path management unit 112 can include a switching switch, which can be triggered by the first level signal output by the GPIO interface to switch the connection relationship between the power system 117 and the external connector 113 and the battery 115.

[0059] The power path management circuit provided in the embodiment of the utility model, including processing unit and power path management unit. Through the first level signal output by the general input and output interface of the processing unit, the power path management unit connects the external power supply and the power system, and the external power supply connected through the external connector supplies power to the power system of the electronic device, and charges the battery at the same time. When the external connector of the electronic device is connected with the external power supply, the effect of using the electronic device and charging the battery at the same time can be achieved, and the user's use experience can be improved.

[0060] On the basis of the above-mentioned embodiments, the power path management unit 112 can include a first management unit 121 and a second management unit 122.

[0061] As shown in Figure 3 The ADC interface of the processing unit 111 is connected with an external connector 113 of the electronic device; the external connector 113 is used to access an external power supply 114 and is connected with a battery 115 of the electronic device;

[0062] The processing unit 111 is configured to determine that the input voltage of the ADC interface is higher than or equal to a target voltage, and output a first level signal by the GPIO interface.

[0063] The first management unit 121 is connected with the GPIO interface, the external connector 113 and a power supply system 117 of the electronic device respectively; the first management unit 121 is configured to establish a connection relationship between the external connector 113 and the power supply system 117 when the GPIO interface outputs the first level signal.

[0064] The second management unit 122 is connected with the GPIO interface, the battery 115 and the power supply system 117 of the electronic device respectively; the second management unit 122 is configured to disconnect the connection relationship between the battery 115 and the power supply system 117 when the GPIO interface outputs the first level signal.

[0065] Specifically, the first management unit 121 and the second management unit 122 can both be switching switches; the first management unit 121 is used to control the path connection between the external connector 113 and the power supply system 117, and the second management unit 122 is used to control the path connection between the battery 115 and the power supply system 117. When the output signal of the GPIO interface is the first level signal, the first management unit 121 is used to control the path connection between the external connector 113 and the power supply system 117 to be conducted, and the second management unit 122 is used to control the path connection between the battery 115 and the power supply system 117 to be disconnected.

[0066] The power path management circuit provided in the embodiment of the utility model, including processing unit and power path management unit. Through the first level signal output by the general purpose input output interface of the processing unit, the first management unit establishes the connection relationship between the external connector and the power supply system, the second management unit disconnects the connection relationship between the battery and the power supply system, the external power supply accessed through the external connector supplies power for the power supply system of the electronic device and charges the battery, when the external connector of the electronic device is connected with the external power supply, the effect of using the electronic device and charging the battery at the same time can be achieved, and the use experience of the user can be improved.

[0067] On the basis of the above-mentioned embodiment, the processing unit is further configured to determine that the input voltage of the analog-to-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal.

[0068] The power path management unit is further configured to determine that the general input-output interface outputs the second level signal, and connect the battery and the power system.

[0069] Specifically, when the external connector 113 of the electronic device is connected to the external power supply 114, the input voltage of the ADC interface is not empty, and when the input voltage is lower than the target voltage, the output signal of the GPIO interface of the processing unit 111 is the second level signal, which can be lower than the first level signal, i.e. the second level signal can be a low level signal.

[0070] The power path management unit can also connect the battery 115 and the power system 117 when the GPIO interface outputs the second level signal. At this time, the power system 117 is powered by the battery 115, and the battery 115 is charged by the external power supply 114.

[0071] On the basis of the above-mentioned embodiment, the processing unit is further configured to determine that the input voltage of the analog-to-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal.

[0072] The first management unit is further configured to determine that the general input-output interface outputs the second level signal, and disconnect the connection relationship between the external connector and the power system;

[0073] The second management unit is further configured to determine that the general input-output interface outputs the second level signal, and establish the connection relationship between the battery and the power system.

[0074] Specifically, when the output signal of the GPIO interface of the processing unit 111 is the second level signal, the first management unit 121 controls the disconnection of the path between the external connector 113 and the power system 117, and the second management unit 122 controls the conduction of the path between the battery 115 and the power system 117. At this time, the power system 117 is powered by the battery 115, and the battery 115 is charged by the external power supply 114.

[0075] On the basis of the above-mentioned embodiment, the external connector 113 includes a wired connector J1 and a wireless connector J2, and the ADC interface includes a first analog-to-digital conversion interface ADC1 and a second analog-to-digital conversion interface ADC2.

[0076] The first analog-to-digital conversion interface ADC1 is connected to the wireless connector J2;

[0077] The second analog-to-digital converter interface ADC2 is connected to the wired connector J1.

[0078] Specifically, Figure 4 This is a schematic diagram of the external connection relationships of wired connector J1. (See diagram below.) Figure 4 As shown, pin 1 on the wired connector J1 is connected to the constant power supply of the electronic device, which is 3.3V. Pin 4 can transmit the transmit signal X3M_UARTO_TXD to the main control system, and pin 5 can receive the feedback signal X3M_UARTO_RXD transmitted by the main control system. Pin 7 is the data negative signal line (USB_DM) interface, and pin 8 is the data positive signal line (USB_DP) interface. Pins 7 and 8 can be connected to the data negative signal line interface and data positive signal line interface of the battery discharge chip U1 in the battery charge and discharge management unit 116, respectively. Pins 4, 5, 7, and 8 are also grounded through electrostatic discharge protection diodes.

[0079] Pins 6, 9, 10, 16, and 17 are all grounded. Pin 11 is grounded through capacitor C5, pin 12 through capacitor C4, and pin 13 through capacitor C3. The capacitance values ​​of capacitors C3, C4, and C5 can be 100nF, 10uF, and 10uF, respectively.

[0080] Furthermore, pins 11 and 12 are both connected to the wired power signal VBUS provided by an external power supply. VBUS can be a 12V voltage signal or a 5V voltage signal. Pin 12 is connected to the target power signal VDD provided by the target power supply. VDD can be a 3.3V voltage signal. Pin 14 is used to send the first charging indicator signal Charge_LED_1 to the main control system, and pin 15 is used to send the second charging indicator signal Charge_LED_2 to the main control system.

[0081] Figure 5 This is a schematic diagram of the external connections of the wireless connector J2. Figure 5 As shown, pins 1 and 2 on the wireless connector J2 are connected to the wireless power signal "Wireless" provided by an external power supply. "Wireless" can be a 12V voltage signal. Furthermore, pin 1 is grounded through capacitor C26, and pin 2 is grounded through capacitor C27. The capacitance values ​​of capacitors C26 and C27 can be 10uF and 10uF, respectively.

[0082] Pins 3, 4, 9, and 10 on the wireless connector J2 are all grounded. Pin 6 is the serial data interface, used to transmit the serial data signal Simu_I2C_SDA, and pin 7 is the serial clock interface, used to transmit the serial clock signal Simu_I2C_SCL. Pins 6 and 7 can be connected to the serial data interface and serial clock signal of the battery discharge chip U1 in the battery charge / discharge management unit 116, respectively.

[0083] The processing unit 111 can include a microcontroller unit (MCU) U2, and the external connection relationship of U2 is as shown in Figure 6 Pin 1 on U2 is connected to the normal power supply of the electronic device, which is a 3.3V power supply. Pin 2 is a first analog-digital conversion interface ADC1, which receives a first input voltage VCC_ADC that can be determined by a wireless power signal Wireless provided by the wireless connector J2 connected to the external power supply. Pin 3 is a second analog-digital conversion interface ADC2, which receives a second input voltage USB_ADC that can be determined by a wired power signal VBUS provided by the wired connector J1 connected to the external power supply. Pin 4 is a GPIO interface, which transmits an output signal PWR_SWITCH_EN. Pin 5 is grounded.

[0084] On the basis of the above embodiment, the input voltage of the wired connector J1 is obtained through the output voltage of the first connector on the wired charging circuit board. The input voltage of the second connector on the wired charging circuit board will obtain different output voltages through the first connector according to whether the battery charging chip matches the PD protocol / QC protocol or not. When the protocols do not match, the output voltage of the first connector and the input voltage of the wired connector are both 5V. When the protocols match, the output voltage of the first connector and the input voltage of the wired connector are 12V.

[0085] On the basis of the above embodiment, the battery charging and discharging management unit 116 can include a battery charging chip. The external connection relationship of the battery charging chip U1 is as shown in Figure 7 Pin 1, 2, 3, 9, 10, 22, 23, 24, 26, 31, and 33 on the battery charging chip U1 are all grounded. Pins 4 and 5 are connected to the charging signal VCC_Charge_Input and grounded through the parallel capacitors C6, C7, and C8. Pins 4 and 5 are also grounded through resistors R1 and R4. Pin 6 is connected between resistors R1 and R4. Pin 7 is connected to the base of a transistor Q1 through a resistor R6, and the emitter of the transistor Q1 is connected to a 3.3V target power supply. The collector of the transistor Q1 is connected to the main control system for transmitting a charging status signal Charge_Status to the main control system, and the collector of the transistor Q1 is also grounded through a resistor R9. Here, the capacitance values of capacitors C6, C7, and C8 can be 22uF, 1uF, and 10nF respectively, and the resistance values of resistors R1, R4, R6, and R9 can be 300KΩ, 100KΩ, 1KΩ, and 10KΩ respectively.

[0086] Pin 8 can receive a charge enable signal Charge_EN of a master system, and can be grounded through a resistor R5. Here, the resistance of the resistor R5 can be 100KΩ.

[0087] Pin 9 can be grounded through a capacitor C11. Here, the capacitance of the capacitor C11 can be 1uF. Pins 11 and 12 are serial clock interfaces and serial data interfaces, respectively.

[0088] Pin 16 is a battery voltage detection resistor and chip internal switch tube connection end, which can be connected with the battery 115 through resistors R7 and R8, and access the battery signal VBAT. Pin 17 is a battery voltage feedback end, which can be connected with the battery 115 through the resistor R8, and access the battery signal VBAT. Here, the resistors R7 and R8 are battery voltage detection resistors, and the resistance can be 13KΩ and 150KΩ, respectively.

[0089] Pin 18 is a battery connection end, which is connected with the battery 115, accesses the battery signal VBAT, and is grounded through a capacitor C10. Here, the capacitance of the capacitor C10 can be 1uF.

[0090] Pins 19-21 are battery charging current detection positive input ends, which can be connected with the battery 115 through a resistor R2, and access the battery signal VBAT. Here, the resistance of the resistor R2 can be 40mΩ.

[0091] Pins 22-24 are all grounded, and the battery 115 can also be grounded through a capacitor C9. Here, the capacitance of the capacitor C9 can be 22uF.

[0092] On the basis of the above embodiment, the power path management circuit further comprises a first voltage dividing circuit and a second voltage dividing circuit;

[0093] The wireless connector J2 is connected with the first analog-digital conversion interface ADC1 through the first voltage dividing circuit;

[0094] The wired connector J1 is connected with the second analog-digital conversion interface ADC2 through the second voltage dividing circuit.

[0095] In the embodiment of the utility model, the introduction of the first voltage dividing circuit and the second voltage dividing circuit can reduce the calculation complexity of the processing unit, and facilitate subsequent comparison with the target voltage.

[0096] On the basis of the above embodiment, as shown in Figure 8 The first voltage dividing circuit comprises a first voltage dividing resistor R1835 and a second voltage dividing resistor R1836;

[0097] The wireless connector J2 is connected with the first analog-digital conversion interface ADC1 through the first voltage dividing resistor R1835; and the wireless connector J2 is grounded through the first voltage dividing resistor R1835 and the second voltage dividing resistor R1836.

[0098] Specifically, the first input voltage VCC_ADC of the Wireless accessed by the wireless connector J2 is obtained through the first voltage dividing resistor R1835, and the resistance values of the R1835 and R1836 can be 30KΩ and 10KΩ respectively.

[0099] On the basis of the above embodiment, as shown in Figure 9 the second voltage dividing circuit includes a third voltage dividing resistor R1913 and a fourth voltage dividing resistor R1914;

[0100] The wired connector J1 is connected with the second analog-digital conversion interface ADC2 through the third voltage dividing resistor R1913; and the wired connector J1 is grounded through the third voltage dividing resistor R1913 and the fourth voltage dividing resistor R1914.

[0101] Specifically, the second input voltage VBUS_ADC of the VBUS accessed by the wired connector J1 is obtained through the third voltage dividing resistor R1913, and the resistance values of the R1913 and R1914 can be 30KΩ and 10KΩ respectively.

[0102] On the basis of the above embodiment, as shown in Figure 10 the first management unit 121 includes a connected first switch unit 1211 and a second switch unit 1212;

[0103] The first switch unit 1211 is connected with the GPIO interface;

[0104] The second switch unit 1212 is connected with the external connector 113 and the power supply system 117 respectively;

[0105] The first switch unit 1211 and the second switch unit 1212 are both configured to be turned on when the GPIO interface outputs the first level signal.

[0106] Specifically, when the GPIO interface of the processing unit 111 outputs the first level signal, the first switch unit 1211 and the second switch unit 1212 are both turned on, and a connection relationship is established between the external connector 113 and the power supply system 117, and the external power supply 114 accessed through the external connector 113 supplies power to the power supply system 117.

[0107] In addition, the first switch unit 1211 and the second switch unit 1212 are also configured to determine that the GPIO interface outputs the second level signal to be turned off, at which time the connection relationship between the external connector 113 and the power supply system 117 is disconnected, and only the battery 115 can supply power to the power supply system 117, and the external power supply 114 can charge the battery 115.

[0108] On the basis of the above embodiment, as shown in Figure 11 The first switch unit 1211 includes a first field effect tube Q8, and the drain 3 of the first field effect tube Q8 is connected with the second switch unit 1212.

[0109] The gate 1 of the first field effect tube Q8 is connected with the GPIO interface, and can be connected with the output signal PWR_SWITCH_EN of the GPIO interface through the resistor R42. The gate 1 of the first field effect tube Q8 can also be grounded through the resistor R43. The resistance values of the resistors R42 and R43 can be 1KΩ and 100KΩ respectively. The source 2 of the first field effect tube Q8 is grounded.

[0110] On the basis of the above embodiment, as shown in Figure 11 The second switch unit 1212 includes a second field effect tube Q6 and a third field effect tube Q7, and the second field effect tube Q6 and the third field effect tube Q7 are symmetrically arranged, and the source 2 of the second field effect tube Q6 and the source 2 of the third field effect tube Q7 are connected.

[0111] The gate 1 of the second field effect tube Q6 and the gate 1 of the third field effect tube Q7 are both connected with the first switch unit, that is, both connected with the drain 3 of the first field effect tube Q8.

[0112] The drain 3 of the second field effect tube Q6 is connected with the external connector, and the Wireless can be connected with the drain 3 of the second field effect tube Q6 after obtaining the charging signal VCC_Charge_Input through the third diode D3, and the VBUS can be connected with the drain 3 of the second field effect tube Q6 after obtaining the charging signal VCC_Charge_Input through the fourth diode D4.

[0113] The drain 3 of the second field effect tube Q6 can also be grounded through the parallel connection of the capacitors C20 and C21. The capacitance values of the capacitors C20 and C21 can be 10uF and 100nF respectively.

[0114] The capacitors C23 with a capacitance value of 100nF can be connected between the gate 1 and the source 2 of the second field effect tube Q6 and between the gate 1 and the source 2 of the third field effect tube Q7.

[0115] The drain 3 of the third field effect transistor Q7 is connected with the power system 117 to provide a power signal VCC for the power system 117. The drain 3 of the third field effect transistor Q7 can also be grounded through the parallel connection of the capacitors C24 and C25, and the capacitance values of the capacitors C24 and C25 can be 10uF and 100nF respectively.

[0116] When the output signal PWR_SWITCH_EN at the output end of the comparator 11 is a second level signal, the first field effect transistor Q8, the second field effect transistor Q6 and the third field effect transistor Q7 are all not turned on, at which time the path between the external connector 113 and the power system 117 is disconnected.

[0117] When the output signal PWR_SWITCH_EN at the output end of the comparator 11 is a first level signal, the first field effect transistor Q8, the second field effect transistor Q6 and the third field effect transistor Q7 are all turned on, at which time the path between the external connector 113 and the power system 117 is connected, and the power system 117 is powered by the external power supply 114.

[0118] On the basis of the above embodiment, as shown in Figure 11 The second switch unit 1212 further includes a pull-up resistor R40, which can be connected between the gate 1 and the source 2 of the second field effect transistor Q6. The resistance value of the R40 can be 100KΩ.

[0119] On the basis of the above embodiment, as shown in Figure 12 The second management unit 122 can include a connected third switch unit 1221 and a fourth switch unit 1222.

[0120] The third switch unit 1221 is connected with the GPIO interface and the battery 115 respectively;

[0121] The fourth switch unit 1222 is connected with the battery 115 and the power system 117 respectively;

[0122] The third switch unit 1221 is configured to be turned on when the GPIO interface outputs a first level signal, and the fourth switch unit 1222 is configured to be turned off when the GPIO interface outputs a first level signal.

[0123] Specifically, when the GPIO interface outputs a first level signal, the third switch unit 1221 is turned on, the fourth switch unit 1222 is turned off, the connection between the battery 115 and the power system 117 is disconnected, and the power system 117 cannot be powered by the battery 115.

[0124] In addition, when the GPIO interface outputs the second level signal, the third switch unit 1221 is turned off, and the fourth switch unit 1222 is turned on. At this time, a connection relationship is established between the battery 115 and the power supply system 117, the power supply system 117 can be powered by the battery 115, and the battery 115 can be charged by the external power supply 114.

[0125] On the basis of the above embodiment, as shown in Figure 13 The third switch unit 1221 includes a fourth field effect tube Q5 and a triode Q4.

[0126] The gate 1 of the fourth field effect tube Q5 is connected with the output end of the comparator 11, and can be connected with the output signal PWR_SWITCH_EN of the GPIO interface through the resistor R27. The gate 1 of the fourth field effect tube Q5 can also be grounded through the resistor R30. The resistance values of the resistors R27 and R30 can be 1KΩ and 100KΩ respectively. The source 2 of the fourth field effect tube Q5 is grounded.

[0127] The drain 3 of the fourth field effect tube Q5 is connected with the battery 115 and the base of the triode Q4 respectively, and can be connected with the battery signal VBAT through the resistor R25 and connected with the base of the triode Q4 through the resistor R26. The resistance values of the resistors R25 and R26 can be 10KΩ and 10KΩ respectively.

[0128] The emitter and the collector of the triode Q4 are both connected with the fourth switch unit.

[0129] The emitter of the triode Q4 is also connected with the battery 115 and connected with the battery signal VBAT.

[0130] The collector of the triode Q4 can be grounded through the resistor R28, and the resistance value of the resistor R28 can be 100KΩ.

[0131] On the basis of the above embodiment, as shown in Figure 13 The fourth switch unit 1222 includes a fifth field effect tube Q2 and a sixth field effect tube Q3.

[0132] The source 2 of the fifth field effect tube Q2 and the source 2 of the sixth field effect tube Q3 are connected.

[0133] The gate 1 of the fifth field effect tube Q2 and the gate 1 of the sixth field effect tube Q3 are both connected with the third switch unit, that is, connected with the collector of the triode Q4.

[0134] The drain 3 of the fifth field effect tube Q2 is connected with the battery 115 and connected with the battery signal VBAT.

[0135] The drain 3 of the sixth field-effect transistor Q3 is connected to the power supply system 117, providing the power signal VCC to the power supply system 117. The drain 3 of the sixth field-effect transistor Q3 can also be grounded through parallel capacitors C16, C17, and C18, with capacitance values ​​of 220uF, 10uF, and 100nF, respectively.

[0136] When the output signal PWR_SWITCH_EN of the GPIO interface is at the second level, the fourth field-effect transistor Q5 and the transistor Q4 are not turned on, while the fifth field-effect transistor Q2 and the sixth field-effect transistor Q3 are turned on. At this time, the power supply system 117 is powered by the battery signal VBAT provided by the battery 115.

[0137] When the output signal PWR_SWITCH_EN of the GPIO interface is at the first level, the fourth field-effect transistor Q5 and the transistor Q4 are both turned on, while the fifth field-effect transistor Q2 and the sixth field-effect transistor Q3 are not turned on. At this time, the power supply system 117 is powered by the external power supply 114 connected to the external connector 113.

[0138] Based on the above embodiments, such as Figure 2 As shown in the illustration, this utility model embodiment also provides an electronic device, including: a power system 117, a battery charging and discharging management unit 116, a battery 115, an external connector 113, and the power path management circuit provided in the above embodiments. This electronic device can be a robotic device. By introducing the power path management circuit, when an external power source is connected to the external connector of the electronic device, it can simultaneously use the electronic device and charge the battery, thus improving the user experience.

[0139] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A power path management circuit, characterized by, Comprising: a processing unit and a power path management unit; the processing unit comprises an analog-digital conversion interface and a general input-output interface; the analog-digital conversion interface is connected with an external connector of an electronic device; the external connector is used for accessing an external power supply, and is connected with a battery of the electronic device through a battery charging and discharging management unit; the battery charging and discharging management unit is configured to charge and discharge the battery; the processing unit is configured to determine that an input voltage of the analog-digital conversion interface is higher than or equal to a target voltage, and output a first level signal through the general input-output interface; the power path management unit is connected with the battery, the external connector, the general input-output interface and a power system of the electronic device, respectively; the power path management unit is configured to connect the external power supply and the power system when the general input-output interface outputs the first level signal.

2. The power path management circuit of claim 1, wherein, the processing unit is further configured to determine that the input voltage of the analog-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal; the power path management unit is further configured to connect the battery and the power system when the general input-output interface outputs the second level signal.

3. The power path management circuit of claim 1, wherein, the external connector comprises a wireless connector and a wired connector, and the analog-digital conversion interface comprises a first analog-digital conversion interface and a second analog-digital conversion interface; the first analog-digital conversion interface is connected with the wireless connector; the second analog-digital conversion interface is connected with the wired connector.

4. The power path management circuit of claim 3, wherein, The wired connector determines an output voltage based on a charging protocol.

5. The power path management circuit of claim 3, wherein, Further comprising a first voltage dividing circuit and a second voltage dividing circuit; the wireless connector is connected with the first analog-digital conversion interface through the first voltage dividing circuit; the wired connector is connected with the second analog-digital conversion interface through the second voltage dividing circuit.

6. The power path management circuit of claim 5, wherein, The first voltage dividing circuit comprises a first voltage dividing resistor and a second voltage dividing resistor; the wireless connector is connected with the first analog-digital conversion interface through the first voltage dividing resistor; the wireless connector is grounded through the first voltage dividing resistor and the second voltage dividing resistor.

7. The power path management circuit of claim 5, wherein, The second voltage dividing circuit comprises a third voltage dividing resistor and a fourth voltage dividing resistor; the wired connector is connected with the second analog-digital conversion interface through the third voltage dividing resistor; the wired connector is grounded through the third voltage dividing resistor and the fourth voltage dividing resistor.

8. The power path management circuit of any one of claims 1-7, wherein, The battery charging and discharging management unit comprises a battery charging chip.

9. An electronic device, comprising: Comprising: a power system, a battery charging and discharging management unit, a battery, an external connector and a power path management circuit according to any one of claims 1-8.

Images