Self-adaptive gating circuit structure of power supply
By using a power adaptive gating circuit structure and a comparator and field-effect transistor to control the current path, the problem of hardware adjustment of the board under different voltage scenarios is solved, achieving adaptive capability, improving stability and reducing maintenance costs.
Patent Information
- Application Number
- CN202422716717.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2034-11-07
AI Technical Summary
In existing technologies, the hardware version of the circuit board needs to be adjusted when facing different voltage scenarios, which leads to high maintenance costs and the risk of overvoltage burnout, thus reducing reliability.
It adopts a power adaptive gating circuit structure, including a primary power supply, a Zener diode, a comparator, a power chip, and a logic switching unit. The current path is controlled by a circuit composed of a comparator and a field-effect transistor to achieve the ability to adapt to different operating voltages.
It improves the stability and reliability of the board, reduces maintenance costs, and ensures normal operation under different voltage conditions.
Smart Images
Figure CN223567532U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to the technical field of power supply circuits, in particular to a power supply self-adaptive gating circuit structure. BACKGROUND
[0002] In hardware design, some application scenarios need to change or adjust the power supply voltage so that the circuit board can work normally, so we usually hope that the primary power supply part can have the characteristics of wide voltage input, so that the board card can be more flexible to adapt to different scenes. In an ideal case, selecting a wide voltage input can solve most application problems, but in reality, when the external power supply is uncertain, the internal work of the board card may appear unexpected situations, for example, when the primary power supply of the board card is selected as a wide voltage DCDC power supply of 4V to 15V, the purpose is to meet the use scenarios of 5V and 12V power supply, at this time if the board card contains a 5V power supply IC chip, the 5V voltage of the primary power supply cannot be converted to 5V by the DCDC to supply power to the IC chip. Usually, this situation will reserve a 5V current path directly to the IC chip, at this time the components on the circuit board need to be modified to meet this use scenario.
[0003] However, this is the method when the external voltage of the board card is 5V, but the purpose of selecting a wide voltage input is to cope with different use scenarios, at this time different voltages still need to be adjusted before they can be normally applied. Selecting a wide voltage input still needs to be adjusted before it can be normally used, which requires different hardware versions and maintenance costs, when used by non-professionals, it can cause the board card to not work normally, and even have the risk of overvoltage burnout, which can reduce the reliability of the board card. CONTENT OF THE INVENTION
[0004] Therefore, the application provides a power supply self-adaptive gating circuit structure which has the ability to adapt to different working voltages.
[0005] According to an aspect of the application, a power supply self-adaptive gating circuit structure is provided, comprising: a primary power supply, a zener diode, a comparator, a power supply chip and a logic inversion unit.
[0006] The primary power supply provides a power supply voltage.
[0007] The input end of the comparator is electrically connected with the primary power supply and the zener diode respectively, and the output end is electrically connected with the power supply chip and the logic inversion unit respectively.
[0008] When the voltage value of the primary power supply is greater than the voltage value of the voltage stabilizing diode, the output end of the comparator outputs a high level, the output end of the comparator is in communication with the power supply chip, the power supply chip supplies power to the IC chip, and when the voltage value of the primary power supply is less than the voltage value of the voltage stabilizing diode, the output end of the comparator outputs a low level, the voltage value of the output end of the comparator is 0, the voltage value of the power supply chip is 0, and the logic inversion unit is connected to the primary power supply to supply power to the IC chip.
[0009] In a possible implementation, the circuit further comprises an R2 resistor, an R7 resistor and an R1 resistor.
[0010] The primary power supply is electrically connected to the positive input end of the comparator through the R2 resistor and the R7 resistor after voltage division.
[0011] The primary power supply is electrically connected to the negative input end of the comparator through the R1 resistor and the voltage stabilizing diode, and the reverse breakdown characteristic of the voltage stabilizing diode stabilizes the voltage of the negative input end at a first voltage value.
[0012] In a possible implementation, the logic inversion unit comprises an R14 resistor, a Q1 field effect tube, a Q2 field effect tube, a Q3 field effect tube and a Q4 field effect tube.
[0013] The Q1 field effect tube and the Q2 field effect tube are PMOS tubes, and the Q3 field effect tube and the Q4 field effect tube are NMOS tubes.
[0014] The output end of the comparator is electrically connected to the gate of the Q4 field effect tube and the gate of the Q2 field effect tube, respectively, and the output ends of the Q4 field effect tube and the Q2 field effect tube are electrically connected to the gate of the Q3 field effect tube.
[0015] The primary power supply is electrically connected to the drain of the Q3 field effect tube and the gate of the Q1 field effect tube through the R14 resistor.
[0016] The drain of the Q1 field effect tube is adapted to be electrically connected to a power supply voltage.
[0017] In a possible implementation, when the comparator outputs a low level, the voltage of the power supply chip is 0, and the primary power supply, the logic inversion circuit and the IC chip are connected in series to supply power to the IC chip.
[0018] In a possible implementation, when the comparator outputs a high level, the voltage value of the Q1 field effect tube is 0, and the primary power supply, the comparator, the power supply chip and the IC chip are connected in series to supply power to the IC chip.
[0019] In a possible implementation, the power supply chip is connected to the comparator through a resistor R5 and a resistor R6.
[0020] The resistor R5 and the resistor R6 are connected in series between the comparator and the power supply chip.
[0021] In a possible implementation, the power supply chip is a DCDC chip.
[0022] In a possible implementation, the power supply chip is adapted to be electrically connected to a supply voltage.
[0023] In a possible implementation, the comparator is electrically connected to the primary power supply.
[0024] In a possible implementation, the resistor R2, the resistor R7, and the resistor R1 have the same resistance.
[0025] The power supply adaptive gating circuit structure of the embodiment has the following beneficial effects: the primary power supply is connected to the positive phase (or negative phase) input of the comparator after being divided by two resistors, and the primary power supply is also connected to the negative phase (or positive phase) input of the comparator after being fixed at a certain value by a voltage stabilizing diode. The output end of the comparator is connected to the gate (G) of an NMOS tube and a PMOS. The output of the comparator is connected to the enable of the power supply chip after being divided by resistors. The circuit composed of field effect tubes controls whether the primary power supply directly supplies power to the IC chip, so as to adjust the current path, so that the board card has the ability to adapt to different working voltages, and the adjustment precision is high, which greatly reduces the maintenance cost of the board card, so that the use scene is not affected by the internal circuit, and the stability and reliability of the board card are improved.
[0026] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS
[0027] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present application and serve to explain the principles of the present application.
[0028] Figure 1 A schematic diagram of the power supply adaptive gating circuit structure of the embodiment of the present application is shown;
[0029] Figure 2 A connection schematic diagram of the primary power supply and the comparator of the power supply adaptive gating circuit structure of the embodiment of the present application is shown;
[0030] Figure 3 A logic flip connection schematic diagram of the power supply adaptive gating circuit structure of the embodiment of the present application is shown;
[0031] Figure 4 A power chip schematic diagram showing the power supply self-adaptive gating circuit structure of the embodiment of the present application. DETAILED DESCRIPTION
[0032] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numbers in different drawings represent the same or similar elements. Although various aspects of the embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
[0033] It should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application or simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.
[0034] In addition, the terms "first" and "second" are used only for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.
[0035] The word "exemplary" used herein means "serving as an example, embodiment, or illustration". Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or better than other embodiments.
[0036] In addition, in order to better illustrate the present application, numerous specific details are given in the specific embodiments below. Those skilled in the art should understand that the present application can also be implemented without some specific details. In some examples, methods, means, elements and circuits well known to those skilled in the art are not described in detail, in order to highlight the main idea of the present application.
[0037] As Figures 1-4As shown, the power supply adaptive gating circuit structure of the embodiment of the application comprises: a primary power supply 100, a voltage stabilizing diode 140, a comparator 200, a power supply chip 300 and a logic flip unit 400, the primary power supply 100 provides an input voltage, the input terminals of the comparator 200 are electrically connected with the primary power supply 100 and the voltage stabilizing diode 140 respectively, the output terminals are electrically connected with the power supply chip 300 and the logic flip unit 400 respectively, when the voltage value of the primary power supply 100 is greater than the voltage value of the voltage stabilizing diode 140, the output terminal of the comparator 200 outputs a high level, the output terminal of the comparator 200 is in communication with the power supply chip 300, the power supply chip 300 supplies power to the IC chip, and when the voltage value of the primary power supply 100 is less than the voltage value of the voltage stabilizing diode 140, the output terminal of the comparator 200 outputs a low level, the voltage value of the output terminal of the comparator 200 is 0, the voltage value of the power supply chip 300 is 0, and the logic flip unit 400 is connected with the primary power supply 100 to supply power to the IC chip.
[0038] In the embodiment, the power supply of the primary power supply 100 is connected to the positive phase (or negative phase) input of the comparator 200 through two resistors, and at the same time, the primary power supply 100 is also connected with the negative phase (or positive phase) input of the comparator 200 after the voltage is fixed at a certain value through the voltage stabilizing diode 140, the output terminal of the comparator 200 is connected with the gate (G) of an NMOS tube and a PMOS at the same time, the output of the comparator 200 is connected with the enable of the power supply chip 300 after voltage division through a resistor, and the circuit composed of field effect tubes is used to control whether the primary power supply 100 directly supplies power to the IC chip, so as to achieve the purpose of adjusting the current path, so that the board card has the ability to adapt to different working voltages, and the adjustment precision is high, which greatly reduces the maintenance cost of the board card, so that the use scene is not affected by the internal circuit, and the stability and reliability of the board card are improved.
[0039] In a specific embodiment, further comprising: R2 resistor 110, R7 resistor 120, R1 resistor 130, R14 resistor, Q1 field effect tube 410, Q2 field effect tube 420, Q3 field effect tube 430 and Q4 field effect tube 440, the primary power supply 100 is connected to the positive input of the comparator 200 through the R2 resistor 110 and the R7 resistor 120, and the primary power supply 100 is connected to the negative input of the comparator 200 through the R1 resistor 130 and the Zener diode 140, and the reverse breakdown characteristic of the Zener diode 140 stabilizes the voltage of the negative input to the first voltage value. The output of the comparator 200 is connected to the gate of the Q4 field effect tube 440 and the gate of the Q2 field effect tube 420, and the output of the Q4 field effect tube 440 and the Q2 field effect tube 420 is connected to the gate of the Q3 field effect tube 430; the primary power supply 100 is connected to the drain of the Q3 field effect tube 430 and the gate of the Q1 field effect tube 410 through the R14 resistor, and the drain of the Q1 field effect tube 410 is adapted to be connected to the supply voltage. When the supply voltage of the primary power supply 100 is 5V or 12V, and the resistance values of the R1 resistor 130, the R2 resistor 110 and the R7 resistor 120 are 10K, the negative input of the comparator 200 is stabilized to 3.3V by the Zener diode 140.
[0040] In this embodiment, when the voltage of the primary power supply 100 is 5V, it is divided by the R2 resistor 110 and the R7 resistor with a resistance value of 10K, and the voltage after the voltage division is 2.5V, which is connected to the positive input of the comparator 200, and the negative input of the comparator 200 is stabilized to 3.3V by the Zener diode 140, and since 3.3V is greater than 2.5V, the output of the comparator 200 is therefore low, i.e. 0V. This low-level output further affects the enable terminal of the power supply chip 300, so that the voltage thereof is also 0V, which is less than the minimum working voltage 1.22V required by the power supply chip 300, so the power supply chip 300 does not work.
[0041] Among them, the gate (G) voltage of the Q2 field effect tube 420 and the Q4 field effect tube 440 is also 0V. For the Q2 field effect tube 420, the gate-source voltage Vgs is less than 0, so the Q2 field effect tube 420 is turned on, and the drain voltage Vd is equal to 5V. For the Q4 field effect tube 440, the gate-source voltage Vgs is equal to 0, so the Q4 field effect tube 440 is turned off. At this time, the gate voltage of the Q3 field effect tube 430 is 5V, and the gate-source voltage Vgs is greater than 0, so the Q3 field effect tube 430 is turned on. At the same time, the gate voltage of the Q1 field effect tube 410 is 0V, so the Q1 field effect tube 410 is also turned on.
[0042] In this case, the IC chip in the board card is directly provided with 5V voltage by the primary power supply 100 through the field effect tube circuit.
[0043] In this embodiment, when the input voltage of the primary power supply 100 is 12V, this voltage is divided by two resistors R2 110 and R7 with resistance of 10K, so that the voltage connected to the positive input terminal of the comparator 200 is reduced to 6V. At the same time, the negative input terminal of the comparator 200 is stabilized to 3.3V by the zener diode 140. Since 3.3V is less than 6V, the output terminal of the comparator 200 thus generates a high level signal, i.e. 12V. This high level output signal is then divided again by the resistor R5 210 with resistance of 10K and the resistor R6 220 with resistance of 5K, and then connected to the enable pin of the power supply chip 300, which makes the U1 power supply start to work and enter the enabled state.
[0044] In this embodiment, the gate (G) of the Q2 field effect tube 420 and the Q4 field effect tube 440 receives a 12V voltage. For the Q2 field effect tube 420, the gate-source voltage Vgs is equal to 0 (because the gate and the source are both connected to 12V), so the Q2 field effect tube 420 is closed. For the Q4 field effect tube 440, the gate-source voltage Vgs is greater than 0 (the gate is 12V and the source is close to 0V), so the Q4 field effect tube 440 is open. At this time, the gate voltage of the Q3 field effect tube 430 is 0V, so the gate-source voltage Vgs is also equal to 0, and the Q3 field effect tube 430 is closed. Similarly, the gate of the Q1 field effect tube 410 receives a 12V voltage, and the gate-source voltage Vgs is also 0 (the gate and the source are both connected to 12V), so the Q1 field effect tube 410 is also in the closed state. Therefore, the voltage required by the IC chip in the board card is provided by the power supply chip 300, and the U1 converts the input voltage of 12V into 5V for the IC chip to use.
[0045] It should be noted that the Q1 field effect tube 410 and the Q2 field effect tube 420 are PMOS tubes, and the Q3 field effect tube 430 and the Q4 field effect tube 440 are NMOS tubes.
[0046] In a specific embodiment, the output of the comparator 200 is directly connected (without voltage division) to the gate (G) of the Q4 field effect tube 440 and the Q2 field effect tube 420, and a logic NOT circuit is formed.
[0047] In a specific embodiment, it further comprises: the resistor R5 210 and the resistor R6 220, which are connected in series between the comparator 200 and the power supply chip 300.
[0048] In a specific embodiment, the power supply chip 300 is a DCDC chip.
[0049] In a specific embodiment, the power supply chip 300 is electrically connected with a supply voltage.
[0050] In one embodiment, the comparator 200 is electrically connected to the primary power supply 100 to provide power for use of the comparator 200.
[0051] In one embodiment, the R2 resistor 110, the R7 resistor 120, and the Rl resistor 130 have the same resistance value.
[0052] Embodiments of the application have been described above, with the understanding that these descriptions are exemplary only, and are not intended to be exhaustive or to limit the scope of the embodiments disclosed. Many modifications and variations are possible in light of the above teachings. It is intended that the scope of the embodiments disclosed should include all modifications and variations that come within the scope of the described embodiments and that incorporate the essential teachings of the described embodiments. The above description is that of current embodiments of the application only, and is not intended to limit the scope of the application, which is defined in the claims. The terms used in this specification generally have their ordinary meanings in the art, which can be altered only by their inclusion in the specification and claims.
Claims
1. A power adaptive gating circuit structure, suitable for electrically connecting IC chips, characterized in that, include: Primary power supply, Zener diode, comparator, power chip and logic switching unit; The primary power supply provides the input voltage; The input terminals of the comparator are electrically connected to the primary power supply and the Zener diode, respectively, and the output terminals are electrically connected to the power supply chip and the logic switching unit, respectively. When the voltage of the primary power supply is greater than the voltage of the Zener diode, the comparator outputs a high level, and the output of the comparator is connected to the power supply chip, which supplies power to the IC chip. When the voltage of the primary power supply is less than the voltage of the Zener diode, the comparator outputs a low level, the output voltage of the comparator is 0, the voltage of the power supply chip is 0, and the logic switching unit is connected to the primary power supply to supply power to the IC chip.
2. The power adaptive gating circuit structure according to claim 1, characterized in that, Also includes: Resistors R2, R7, and R1; The primary power supply is divided by resistors R2 and R7 and then electrically connected to the non-inverting input of the comparator. The primary power supply is electrically connected to the negative input terminal of the comparator through the resistor R1 and the Zener diode, and the reverse breakdown characteristic of the Zener diode stabilizes the voltage of the negative input terminal at a first voltage value.
3. The power adaptive gating circuit structure according to claim 2, characterized in that, The logic switching unit includes: resistor R14, field-effect transistor Q1, field-effect transistor Q2, field-effect transistor Q3, and field-effect transistor Q4; The Q1 and Q2 field-effect transistors are PMOS transistors, and the Q3 and Q4 field-effect transistors are NMOS transistors; The output terminal of the comparator is electrically connected to the gate of the Q4 field-effect transistor and the gate of the Q2 field-effect transistor, respectively, and the output terminals of the Q4 field-effect transistor and the Q2 field-effect transistor are electrically connected to the gate of the Q3 field-effect transistor. The primary power supply is electrically connected to the drain of the Q3 field-effect transistor and the gate of the Q1 field-effect transistor through the resistor R14. The drain of the Q1 field-effect transistor is suitable for electrical connection to the power supply voltage.
4. The power adaptive gating circuit structure according to claim 3, characterized in that, When the comparator outputs a low level, the voltage of the power supply chip is 0. The primary power supply, the logic switching circuit, and the IC chip are connected in series to supply power to the IC chip.
5. The power adaptive gating circuit structure according to claim 4, characterized in that, When the comparator outputs a high level, the voltage of the Q1 field-effect transistor is 0. The primary power supply, the comparator, the power chip, and the IC chip are connected in series to supply power to the IC chip.
6. The power adaptive gating circuit structure according to any one of claims 1-3, characterized in that, Also includes: R5 and R6 resistors; The R5 resistor and the R5 resistor are connected in series between the comparator and the power chip.
7. The power adaptive gating circuit structure according to claim 1, characterized in that, The power chip is a DC-DC chip.
8. The power adaptive gating circuit structure according to claim 7, characterized in that, The power chip is suitable for electrical connection to the power supply voltage.
9. The power adaptive gating circuit structure according to claim 1, characterized in that, The comparator is electrically connected to the primary power supply.
10. The power adaptive gating circuit structure according to claim 2, characterized in that, The resistance values of resistors R2, R7, and R1 are the same.