Three-level bus voltage neutral-point equalization circuit and power electronic converter
By combining a push-pull emitter follower and a drive unit, the problem of bus voltage imbalance is solved, achieving efficient circuit regulation and low loss, and ensuring device safety.
Patent Information
- Application Number
- CN202422797749.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-15
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2034-11-15
AI Technical Summary
In existing three-level topologies, unbalanced bus voltages cause uneven stress on devices, posing safety hazards and exhibiting weak regulation capabilities, with significant losses remaining even after regulation.
A push-pull emitter follower and a drive unit, including equivalent resistors and capacitors, are used to form a low-pass filter. The bus voltage is balanced by controlling the capacitor charging through the push-pull emitter follower, which avoids frequent switching and reduces losses.
It achieves bus voltage balancing, reduces circuit losses, improves regulation capability, ensures device safety, and has almost no losses after balancing.
Smart Images
Figure CN223567541U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of power electronic conversion technology, and in particular to a three-level bus voltage midpoint equalization circuit and a power electronic converter. Background Technology
[0002] Three-level topology has been widely used in photovoltaic, energy storage and UPS fields due to its advantages such as high efficiency, low harmonics and good load adaptability. Its core principle is to use a series structure of positive and negative bus capacitors to form two bus voltages, namely positive bus voltage and negative bus voltage. When the two bus voltages are exactly the same, the stress on the device is only half of that on the entire bus.
[0003] However, it's difficult to ensure uniformity between two sets of capacitors connected in series (e.g., different leakage currents). This will result in different voltage divisions on the positive and negative bus lines after power-on, subjecting the devices to both high and low stresses. When the deviation is severe, it can exceed the device's withstand voltage range, creating a safety hazard. Typically, to ensure device safety, fault alarms are prevented from triggering power-on. Furthermore, even after power-on, inconsistencies in the switching devices' waveforms can also lead to deviations on the positive and negative bus lines. Therefore, relevant circuits and methods are needed to ensure uniform voltage division between the positive and negative bus capacitors. Currently, there are two main solutions to ensure uniform voltage division between the positive and negative bus capacitors.
[0004] like Figure 1 As shown, Scheme 1 uses two sets of resistors with the same resistance value, which are connected in parallel to the positive bus and the negative bus respectively. When the bus voltage is unbalanced, the current flowing through the two sets of resistors will be different (the current on the high voltage side is too much and the current on the low voltage side is too little). This difference in current will be used as the balancing current to achieve bus balance. This scheme has a small balancing current and weak adjustment capability. Moreover, after balance is achieved, there will always be losses in the two parts of the resistor, resulting in high power consumption and heat generation.
[0005] like Figure 2 As shown, Scheme 2 adds two switching transistors to Scheme 1. When the midpoint of the bus voltage shifts, the switching transistor on the side with the higher voltage will conduct. After conduction, the balancing current is obtained through R and the switching transistor, thus achieving bus balance. In this scheme, the balancing current is the current flowing through the resistor, which greatly improves the balancing capability. Before balance is achieved, only one side of the resistor generates losses, and the power consumption and heat generation are only half of those in Scheme 1. After achieving complete balance, the losses are almost zero. However, the positive and negative buses of the inverter circuit have AC fluctuations (the positive bus voltage is higher than the negative bus voltage for a period of time, and the negative bus voltage is higher than the positive bus voltage for a period of time). Under these circumstances, the balancing circuit will work continuously, and its losses cannot be reduced to zero. Utility Model Content
[0006] Therefore, the three-level bus voltage midpoint balancing circuit and the power electronic converter are provided, so that the technical problem of excessive loss after balance is achieved in the prior art is solved or partially solved.
[0007] The technical solutions of the utility model are as follows:
[0008] In a first aspect, the utility model provides a kind of three-level bus voltage midpoint balancing circuit, for the midpoint voltage of three-level topology circuit is balanced, the three-level topology circuit includes the first capacitor and the second capacitor in series between positive bus voltage terminal and negative bus voltage terminal, three-level bus voltage midpoint balancing circuit includes: push-pull emitter follower and drive unit, the two ends of the push-pull emitter follower are connected with positive bus voltage terminal and negative bus voltage terminal respectively, and the drive unit includes first resistance, second resistance and third capacitor, the resistance of the first resistance and the second resistance is equal, the first resistance and the second resistance are connected between positive bus voltage terminal and negative bus voltage terminal, the connecting point of the first resistance and the second resistance is respectively connected with one end of the third capacitor and the base of triode in the push-pull emitter follower, the other end of the third capacitor is respectively connected with the emitter of triode in the push-pull emitter follower and the connecting point of the first capacitor and the second capacitor.
[0009] Optionally, the third capacitor, the first resistance and the second resistance constitute a low-pass filter, and a cutoff frequency of the low-pass filter is lower than a preset power frequency.
[0010] Optionally, the preset power frequency is 50HZ.
[0011] Optionally, the push-pull emitter follower includes a first triode and a second triode, a collector of the first triode is connected with the positive bus voltage terminal, a base of the first triode is respectively connected with one end of the third capacitor and a base of the second triode, an emitter of the first triode is respectively connected with the other end of the third capacitor and an emitter of the second triode, and a collector of the second triode is connected with the negative bus voltage terminal.
[0012] Optionally, the push-pull emitter follower further includes a third resistance and a fourth resistance, the collector of the first triode is connected with the positive bus voltage terminal through the third resistance, and the collector of the second triode is connected with the negative bus voltage terminal through the fourth resistance.
[0013] Optionally, the first triode is an NPN triode, and the second triode is a PNP triode.
[0014] Optionally, the resistance of the first resistance is greater than the resistance of the third resistance and the fourth resistance.
[0015] In a second aspect, the utility model provides a kind of power electronic converter, including the three-level bus voltage midpoint balancing circuit as any one of first aspect.
[0016] The three-level bus voltage midpoint balancing circuit and power electronic converter of the utility model have the following beneficial effects:
[0017] The three-level bus voltage midpoint balancing circuit of the utility model includes push-pull emitter follower and drive unit, drive unit includes first resistance, second resistance and third capacitor, the resistance value of the first resistance and the second resistance is equal, to make its two ends voltage same, equal half bus voltage, third capacitor is placed between the base and emitter of push-pull emitter follower, and it is low-pass filter with first resistance and second resistance, can filter processing to bus power frequency or power frequency multiple ac ripple, avoid balancing circuit frequently switching, ensure that in real unbalance, function, the loss of balancing circuit after balance is almost 0, can greatly reduce the circuit loss after balance. BRIEF DESCRIPTION OF DRAWINGS
[0018] In order to more clearly express the technical scheme of the utility model embodiment, the following will be briefly introduced to the drawings needed to be used in embodiment description, and obviously, the drawings in the following description are only some embodiments of the utility model, and for those skilled in the art, other drawings can be obtained according to these drawings without creating labor.
[0019] Figure 1 It is the circuit schematic diagram of three-level bus voltage midpoint balancing circuit in scheme 1;
[0020] Figure 2 It is the circuit schematic diagram of three-level bus voltage midpoint balancing circuit in scheme 2;
[0021] Figure 3 It is the circuit schematic diagram of three-level bus voltage midpoint balancing circuit of the utility model embodiment;
[0022] Figure 4 It is the working schematic diagram of three-level bus voltage midpoint balancing circuit of the utility model embodiment when U1_avg>U2_avg;
[0023] Figure 5 It is the working schematic diagram of three-level bus voltage midpoint balancing circuit of the utility model embodiment when U1_avg<U2_avg;
[0024] Figure 6 It is the working schematic diagram of three-level bus voltage midpoint balancing circuit of the utility model embodiment when U1_avg=U2_avg. DETAILED DESCRIPTION
[0025] The technical solutions of the present application will be described clearly and completely below in conjunction with the drawings. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts fall within the scope of the present application.
[0026] In the description of the present application, it should be noted that the terms "first", "second" and the like are only used for descriptive purposes, and should not be construed as indicating or implying relative importance.
[0027] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "connected", "connected" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication between two elements, it can be wireless connection, or it can be wired connection. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0028] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as there is no conflict.
[0029] In order to enhance the current balance ability of the circuit and reduce the loss after balancing, the embodiment of the present application provides a three-level bus voltage midpoint balancing circuit.
[0030] The three-level bus voltage midpoint balancing circuit of the embodiment of the present application is used for balancing the midpoint voltage of the three-level topology circuit, as shown in the figure, Figure 3 The three-level topology circuit includes a first capacitor C1 and a second capacitor C2 connected in series between a positive bus voltage end and a negative bus voltage end, and the three-level bus voltage midpoint balancing circuit includes:
[0031] A push-pull emitter follower and a driving unit, two ends of the push-pull emitter follower are connected with the positive bus voltage end and the negative bus voltage end respectively, the driving unit includes a first resistor R1, a second resistor R2 and a third capacitor C3, the first resistor R1 and the second resistor R2 have equal resistance values, the first resistor R1 and the second resistor R2 are connected in series between the positive bus voltage end and the negative bus voltage end, the connection points of the first resistor R1 and the second resistor R2 are connected with one end of the third capacitor C3 and the base of a triode in the push-pull emitter follower respectively, the other end of the third capacitor C3 is connected with the emitter of the triode in the push-pull emitter follower and the connection point of the first capacitor C1 and the second capacitor C2 respectively.
[0032] Specifically, in the three-level topology circuit, the voltage of the first capacitor C1 is the voltage from the positive bus to the midpoint N, the voltage of the second capacitor C2 is the voltage from the midpoint N to the negative bus, and the sum of the voltage of the first capacitor C1 and the voltage of the second capacitor C2 is the full bus voltage. The average voltage of the first capacitor C1 and the average voltage of the second capacitor C2 are U1_avg and U2_avg respectively, which can be obtained by a low-pass filter composed of the third capacitor C3 and the first resistor R1 and the second resistor R2. After the midpoint voltage balance is performed, U1_avg = U2_avg.
[0033] The resistance values of the first resistor R1 and the second resistor R2 are the same, so that the voltages across the two resistors are the same and equal to the half bus voltage. The resistance values of the first resistor R1 and the second resistor R2 are very large, so that the loss of the first resistor R1 and the second resistor R2 can be almost ignored.
[0034] The push-pull emitter follower mainly consists of two triodes. By controlling the conduction of the triodes, the capacitor with a smaller voltage can be charged when U1_avg > U2_avg or U1_avg < U2_avg, so that U1_avg = U2_avg.
[0035] The third capacitor C3 is placed between the base and the emitter of the push-pull emitter follower, and forms a low-pass filter with the first resistor R1 and the second resistor R2. The low-pass filter can filter the bus power frequency or power frequency multiple AC ripple, avoid the frequent switching of the balancing circuit, ensure that the balancing circuit works when it is really unbalanced, and the loss of the balancing circuit is almost 0 after balancing, which can greatly reduce the circuit loss after balancing.
[0036] In some embodiments, the third capacitor C3, the first resistor R1 and the second resistor R2 form a low-pass filter, and the cutoff frequency of the low-pass filter is lower than the preset power frequency.
[0037] Specifically, the preset power frequency is 50HZ. Since the bus power frequency is generally 50HZ, the cutoff frequency of the low-pass filter is set to be lower than 50HZ, so that the bus power frequency (or power frequency multiple) AC ripple can be filtered, and the balancing circuit will always work in the case of having AC fluctuations, and its loss cannot be reduced to 0.
[0038] In some embodiments, the push-pull emitter follower includes a first triode Q1 and a second triode Q2. The collector of the first triode Q1 is connected to the positive bus voltage terminal. The base of the first triode Q1 is connected to one end of the third capacitor C3 and the base of the second triode Q2. The emitter of the first triode Q1 is connected to the other end of the third capacitor C3 and the emitter of the second triode Q2. The collector of the second triode Q2 is connected to the negative bus voltage terminal.
[0039] Further, the push-pull emitter follower further comprises a third resistor R3 and a fourth resistor R4, the resistance of the third resistor R3 and the resistance of the fourth resistor R4 can be equal or not equal, the collector of the first triode Q1 is connected with the positive bus voltage end through the third resistor R3, and the collector of the second triode Q2 is connected with the negative bus voltage end through the fourth resistor R4.
[0040] Specifically, the first triode Q1 is an NPN triode, and the second triode Q2 is a PNP triode.
[0041] The resistance of the third resistor R3 and the fourth resistor R4 is equal, and the resistance is denoted as R, and the third resistor R3 and the fourth resistor R4 mainly play a current limiting role.
[0042] In some embodiments, the resistance of the first resistor R1 is greater than the resistance of the third resistor R3 and the fourth resistor R4.
[0043] Specifically, by setting the resistance of the first resistor R1 and the second resistor R2 to be relatively large, the circuit loss after balancing can be reduced. In an example, the resistance of the third resistor R3 and the fourth resistor R4 is equal, and the resistance of the first resistor R1 can be set to be several times or more than the resistance of the third resistor R3 and the fourth resistor R4 according to actual conditions, so as to reduce the circuit loss, for example, the resistance of the first resistor R1 is 1000 times the resistance of the third resistor R3 and the fourth resistor R4.
[0044] The working principle of the three-level bus voltage midpoint balancing circuit is as follows.
[0045] 1, when U1_avg> U2_avg, as shown in the formula, the first triode Q1 is turned on, the second triode Q2 is cut off, the bus voltage can be current-limited through the third resistor R3, and the balance current I1 is provided to charge the second capacitor C2, so that the voltage of the second capacitor C2 rises until U1=U2, and the bus midpoint balancing state is realized. Figure 4
[0046] 2, when U1_avg< U2_avg, as shown in the formula, the first triode Q1 is cut off, the second triode Q2 is turned on, the bus voltage can be current-limited through the fourth resistor R4, and the balance current I1 is provided to charge the first capacitor C1, so that the voltage of the first capacitor C1 rises until U1=U2, and the bus midpoint balancing state is realized. Figure 5 3, when U1_avg= U2_avg (whether there is an AC fluctuation), as shown in the formula, the first triode Q1 is cut off, and the second triode Q2 is cut off, at this time, the loss is only the first resistor R1 and the second resistor R2 with relatively large resistance, and the loss is almost 0.
[0047] Figure 6
[0048] Compared with the scheme 1 and the scheme 2, the three-level bus voltage midpoint balancing circuit (namely the scheme in the table below) of the embodiment of the utility model has improved balancing ability and loss, and the specific comparison is as shown in table 1 and table 2:
[0049] Table 1 balancing ability comparison table
[0050]
[0051] Table 2 loss comparison table
[0052]
[0053] The three-level bus voltage midpoint balancing circuit and the power electronic converter have the following beneficial effects:
[0054] The three-level bus voltage midpoint balancing circuit of the utility model places the third capacitor C3 between the base and the emitter of the push-pull emitter follower, and the first resistor R1 and the second resistor R2 form a low-pass filter, can filter the bus power frequency or power frequency multiple AC ripple, avoid the frequent switching of the balancing circuit, ensure the function in the real unbalance, the loss of the balancing circuit after balancing is almost 0, can greatly reduce the circuit loss after balancing, and the power consumption is low.
[0055] Can be balanced autonomously, is built by passive devices, can identify and control the bus midpoint in the balanced position in full working condition.
[0056] Low in cost, without controller, power switch tube, inductor and other high-priced and large-sized devices, only uses low-priced and small-sized passive devices such as resistor, capacitor and triode, realizes perfect function and low cost, and saves the space required by the circuit module.
[0057] The utility model further provides a kind of power electronic converter, including three-level bus voltage midpoint balancing circuit as in the above embodiment.
[0058] Although the example embodiments and their advantages have been described in detail, those skilled in the art can make various changes, substitutions and modifications to the embodiments without departing from the spirit of the utility model and the defined protection scope, and such modifications and variations fall within the defined scope.
Claims
1. A three-level bus voltage neutral point balancing circuit for balancing the neutral point voltage of a three-level topology circuit, the three-level topology circuit comprising a first capacitor and a second capacitor connected in series between a positive bus voltage terminal and a negative bus voltage terminal, characterized by, The three-level bus voltage midpoint balancing circuit comprises: The push-pull emitter follower and a driving unit, two ends of the push-pull emitter follower are connected with a positive bus voltage end and a negative bus voltage end respectively, the driving unit comprises a first resistor, a second resistor and a third capacitor, the first resistor and the second resistor have equal resistance values, the first resistor and the second resistor are connected in series between the positive bus voltage end and the negative bus voltage end, a connection point of the first resistor and the second resistor is connected with one end of the third capacitor and a base of a triode in the push-pull emitter follower respectively, the other end of the third capacitor is connected with an emitter of the triode in the push-pull emitter follower and a connection point of the first capacitor and the second capacitor respectively.
2. The three-level bus voltage neutral balancing circuit according to claim 1, characterized in that, The third capacitor, the first resistor and the second resistor constitute a low-pass filter, and a cutoff frequency of the low-pass filter is lower than a preset power frequency.
3. The three-level bus voltage neutral balancing circuit according to claim 2, characterized in that, The preset power frequency is 50HZ.
4. The three-level bus voltage neutral balancing circuit of claim 1, wherein, The push-pull emitter follower comprises a first triode and a second triode, a collector of the first triode is connected with the positive bus voltage end, a base of the first triode is connected with one end of the third capacitor and a base of the second triode respectively, an emitter of the first triode is connected with the other end of the third capacitor and an emitter of the second triode respectively, and a collector of the second triode is connected with the negative bus voltage end.
5. The three-level bus voltage neutral balancing circuit according to claim 4, characterized in that, The push-pull emitter follower further comprises a third resistor and a fourth resistor, the collector of the first triode is connected with the positive bus voltage end through the third resistor, and the collector of the second triode is connected with the negative bus voltage end through the fourth resistor.
6. The three-level bus voltage neutral balancing circuit according to claim 4, characterized by The first triode is an NPN triode, and the second triode is a PNP triode.
7. The three-level bus voltage neutral balancing circuit according to claim 5, characterized by The resistance value of the first resistor is greater than that of the third resistor and the fourth resistor.
8. A power electronic converter, characterized by The three-level bus voltage midpoint balancing circuit comprises any one of claims 1 to 7.