FT-2000-based interface processing module

Abstract

The utility model discloses an interface processing module based on FT-2000, and relates to the field of avionics systems. Based on an FT2000-4 processor + FPGA architecture, the avionics network bus access board supports an FC network daughter card, a TSN network daughter card and a lossless network daughter card, realizes the function that one board card supports different avionics network bus access, and can solve the problem of different avionics network bus access. And meanwhile, the module adopts national devices, so that the product safety is high, and the autonomous controllability is strong.

Description

TECHNICAL FIELD

[0001] The utility model relates to the field of avionics system, concretely relates to interface processing module based on FT-2000. BACKGROUND

[0002] The statements in this section merely provide background information related to the present disclosure and can not constitute the prior art.

[0003] In the existing avionics system technology, the avionics system has experienced the development process from the discrete type, the combined type to the integrated modular (IMA). With the increasing complexity of avionics system functions and the improvement of performance requirements, high-speed, high-reliability communication technologies such as time-sensitive network (TSN), fiber channel network (FC) and lossless Ethernet have been widely applied in avionics system. However, different avionics projects may use different avionics buses, which requires each sub-device in the avionics system to access the avionics network through a specific interface processing module to ensure the intercommunication of the device and the avionics network.

[0004] In the existing avionics system design, the interface processing module undertakes important functions such as protocol conversion, signal conditioning and clock synchronization. However, due to the diversity of avionics bus standards, different interface processing modules need to be equipped between different projects, which undoubtedly increases the complexity and cost of system design. In addition, the existing avionics system often lacks sufficient compatibility and foresight in dealing with possible future bus standards. Therefore, how to realize the universality and modular design of the interface processing module while ensuring the high performance and high reliability of the avionics system has become a problem to be solved in the current field of avionics technology. UTILITY MODEL CONTENTS

[0005] The utility model aims at: in view of the problems in the prior art, provide interface processing module based on FT-2000, based on FT2000-4 processor + FPGA architecture, support FC network daughter card, TSN network daughter card and lossless network daughter card, realize a board card supports different avionics network bus access function, can solve the problem of different avionics network bus access, and the module uses the domestic device, and the product safety is high, and the self-controlling property is strong.

[0006] The technical scheme of the utility model is as follows:

[0007] The interface processing module based on FT-2000 comprises: an FPGA module, a CPU module, an FC\TSN\lossless Ethernet daughter card module; the FPGA module communicates with the CPU module, an optical fiber connector and a VPX connector;

[0008] The FC\TSN\lossless Ethernet daughter card module communicates with the optical fiber connector, the FPGA module and the CPU module.

[0009] The CPU module is used for completing FC protocol conversion processing, the FPGA module is used for receiving image data and external interface control, and the FC\TSN\lossless Ethernet subcard module completes communication with an avionics system.

[0010] Further, the CPU module comprises an FT2000 / 4 processor, a Nor Flash, a DDR4, an SSD, a debugging network port and a debugging serial port.

[0011] Further, the FPGA module comprises a JFM7V690T36 processor, a configuration Flash, a DDR3, a storage FLASH and a debugging serial port.

[0012] Further, the Nor Flash, the DDR4 and the SSD are connected with the FT2000 / 4 processor.

[0013] The FT2000 / 4 processor is interconnected with the FT2000 / 4 processor through PCIe, GPIO, SPI and UART for data interaction and communication.

[0014] The configuration Flash, the DDR3 and the storage FLASH are connected with the JFM7V690T36 processor.

[0015] Further, the debugging serial port of the CPU module is composed of a UART serial port provided by the FT2000 / 4 processor and an RS232 level conversion chip, and is used for communication with a PC serial port and program downloading during debugging.

[0016] Further, the debugging network port of the CPU module is composed of an RGMII interface provided by the FT2000 / 4 processor and a PHY chip, and is used for communication with a PC network port and program downloading during debugging, and is used as a communication Ethernet port when not used for debugging.

[0017] Further, the JFM7V690T36 processor is connected with a VPX connector through an RS422 receiver, an RS422 driver, an LVDS receiver and an LVDS driver, and is directly connected with the VPX connector through a GTX interface and a GPIO interface.

[0018] Further, the JFM7V690T36 processor is also connected with a fiber connector through an optical module.

[0019] Further, the FC\TSN\lossless Ethernet subcard module is connected with the FT2000 / 4 processor and the JFM7V690T36 processor on one hand, and is connected with the fiber connector through the optical module on the other hand.

[0020] Further, it also comprises a J30JZ connector, the RS232 level conversion chip is connected with the J30JZ connector, and the PHY chip is connected with the J30JZ connector through a gigabit network.

[0021] Compared with the prior art, the utility model has the beneficial effects that:

[0022] 1. The utility model adopts the architecture of CPU+FPGA+expansion daughter card, and has strong expansion capability.

[0023] 2. The utility model can insert FC\TSN\lossless Ethernet daughter card, communicate with avionics network, access avionics network, realize that one board card supports different avionics network bus access functions, and can solve the problem of different avionics network bus access. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 It is an interface processing module function block diagram based on FT-2000;

[0025] Figure 2 It is a CPU module function block diagram;

[0026] Figure 3 It is a FPGA module function block diagram. DETAILED DESCRIPTION

[0027] It should be noted that the relational terms herein such as first and second and the like are used solely to distinguish one from another entity or action without necessarily requiring or implying such entity or action are in any specific sequence, manner or jection. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the a single element.

[0028] The features and performances of the utility model will be further described in detail in combination with the embodiments.

[0029] Embodiment one

[0030] Please refer to Figures 1-3, the interface processing module based on FT-2000, including: FPGA module, CPU module, FC\TSN\lossless Ethernet sub-card module; Specifically, it also includes external interface and other power supply, clock and control logic and other auxiliary circuits, plus the necessary driver program of FPGA module and CPU module and the control logic in the board, to form a complete, integrated control hardware platform, providing for customers to use, specifically as shown in Figure 1 ;

[0031] The FPGA module communicates with the CPU module, fiber connector and VPX connector;

[0032] The FC\TSN\lossless Ethernet sub-card module communicates with the fiber connector, FPGA module and CPU module;

[0033] The CPU module is mainly used for completing FC protocol conversion processing, the FPGA module is mainly used for receiving image data and external interface control, and the FC\TSN\lossless Ethernet sub-card module completes communication with the avionics system.

[0034] In the embodiment, specifically, the CPU module includes: FT2000 / 4 processor, Nor Flash, DDR4, SSD, debugging network port and debugging serial port;

[0035] It should be noted that in the embodiment, the models of Nor Flash, DDR4 and SSD are as shown in Figure 2 ; Specifically, taking FT2000 / 4 processor (CPU chip) as the core, cooperating with peripheral clock, reset, DDR4, FLASH, SSD, debugging network port and debugging serial port, a control platform is provided for the whole module;

[0036] Among them, DDR4 is a large-capacity external memory of CPU, which enables CPU to meet the data operation storage and data exchange, and two groups of 4 pieces of DDR4 are externally connected to CPU, and the total capacity of each group is 32 Gb;

[0037] Nor FLASH reads out CPU configuration data from the configuration chip when powered on, and automatically loads it into the CPU chip, and then the CPU chip can start running, and the design capacity is 1 Gb;

[0038] SSD is composed of NVMe OSSD solid state storage chip, and is mainly used for large-capacity data storage, and the design capacity is 128 GB;

[0039] The debugging serial port of the CPU module is composed of the UART serial port provided by the FT2000 / 4 processor and the RS232 level conversion chip, and is used for communication and program downloading with the PC serial port during debugging;

[0040] The debugging network interface of the CPU module is formed by the RGMII interface provided by the FT2000 / 4 processor and the PHY chip, and is used for communication with the PC network interface and program downloading during debugging, and is used as a communication Ethernet interface during non-debugging.

[0041] In the embodiment, the J30JZ connector is further used for CPU online debugging and program downloading, the RS232 level conversion chip is connected with the J30JZ connector, and the PHY chip is connected with the J30JZ connector through a gigabit network.

[0042] In the embodiment, specifically, the FPGA module comprises a JFM7V690T36 processor, a configuration Flash, a DDR3, a storage FLASH and a debugging serial port. Figure 3 It is to be noted that in the embodiment, the types of the configuration Flash, the DDR3 and the storage FLASH are as shown in the table.

[0043] In the embodiment, specifically, the Nor Flash, the DDR4 and the SSD are connected with the FT2000 / 4 processor.

[0044] The FT2000 / 4 processor is interconnected with the FT2000 / 4 processor through PCIe, GPIO, SPI and UART for data interaction and communication.

[0045] The configuration Flash, the DDR3 and the storage FLASH are connected with the JFM7V690T36 processor.

[0046] In the embodiment, specifically, the JFM7V690T36 processor is connected with the VPX connector through an RS422 receiver, an RS422 driver, an LVDS receiver and an LVDS driver, and is directly connected with the VPX connector through a GTX interface and a GPIO interface.

[0047] In the embodiment, specifically, the JFM7V690T36 processor is further connected with the fiber connector through an optical module.

[0048] In the embodiment, specifically, the FC\TSN\lossless Ethernet subcard module is connected with the FT2000 / 4 processor and the JFM7V690T36 processor on one hand, and is connected with the fiber connector through an optical module on the other hand.

[0049] The above embodiments only express the specific implementation of the present application, which is described in detail and specifically, but cannot be understood as a limitation on the protection scope of the present application. It should be pointed out that for ordinary skilled persons in the art, without departing from the technical concept of the present application, a number of modifications and improvements can be made, which all belong to the protection scope of the present application.

[0050] This Background section is intended to provide a general overview of the context of the application, the work of the current named inventors, the work of others in the field, and the work of the current named inventors to the extent described in this Background section, and to the extent that such descriptions have not been previously published, are neither explicitly nor implicitly admitted to be prior art by the present application.

Claims

1. An interface processing module based on FT-2000, characterized by, It comprises: FPGA module, CPU module, FC\TSN\lossless Ethernet sub-card module; The FPGA module communicates with the CPU module, fiber connector and VPX connector; The FC\TSN\lossless Ethernet sub-card module communicates with the fiber connector, FPGA module and CPU module; The CPU module is used for completing FC protocol conversion processing, the FPGA module is used for receiving image data and external interface control, and the FC\TSN\lossless Ethernet sub-card module completes communication with avionics system.

2. The FT-2000 based interface processing module of claim 1, wherein, The CPU module comprises FT2000 / 4 processor, Nor Flash, DDR4, SSD, debugging network port and debugging serial port.

3. The FT-2000 based interface processing module of claim 2, wherein, The FPGA module comprises JFM7V690T36 processor, configuration Flash, DDR3, storage FLASH and debugging serial port.

4. The FT-2000 based interface processing module of claim 3, wherein, The Nor Flash, DDR4 and SSD are connected with the FT2000 / 4 processor; The FT2000 / 4 processor is interconnected with the FT2000 / 4 processor through PCIe, GPIO, SPI and UART for data interaction and communication; The configuration Flash, DDR3 and storage FLASH are connected with the JFM7V690T36 processor.

5. The FT-2000 based interface processing module of claim 4, wherein, The debugging serial port of the CPU module is composed of UART serial port provided by the FT2000 / 4 processor and RS232 level conversion chip, and is used for communication and program downloading with PC serial port during debugging.

6. The FT-2000 based interface processing module of claim 5, wherein, The debugging network port of the CPU module is composed of RGMII interface provided by the FT2000 / 4 processor and PHY chip, and is used for communication and program downloading with PC network port during debugging.

7. The FT-2000 based interface processing module of claim 6, wherein, The JFM7V690T36 processor is connected with the VPX connector through RS422 receiver, RS422 driver, LVDS receiver and LVDS driver, and is directly connected with the VPX connector through GTX interface and GPIO interface.

8. The FT-2000 based interface processing module of claim 7, wherein, The JFM7V690T36 processor is also connected with the fiber connector through optical module.

9. The FT-2000 based interface processing module of claim 8, wherein, The FC\TSN\lossless Ethernet sub-card module is connected with the FT2000 / 4 processor and JFM7V690T36 processor on one hand, and is connected with the fiber connector through optical module on the other hand.

10. The FT-2000 based interface processing module of claim 9, wherein, It further comprises: The RS232 level conversion chip is connected with the J30JZ connector, and the PHY chip is connected with the J30JZ connector through gigabit network.

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