Anti-crosstalk micro-display light-emitting pixel

Abstract

The utility model discloses an anti-crosstalk micro-display light-emitting pixel, and relates to the technical field of semiconductors. The micro-display light-emitting pixel includes: a driving backplane; the display module is arranged on the driving back plate, the display module comprises a light-emitting unit and a groove structure, the light-emitting unit is conducted with an anode contact in the driving back plate, the groove structure surrounds the light-emitting unit and penetrates through a vertical area where the display module is located, and the display module is arranged on the driving back plate. The trench structure is filled with a metal material, and the light-emitting unit is an inorganic compound semiconductor. Based on the technical scheme provided by the invention, light emitting constraint can be carried out through the through type groove structure, and better optical crosstalk isolation is realized.

Description

[0001] The present application claims priority to the Chinese Patent Application No. 202311840767.0, filed on December 29, 2023, and entitled "Anti-crosstalk micro display light emitting pixel and manufacturing method thereof, and micro display screen", the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0002] The utility model relates to the technical field of semiconductor, especially to a kind of anti-crosstalk micro display light emitting pixels. BACKGROUND

[0003] In the technical field of semiconductor, the crosstalk between micro display light emitting pixels, light emitting distribution has important influence on display quality, the efficiency of coupling into light waveguide, such as the light emitting angle of normal vertical structure Light Emitting Diode (LED) chip is about ±55 °.

[0004] In the related art, black matrix (BM) or micro lens (MicroLens) manufacturing technology is often used to realize the constraint of crosstalk and light emitting distribution between micro display light emitting pixels. In the black matrix scheme, the black matrix is an organic material system, which has insufficient temperature resistance and mechanical strength, and has defects in reliability. In addition, the black matrix absorbs light, which will cause overall brightness loss. In the micro lens scheme, the prepared micro lens belongs to an organic material system, which has insufficient temperature resistance and mechanical strength, and has defects in reliability. In addition, complete optical isolation between pixels cannot be achieved, and when the pixel size continues to shrink, the ±55 ° light emitting angle will appear before entering the micro lens, that is, the problem of adjacent pixel crosstalk will occur.

[0005] Therefore, there is an urgent need to provide a new micro display light emitting pixel preparation scheme that can avoid the above-mentioned defects. SUMMARY

[0006] The utility model aims at providing a kind of anti-crosstalk micro display light emitting pixel, and light emitting constraint is carried out by the groove structure of through type, and better optical crosstalk isolation is realized.

[0007] To achieve the above-mentioned utility model purposes, the utility model provides the following technical solutions:

[0008] On the one hand, an anti-crosstalk micro display light emitting pixel is provided, the micro display light emitting pixel size is in the interval of 0.5um~50um, and the micro display light emitting pixel comprises:

[0009] a driving backplate;

[0010] A display module is arranged on the driving backboard, the display module comprises a light emitting unit and a trench structure, the light emitting unit is in conduction with the anode contact in the driving backboard, the trench structure surrounds the light emitting unit and penetrates the vertical area where the display module is located, the trench structure is filled with metal material, and the light emitting unit is an inorganic compound semiconductor.

[0011] In an alternative embodiment, the display module at least comprises a first display device layer, the first display device layer comprises:

[0012] A first light emitting unit, a first P-type ohmic contact layer in the first light emitting unit is connected with a through hole, the first light emitting unit is in conduction with the anode contact in the driving backboard through the through hole filled with metal material;

[0013] A first insulating layer, the first insulating layer is filled in the outside of the first light emitting unit;

[0014] A first trench structure, the first trench structure penetrates the first insulating layer, one end of the first trench structure is connected with the first N-type ohmic contact layer in the first light emitting unit, and the other end is connected with the upper surface of the driving backboard.

[0015] In an alternative embodiment, the display module further comprises a second display device layer arranged on the first display device layer, the second display device layer comprises:

[0016] A second insulating layer, the second insulating layer is filled in the side of the first display device layer away from the driving backboard;

[0017] A second trench structure, the second trench structure penetrates the second insulating layer and the first N-type ohmic contact layer, one end of the second trench structure is connected with the first trench structure.

[0018] In an alternative embodiment, the width of the second trench structure is smaller than the width of the first trench structure.

[0019] In an alternative embodiment, the display module at least comprises a third display device layer, the third display device layer comprises:

[0020] A second light emitting unit, a second P-type ohmic contact layer in the second light emitting unit has a bonding layer between the second P-type ohmic contact layer and the driving backboard, the second light emitting unit is in conduction with the anode contact in the driving backboard through the bonding layer, and a surface of a second N-type ohmic contact layer in the second light emitting unit is covered with a part of a cathode layer;

[0021] a third insulating layer filling the trench structure formed outside the second light emitting unit;

[0022] a third trench structure penetrating the third insulating layer, one end of the third trench structure being connected with the cathode layer.

[0023] In an alternative embodiment, the cathode layer comprises: a middle cathode layer and two side cathode layers on both sides, the middle cathode layer being arranged on the surface of the second N-type ohmic contact layer;

[0024] The sidewall of the second light emitting unit and the surface of the driving back plate are covered with a passivation layer, and the side cathode layer is arranged on the surface of the passivation layer.

[0025] Or,

[0026] The side cathode layer is arranged on the surface of the third insulating layer away from the driving back plate.

[0027] In an alternative embodiment, when the side cathode layer is arranged on the surface of the third insulating layer away from the driving back plate, the sidewall of the second light emitting unit and the surface of the driving back plate are further covered with a passivation layer.

[0028] In an alternative embodiment, the trench structure is inside the display module;

[0029] Or,

[0030] The trench structure is outside the periphery of the display module.

[0031] In an alternative embodiment, the trench structure corresponds to a trench pattern when viewed from above, comprising:

[0032] One of a circle, a rectangle, a hexagon, and an octagon.

[0033] In an alternative embodiment, the display module further comprises: a microlens;

[0034] The microlens is arranged on the light emitting unit and the trench structure.

[0035] In an alternative embodiment, the metal material filled in the trench structure comprises:

[0036] Aluminum, nickel vanadium, and copper deposited vertically in sequence;

[0037] Or, aluminum deposited;

[0038] Or, tungsten deposited.

[0039] In a possible implementation, the overall depth of the trench structure is not less than the overall depth of the light emitting unit.

[0040] In a possible implementation, the width of the trench structure is in the range of 90nm-5um.

[0041] In a possible implementation, the depth of the trench structure is in the range of 0.4um-5um.

[0042] In a possible implementation, the angle of the trench structure gradually increases in the direction away from the driving back plate.

[0043] Compared with the prior art, the utility model has the following beneficial effects:

[0044] By etching the trench structure in the display module of the micro display light emitting pixel and filling the metal material in the trench structure, better optical crosstalk isolation is realized through the through-type trench structure, the light emitting angle can be constrained by the depth of the trench structure, and the design process of the trench structure is relatively mature, and the yield is guaranteed.

[0045] Further, the light emitting unit and the trench structure in the display module belong to an inorganic material system, and have good temperature resistance, mechanical strength and reliability.

[0046] Further, the back trench structure design idea, the back trench structure design idea and the front and back trench structure combination design idea are provided, and different schemes can be freely selected according to needs. BRIEF DESCRIPTION OF DRAWINGS

[0047] Figure 1 is a schematic diagram of the optical crosstalk phenomenon corresponding to the related art;

[0048] Figure 2 is a structure schematic diagram of a micro display light emitting pixel provided in the embodiment of the application;

[0049] Figure 3 is a circuit schematic diagram of a driving circuit provided in the embodiment of the application;

[0050] Figure 4 is a schematic diagram of the optical crosstalk phenomenon corresponding to the embodiment of the application;

[0051] Figure 5 is a structure schematic diagram of a micro display light emitting pixel provided in the embodiment of the application;

[0052] Figure 6 is a schematic diagram of a trench pattern provided in the embodiment of the application;

[0053] Figure 7is a structure schematic diagram of a micro display light emitting pixel under a front groove structure design idea provided in an embodiment of the present application;

[0054] Figure 8 is a structure schematic diagram of a micro display light emitting pixel with a microlens provided in an embodiment of the present application;

[0055] Figure 9 is a structure schematic diagram of a micro display light emitting pixel with a microlens provided in an embodiment of the present application;

[0056] Figure 10 is a structure schematic diagram of a micro display light emitting pixel under a back groove structure design idea provided in an embodiment of the present application;

[0057] Figure 11 is a structure schematic diagram of a micro display light emitting pixel under a back groove structure design idea provided in an embodiment of the present application;

[0058] Figure 12 is a structure schematic diagram of a micro display light emitting pixel under a back groove structure design idea provided in an embodiment of the present application;

[0059] Figure 13 is a structure schematic diagram of a micro display light emitting pixel under a back groove structure design idea provided in an embodiment of the present application;

[0060] Figure 14 is a schematic diagram of light emission constraint provided in an embodiment of the present application;

[0061] Figure 15 is a schematic diagram of light emission constraint provided in an embodiment of the present application;

[0062] Figure 16 is a structure schematic diagram of a micro display light emitting pixel with a microlens provided in an embodiment of the present application;

[0063] Figure 17 is a structure schematic diagram of a micro display light emitting pixel with a microlens provided in an embodiment of the present application;

[0064] Figure 18 is a structure schematic diagram of a micro display light emitting pixel under a front and back groove structure combined design idea provided in an embodiment of the present application;

[0065] Figure 19 is a structure schematic diagram of a micro display light emitting pixel with a microlens provided in an embodiment of the present application;

[0066] Figure 20 is a method flow chart of a preparation method of a micro display light emitting pixel provided in an embodiment of the present application;

[0067] Figure 21 FIG. 1 is a structural diagram of a driving backplane provided in an embodiment of the present application;

[0068] Figure 22 FIG. 2 is a structural diagram of an inorganic compound semiconductor provided in an embodiment of the present application;

[0069] Figure 23 FIG. 3 is a structural diagram of the inorganic compound semiconductor after step etching provided in an embodiment of the present application;

[0070] Figure 24 FIG. 4 is a structural diagram of the inorganic compound semiconductor after trench structure preparation provided in an embodiment of the present application;

[0071] Figure 25 FIG. 5 is a structural diagram of the inorganic compound semiconductor after metal filling provided in an embodiment of the present application;

[0072] Figure 26 FIG. 6 is a structural diagram of the inorganic compound semiconductor combined with the driving backplane provided in an embodiment of the present application;

[0073] Figure 27 FIG. 7 is a structural diagram of the micro display light emitting pixel after surface roughening provided in an embodiment of the present application;

[0074] Figure 28 FIG. 8 is a structural diagram of the inorganic compound semiconductor after step etching provided in an embodiment of the present application;

[0075] Figure 29 FIG. 9 is a structural diagram of the inorganic compound semiconductor with a bonding layer prepared provided in an embodiment of the present application;

[0076] Figure 30 FIG. 10 is a structural diagram of the driving backplane with a bonding layer prepared provided in an embodiment of the present application;

[0077] Figure 31 FIG. 11 is a structural diagram of the inorganic compound semiconductor combined with the driving backplane provided in an embodiment of the present application;

[0078] Figure 32 FIG. 12 is a structural diagram of the bonding structure after step etching provided in an embodiment of the present application;

[0079] Figure 33 FIG. 13 is a structural diagram of the second light emitting unit covered with a passivation layer and a cathode layer provided in an embodiment of the present application;

[0080] Figure 34 FIG. 14 is a structural diagram of the bonding structure after step filling provided in an embodiment of the present application;

[0081] Figure 35 is a structural schematic diagram of a bonding structure after trench structure preparation provided in an embodiment of the present application;

[0082] Figure 36 is a structural schematic diagram of a bonding structure after step filling provided in an embodiment of the present application;

[0083] Figure 37 is a structural schematic diagram of a bonding structure after trench structure preparation provided in an embodiment of the present application.

[0084] Reference signs:

[0085] 10 - driving back plate, 11 - anode contact, 20 - display module, 21 - first display device layer, 22 - second display device layer, 23 - third display device layer, 30 - light emitting unit, 31 - first light emitting unit, 311 - first P-type ohmic contact layer, 312 - through hole, 313 - first N-type ohmic contact layer, 316 - first substrate, 317 - first active quantum well layer, 32 - second light emitting unit, 321 - second P-type ohmic contact layer, 322 - bonding layer, 323 - second N-type ohmic contact layer, 324 - second substrate, 325 - second active quantum well layer, 40 - trench structure, 41 - first trench structure, 42 - second trench structure, 43 - third trench structure, 50 - microlens, 61 - first insulating layer, 62 - second insulating layer, 63 - third insulating layer, 70 - cathode layer, 71 - intermediate cathode layer, 72 - side cathode layer, 80 - passivation layer. DETAILED DESCRIPTION

[0086] In order to make the purpose, technical scheme and advantages of the present application more clear, the technical scheme in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by the ordinary skilled in the art without creative labor are within the protection scope of the present application.

[0087] In the description of the utility model, it is necessary to understand that the orientation or positional relationship indicated by the terms "vertical", "upper", "lower", "top", "side", "inner", "outer" and the like is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the utility model. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can be explicitly or implicitly included one or more features. In the description of the utility model, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0088] In the description of the utility model, it should be explained that, unless otherwise specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be connected inside two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific situation.

[0089] The traditional anti-crosstalk design scheme of micro display light emitting pixel has many defects, such as:

[0090] For the anti-crosstalk design scheme of preparing microlens, the microlens prepared by the scheme belongs to an organic material system, which has insufficient temperature resistance and mechanical strength, and has defects in reliability, and complete optical isolation between pixels cannot be achieved. When the pixel size continues to be microscaled, when the light emitting angle is ± 55°, the problem of adjacent pixel crosstalk before entering the microlens will occur. For example, Figure 1 As an example, taking a 4um pixel size, 2um light emitting unit GaN Micro LED vertical structure device as an example, its vertical structure has the smallest light emitting angle ± 55° of conventional LED device, which is lower than the light emitting angle ± 60~70° of horizontal structure and flip chip structure LED device. When the light emitting angle is ± 55°, the optical crosstalk between adjacent pixels cannot be completely isolated, because the light emitted by the active light emitting area will pass through the entire light emitting unit to become a multi-surface out of the relationship, and the actual light angle will be larger than Figure 1 More complex, because the light is refracted and reflected multiple times in the light emitting unit, the optical crosstalk between pixels will be more serious.

[0091] For the anti-crosstalk design scheme using a black matrix, the black matrix blocks light through the light absorption characteristics of the black matrix material to achieve optical crosstalk isolation between pixels. The black matrix is an organic material system, which has insufficient temperature resistance and mechanical strength, and has defects in reliability. In addition, the black matrix absorbs light, which will cause overall brightness loss. In some schemes, a similar trapezoidal structure to the black matrix is formed by metal patterning deposition to avoid reliability problems. However, neither the black matrix nor the metal patterning scheme can adapt to very small pixel sizes. For example, when the pixel size is reduced to below 5um, the resolution of the black matrix and the photoresist mask stripping problem of the metal patterning scheme both pose challenges to yield and mass production capability.

[0092] To avoid the above problems, in the embodiments of the present application, a technical scheme is proposed for light emission constraint through a through groove structure to achieve better optical crosstalk isolation.

[0093] It can be understood that the groove structure in the embodiments of the present application is a technology applied to the field of micro display (Micro-LED), which uses metal material to prepare the groove structure, has the characteristics of optical crosstalk optimization, light emission angle convergence, enhanced electrical transmission function, high temperature resistance, etc., and has great differences from similar structures in traditional large panel displays.

[0094] On the one hand, the similar structure in traditional large panel displays cannot be directly applied to the micro display field. For traditional large panel displays, such as CN110969952A, which is a typical traditional large panel display structure, LED is used as a backlight light source. However, because of the large spacing between each LED lamp bead, the image display has strong graininess, and the brightness distribution is extremely uneven, making the audience feel dazzling. Therefore, a hollow grid structure prepared by methods such as compression molding, printing, and spraying is generally used to place around the LED to constrain the light emission range. After the light is irradiated to the diffusion film, the light is diffused by the diffusion film to achieve a relatively uniform display effect. The function of the hollow grid structure can be used as a common pixel crosstalk isolation means, but in the micro display field, the preparation of the hollow grid and the alignment accuracy with the LED light source cannot be achieved, so other schemes are needed to achieve similar functions in the micro display field.

[0095] On the other hand, the typical traditional large panel display structure shown in CN110969952A, the light-shielding frame therein can also play the role of optical crosstalk optimization, but compared with the groove structure in the present application, the main differences include:

[0096] (1) The pixel pitch and pixel size in CN110969952A are generally large, basically in the order of hundreds of microns or even several millimeters, and the light shielding frame line width requirement for pixel inter-shielding is not high, and the light shielding frame is mostly organic material, such as black glue, etc., and the temperature resistance is generally around 200°C or below; the trench structure in the present application is applied in the micro display field, the pixel pitch and pixel size are generally in the order of microns to tens of microns, and the trench structure is a metal material, and the temperature resistance is very high;

[0097] (2) Due to the difference in the implementation material, the light shielding frame in CN110969952A only has an optical function, while the trench structure in the present application also has the function of enhancing electrical transmission, better extending the current distribution, and forming good contact and uniform current distribution with the cathode or cathode-related connection of the light-emitting unit.

[0098] Next, the specific structure of the micro display light-emitting pixel proposed in the present application will be described.

[0099] The present application embodiment provides a micro display light-emitting pixel (hereinafter referred to as a micro display light-emitting pixel) for preventing crosstalk, and the size of the micro display light-emitting pixel is in the range of 0.5um-50um, as shown in the following formula (1): Figure 2 The micro display light-emitting pixel includes:

[0100] A driving backboard 10; a display module 20 is arranged on the driving backboard 10, and the display module 20 includes a light-emitting unit 30 and a trench structure 40, the light-emitting unit 30 is in conduction with an anode contact in the driving backboard 10, the trench structure 40 surrounds the light-emitting unit 30 and penetrates the vertical area where the display module 20 is located, the trench structure 40 is filled with a metal material, and the light-emitting unit 30 is an inorganic compound semiconductor.

[0101] The driving backboard 10 is a thin film transistor (TFT), a low-temperature polysilicon (LTPS), a CMOS integrated circuit, a high mobility transistor (HEMT), or a combination of one or more of the above. Specifically, the driving backboard 10 is provided with a driving circuit, and the driving circuit is provided with at least one anode contact 11. As an example, the circuit structure of the driving circuit is as shown in the following formula (2): Figure 3 It should be noted that the driving circuit in the present embodiment is an active driving circuit, and the circuit diagram shown in the present embodiment is only a simple schematic diagram. The driving circuit can include an active, passive or semi-passive control circuit. All anodes included in the driving circuit can be linearly arranged or arrayed, and any anode contact 11 can be located in the middle or at the edge of the driving backboard 10, which is not limited in the present embodiment.

[0102] The display module 20 is designed with a through groove structure 40, which surrounds the light emitting unit 30 in the display module 20 and is filled with a metal material, and the light emitting unit 30 is an inorganic compound semiconductor, and the overall display module 20 is a pure inorganic structure, which has high reliability. For example, as shown in Figure 4 The design of the groove structure 40 (i.e. the TI structure in the figure) can constrain the light emitting angle, thereby preventing optical crosstalk between adjacent micro display light emitting pixels.

[0103] Further, as shown in Figure 5 The display module 20 also includes a microlens 50, which is arranged on the light emitting unit 30 and the groove structure 40. The top of the display module 20 can be provided with a microlens 50, which first performs basic light emission constraint through the groove structure 40, and then uses the microlens 50 to further isolate the optical crosstalk of the light emitted by the light emitting unit 30. The material of the microlens 50 can be a compound semiconductor, and can be a dielectric material such as silicon oxide and silicon nitride deposited later.

[0104] Further, the light emitting unit 30 in the display module 20 is an inorganic compound semiconductor, which is usually a wafer or a region of appropriate size cut from the wafer. Taking the wafer as an example, the wafer refers to a compound formed by two or more elements with a certain atomic ratio, and has certain semiconductor properties such as a certain band gap and energy band structure. Specifically, it can be a crystalline inorganic compound (such as III-V, II-VI compound semiconductor), and then a layer for electrical contact is prepared on the surface of the compound, and the compound can be combined arbitrarily in subsequent stacking. In this embodiment, the light emitting unit 30 involves ultraviolet light, green light, blue light AlGaN, InGaN ternary material system, and its substrate material can be GaN, Si, SiC, sapphire, etc., as well as red light, infrared and other long waves, wherein the red light can be InGaN ternary material system or GaAs substrate four-element AlGaInP red light compound LED epitaxy, and the infrared mainly includes InP, GaAs, AlGaAs material system compound epitaxy. In addition, this embodiment does not limit the corresponding shape of the light emitting unit 30, which can be circular or other polygons such as rectangular, hexagonal, octagonal, etc. In addition, the etching depth of the light emitting unit 30 can be in the range of 0.3um to 3um.

[0105] In an embodiment, when the light emitting unit 30 includes a red light compound epitaxy, the red light compound epitaxy can be a four-element AlGaInP or a ternary InGaN material, which can be based on GaAs, Si, sapphire, Ga2O3 substrate, and the following Table 1 is a brief structure example, wherein P-GaAs can be replaced by P-GaP and P-AlGaAs:

[0106] Table 1

[0107] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaAs P-type Ohmic Contact Layer P-GaN Active Quantum Well Layer AIGaInP Active Quantum Well Layer InGaN & GaN N-type Ohmic Contact Layer N-GaAs N-type Ohmic Contact Layer N-GaN Etch Stop Layer N-AIGaInP Etch Stop Layer AIN & GaN Substrate N-GaAs Substrate Si

[0108] In one embodiment, when the light emitting unit 30 includes a blue light, green light compound semiconductor, the blue light, green light compound semiconductor is an InGaN ternary compound, which can be based on Si, Sapphire, Ga2O3, etc. substrates, and the structure thereof is shown in Table 2 as follows:

[0109] Table 2

[0110] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaN P-type Ohmic Contact Layer P-GaN Active Quantum Well Layer InGaN & GaN Active Quantum Well Layer InGaN & GaN N-type Ohmic Contact Layer N-GaN N-type Ohmic Contact Layer N-GaN Etch Stop Layer InGaN Etch Stop Layer AIN & GaN Substrate GaN Substrate Si

[0111] In one embodiment, when the light emitting unit 30 includes an ultraviolet light compound semiconductor, the ultraviolet light compound semiconductor is an AlGaN ternary compound, which can be based on Si, Sapphire, SiC, etc. substrates, and the structure thereof is shown in Table 3 as follows:

[0112] Table 3

[0113] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaN P-type Ohmic Contact Layer P-GaN Active Quantum Well Layer AIGaN & InGaN Active Quantum Well Layer AIGaN & InGaN N-type Ohmic Contact Layer N-GaN N-type Ohmic Contact Layer N-GaN Buffer Layer AIN & AIGaN Buffer Layer AIN & GaN Substrate Si Substrate Sapphire

[0114] In one embodiment, when the light emitting unit 30 includes an infrared light compound semiconductor, the infrared light compound semiconductor is an AlGaAs ternary compound, which can be based on GaAs, InP, etc. substrates, and the structure thereof is shown in Table 4 as follows:

[0115] Table 4

[0116] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaAs P-type Ohmic Contact Layer P-AIGaAs Active Quantum Well Layer AIGaAs & GaAs Active Quantum Well Layer AIGaAs & GaAs N-type Ohmic Contact Layer N-GaAs N-type Ohmic Contact Layer N-AIGaAs Etch Stop Layer AIGaInP Etch Stop Layer AIGaInP Substrate GaAs Substrate GaAs

[0117] As shown in Tables 1 to 4 above, by selecting different compound materials to prepare devices, light emitting devices of different wavelengths can be obtained, and according to different compound characteristics, different materials can be selected as P-type and N-type ohmic contact layer materials. For example, the P-type ohmic contact layer can be an ITO transparent conductive film, and the N-type ohmic contact layer can be a metal In + ITO transparent conductive film, which can be used as a general ohmic contact material. In particular, the P-type ohmic contact layer of GaN can be a single layer or a stack of Ni, Au, Ag, Al, etc. metals, and the N-type ohmic contact layer can be a single layer or a stack of Ti, Cr, Ni, Al, etc. metals. The P-type ohmic contact layer of GaAs can be a single layer, alloy or stack of Au, Be, Zn, etc. metals, and the N-type ohmic contact layer can be a single layer, alloy or stack of Au, Ge, Ni, Pt, In, etc. metals.

[0118] Further, the metal material filled in the trench structure 40 includes: aluminum (Al), nickel-vanadium (NiV), and copper (Cu) deposited vertically in sequence; or, aluminum deposited; or, tungsten (W) deposited. In the trench structure 40, the metal material filled can be seed layer Al, NiV deposited by plasma vapor deposition, and then Cu electroplated, wherein Al can be used as a reflective metal to improve brightness, and Al can also be used as N-type ohmic contact metal etched to N-type ohmic contact layer to realize N connection, NiV is used as an adhesion layer and a barrier layer to adhere Al and Cu and to block migration of Al, and Cu is used for electroplating. Further, NiV can be replaced by any one of Ni, Ti, and TiN; the metal material can also be metal such as Al or W deposited by plasma vapor deposition at normal temperature or thermal deposition. Further, TIN metal deposition can be performed before Al or W deposition. It can be understood that, in addition to the above types of metal materials, the seed layer in the trench structure 40 can also be a single layer or multiple layers of metals such as Ti, Ni, Cr, Au, Ge, Al, Pt, Ta, W, or nitrides thereof, and the present application does not specifically limit this. Further, the trench pattern corresponding to the trench structure 40 in a top view includes one of a circle, a rectangle, a hexagon, and an octagon. In a top view of the micro display light emitting pixel, the trench pattern surrounding the light emitting unit can be a circle, a rectangle, a hexagon, an octagon, etc., and the present embodiment does not limit this.

[0119] Further, the trench structures 40 corresponding to adjacent light emitting units are connected to each other; or, the trench structures 40 corresponding to adjacent light emitting units are isolated from each other by an insulating medium. The trench structure 40 can realize a pattern as shown in FIG. 2A connecting the pixels, or realize a pattern as shown in FIG. 2B inside the pixel, Figure 6 Figure 6 Figure 6 which is only exemplarily described by taking the circle and the rectangle as examples.

[0120] Further, the overall depth of the trench structure 40 is not less than the overall depth of the light emitting unit 30. When the trench structure is etched, the etching depth corresponding to the trench structure 40 is greater than or equal to the etching depth corresponding to the light emitting unit 30, so that the trench structure 40 can constrain the light emitting angle of the light emitting unit 30 by a sufficient depth. In addition, the depth of the trench structure is in the range of 0.4 um to 5 um.

[0121] Further, the width of the trench structure 40 is in the range of 90 nm to 5 um. By designing the width of the trench structure 40 in a certain range, the trench structure 40 can not only avoid occupying too much horizontal space of the pixel, but also can guarantee a sufficient thickness to prevent crosstalk.

[0122] ​​Further, the angle of the groove structure 40 gradually increases in the direction away from the driving backplate 10. The groove structure 40 formed can be achieved by multiple angles from the bottom to the top, such as by multiple angles gradually increasing in the direction away from the driving backplate 10, so as to strictly constrain the light-emitting angle from the bottom first, and then uniformly emit light through the top. In addition, the groove structure 40 from the bottom to the top can also be achieved by one angle. In addition, the above-mentioned angle can be in the interval of 90°±30°, and 90°±10° is optimal. In this application, on the basis of the difference in the sequence of the groove preparation process, three different specific structure design ideas of the micro display light-emitting pixel are provided.

[0123] (1) The micro display light-emitting pixel adopts the front groove structure design idea. In the preparation process corresponding to this structure design, the groove structure 40 is prepared in the display module 20 first, and then the display module 20 is combined with the driving backplate 10.

[0124] Specifically, as shown in Figure 7 , the display module 20 at least includes: a first display device layer 21; the first display device layer 21 includes: a first light-emitting unit 31, a through hole 312 connected to the first P-type ohmic contact layer 311 in the first light-emitting unit 31, the first light-emitting unit 31 being in conduction with the anode contact in the driving backplate 10 through the through hole 312 filled with metal material; a first insulating layer 61, the first insulating layer 61 being filled and formed outside the first light-emitting unit 31; a first groove structure 41, the first groove structure 41 penetrating through the first insulating layer 61, one end of the first groove structure 41 being connected to the first N-type ohmic contact layer 313 in the first light-emitting unit 31, and the other end being connected to the upper surface of the driving backplate 10, extending to the display area periphery from the plane and being connected to the periphery common cathode of the driving backplate 10. The metal material filled in the through hole 312 can be the same as or different from the metal material filled in the first groove structure 41, such as both using the same deposited Al, NiV, Cu. The first insulating layer 61 can be a single layer or a stack of dielectric layers such as silicon oxide, silicon nitride, SIC, SICN, Ti3O5, Ni2O5, etc. The thickness of the first insulating layer 61 and the depth of the first groove structure 41 are generally substantially equal to the thickness of the first light-emitting unit 31, and the depth of the first groove structure 41 is limited by the thickness of the first light-emitting unit 31.

[0125] Further, as shown in Figure 8 , Figure 9 , a microlens 50 can be arranged above the first display device layer 21. For the front groove structure design idea, in an embodiment, as shown in Figure 8 , the microlens 50 is etched without cutting off the first N-type ohmic contact layer 313, and in another embodiment, as shown in Figure 9As shown, the microlens 50 is partially truncated the first N-type ohmic contact layer 313 during etching, realizing N-type contact conduction cathode in partial areas while completely isolating the micro display light emitting pixels.

[0126] (2) The micro display light emitting pixel adopts a back trench structure design idea. In the corresponding preparation process of this structure design, the display module 20 is combined with the driving back plate 10, and then the trench structure 40 is prepared in the display module 20.

[0127] Specifically, as shown in the figure, Figure 10 to Figure 13 The display module 20 at least includes: a third display device layer 23; the third display device layer 23 includes: a second light emitting unit 32, the second P-type ohmic contact layer 321 in the second light emitting unit 32 has a bonding layer 322 between the driving back plate 10, the second light emitting unit 32 is in conduction with the anode contact in the driving back plate 10 through the bonding layer 322, and the surface of the second N-type ohmic contact layer 323 in the second light emitting unit 32 is covered with part of the cathode layer 70; a third insulating layer 63, the third insulating layer 63 is filled and formed outside the second light emitting unit 32; a third trench structure 43, the third trench structure 43 penetrates the third insulating layer 63, and one end of the third trench structure 43 is connected with the cathode layer 70. Among them, the bonding layer 322 can be opaque metal material, such as single layer or multi layer of Au, Sn, Al, Cu, W and other metals, the bonding layer 322 can also be transparent metal oxide material, such as ITO, ZnO and other transparent conductive films. The third insulating layer 63 can be single layer or stack of silicon oxide, silicon nitride, SIC, SICN, Ti3O5, Ni2O5 and other dielectric layers. Among them, the thickness of the third insulating layer 63 and the depth of the third trench structure 43 are greater than or equal to the thickness of the second light emitting unit 32, and the depth of the third trench structure 43 can be set to any value greater than or equal to the thickness of the second light emitting unit 32. For example, based on the structure as shown in the figure, Figure 10 When the depth of the third trench structure 43 is equal to the height of the second light emitting unit 32, as shown in the figure, Figure 14 The light emitting angle is reduced from the initial ± 55° to ± 45°; based on the structure as shown in the figure, Figure 11 When the depth of the third trench structure 43 is 2 times the height of the second light emitting unit 32 or more, as shown in the figure, Figure 15 The light emitting angle is reduced from the initial ± 55° to ± 17°.

[0128] Further, the cathode layer 70 includes: an intermediate cathode layer 71 and two side cathode layers 72 on both sides, and the intermediate cathode layer 71 is covered on the surface of the second N-type ohmic contact layer 323.

[0129] In one possible design, as shown in the figure, Figure 10 , Figure 11As shown, the sidewall of the second light emitting unit 32 and the surface of the driving backplate 10 are covered with a passivation layer 80, and the side cathode layer 72 is covered on the surface of the passivation layer 80. The passivation layer 80 can be a single layer or a stack of layers of dielectric layers such as Al2O3, SiO2, Si3N4, etc. The second light emitting unit 32 and the driving backplate 10 are insulated and protected by the passivation layer 80, and the side cathode layer 72 covered on the surface of the passivation layer 80 and the intermediate cathode layer 71 covered on the surface of the second N-type ohmic contact layer 323 are connected to the common cathode.

[0130] In another possible design, as shown in FIG. 6, the side cathode layer 72 is covered on the surface of the third insulating layer 63 away from the driving backplate 10. The side cathode layer 72 covered on the surface of the third insulating layer 63 and the intermediate cathode layer 71 covered on the surface of the second N-type ohmic contact layer 323 are connected to the common cathode. Figure 12

[0131] Further, as shown in FIG. 6, in the case where the side cathode layer 72 is covered on the surface of the third insulating layer 63 away from the driving backplate 10, the sidewall of the second light emitting unit 32 and the surface of the driving backplate 10 are further covered with a passivation layer 80. The passivation layer 80 can be a single layer or a stack of layers of dielectric layers such as Al2O3, SiO2, Si3N4, etc. That is, the third insulating layer 63 can be directly connected to the surface of the driving backplate 10, as shown in FIG. 6, without a passivation layer 80 between the third insulating layer 63 and the driving backplate 10, and the dielectric layer on the driving backplate 10 is used to withstand over-etching; or a passivation layer 80 can be provided between the third insulating layer 63 and the driving backplate 10, as shown in FIG. 6, and the passivation layer 80 is used as an etching stop layer to insulate and protect the second light emitting unit 32 and the driving backplate 10. Figure 13 Figure 12 Figure 13 Further, a microlens 50 can be provided on the third display device layer 23. For example, as shown in FIG. 7, the microlens 50 is provided on the corresponding structure of FIG. 6.

[0132] Further, a microlens 50 can be provided on the third display device layer 23. For example, as shown in FIG. 7, the microlens 50 is provided on the corresponding structure of FIG. 6. Figure 16 Figure 11 Figure 17 Figure 13

[0133] (3) The micro display light emitting pixel adopts a front and back trench structure combination design idea. In the corresponding preparation process of the structure design, a front trench structure design idea is first adopted to prepare a group of trench structures 40 in a display device layer in the display module 20, and then the display module 20 is combined with the driving backplate 10. Subsequently, a back trench structure design idea is further adopted to add another display device layer in the display module 20 to prepare another group of trench structures 40 for the combined device. ​​​​​​​

[0134] Specifically, as shown in Figure 18 On the basis of the first display device layer 21, the display module 20 further includes: a second display device layer 22 disposed on the first display device layer 21; the second display device layer 22 includes: a second insulating layer 62, the second insulating layer 62 fills the side of the first display device layer 21 away from the driving backboard 10; a second trench structure 42, the second trench structure 42 penetrates the second insulating layer 62 and the first N-type ohmic contact layer 313, one end of the second trench structure 42 is connected with the first trench structure 41. Wherein, the second insulating layer 62 can be a single layer or a stack of dielectric layers such as silicon oxide, silicon nitride, SIC, SICN, Ti3O5, Ni2O5. Wherein, the thickness of the second insulating layer 62, the depth of the second trench structure 42 and the thickness of the first light emitting unit 31 are not related, and the depth of the second trench structure 42 can be freely set.

[0135] Further, the width of the second trench structure 42 is smaller than the width of the first trench structure 41, on the one hand, it can reserve the photolithography alignment deviation, reduce the process difficulty, on the other hand, it can guarantee that the first trench structure 41 is connected with the first N-type ohmic contact layer 313 to realize the cathode communication. Typically, the second trench structure 42 on the back has 50% size of the first trench structure 41 on the front.

[0136] Further, as shown in Figure 19 A microlens 50 can be disposed on the second display device layer 22.

[0137] In summary, the micro display light emitting pixel provided by the embodiment of the application can realize better optical crosstalk isolation through etching a trench structure in the display module of the micro display light emitting pixel and filling a metal material in the trench structure, can constrain the light emitting angle through the depth of the trench structure, and the design process of the trench structure is relatively mature, and the yield is guaranteed.

[0138] Further, the light emitting unit and the trench structure in the display module belong to an inorganic material system, and have good temperature resistance, mechanical strength and reliability.

[0139] Further, the back trench structure design idea, the back trench structure design idea, and the front and back trench structure combination design idea are provided, and different schemes can be freely selected according to needs.

[0140] Next, the preparation method of the micro display light emitting pixel described in the above embodiment will be described, which is used to prepare the micro display light emitting pixel described in the above embodiment, as shown in Figure 20 The method can include the following steps:

[0141] S1: preparing a driving backboard.

[0142] An exemplary cross-sectional structure of the single pixel of the driving backplane is as shown in Figure 21 As shown, the driving backplane 10 includes a through-anode contact 11, and an insulating medium is arranged around the through-anode contact 11.

[0143] S2: a display module is prepared on the driving backplane, the display module includes a light-emitting unit and a trench structure, the light-emitting unit is in electrical connection with the through-anode contact in the driving backplane, the trench structure surrounds the light-emitting unit and penetrates the vertical area where the display module is located, the trench structure is filled with a metal material, and the light-emitting unit is an inorganic compound semiconductor.

[0144] An exemplary cross-sectional structure of the inorganic compound semiconductor is as shown in Figure 22 As shown, the inorganic compound semiconductor includes at least the following layers stacked from bottom to top: a first substrate 316, a first N-type ohmic contact layer 313, a first active quantum well layer 317, and a first P-type ohmic contact layer 311.

[0145] In a possible implementation, after S2, the following step is further included: a microlens is prepared on the light-emitting unit and the trench structure. The microlens can be prepared by etching, and the material of the microlens can be a compound semiconductor or a dielectric material such as silicon oxide and silicon nitride deposited subsequently.

[0146] For the front trench structure design idea in the above embodiment, S2 can specifically include the following steps:

[0147] S211: step etching is performed on the inorganic compound semiconductor to prepare a first light-emitting unit.

[0148] Specifically, as shown in Figure 23 The step etching is performed on the inorganic compound semiconductor by using a patterned etching scheme such as plasma dry etching, and the etching is performed to the first N-type ohmic contact layer 313 to prepare the first light-emitting unit 31, and the etching depth is in a range of 0.3 um to 3 um.

[0149] S212: step filling is performed on the first light-emitting unit by using an insulating material to form a first insulating layer.

[0150] Specifically, step filling is performed on the first light-emitting unit by using a single layer or a stack of dielectric layers such as silicon oxide, silicon nitride, SIC, SICN, Ti3O5, and Ni2O5 to form the first insulating layer.

[0151] S213: etching is performed on the first insulating layer to form a via connected with the first P-type ohmic contact layer in the first light-emitting unit and a first trench structure surrounding the first light-emitting unit.

[0152] Specifically, as shown in Figure 24 The first insulating layer 61 is etched using a patterned etching scheme such as plasma dry etching to realize the via hole of the first P-type ohmic contact layer 311 and the trench isolation around the first light emitting unit 31. The thickness of the first insulating layer 61 and the depth of the first trench structure 41 are greater than or equal to the etching depth of the pixel, generally in the range of 0.4um to 5um, the width of the first trench structure 41 is in the range of 90nm to 5um, and the angle of the first trench structure 41 is in the range of 90°±30°, preferably in the range of 90°±10°.

[0153] S214: filling the via hole and the first trench structure with metal material, and combining the first light emitting unit, the first insulating layer, and the first trench structure to form a first display device layer.

[0154] Specifically, as shown in Figure 25 The via hole 312 and the first trench structure 41 are filled with metal material through a metal backfilling process, for example, metal Al, NiV, and Cu are sequentially deposited in the via hole 312 and the first trench structure 41, or metal Al is deposited in the via hole 312 and the first trench structure 41, or metal W is deposited in the via hole 312 and the first trench structure 41. This structure can simultaneously complete the optical pixel string isolation and the electrical connection of the cathode, and the seed layer of the filled metal material can also be a single layer or multiple layers of Ti, Ni, Cr, Au, Ge, Al, Pt, Ta, W, or nitrides thereof. Further, after the filling is completed, chemical mechanical planarization (CMP) can be used to remove the excess metal on the surface of the filled metal material and to planarize the surface.

[0155] S215: combining the first display device layer with a driving backplane through a hybrid bonding process, and when combined, the first light emitting unit is in electrical connection with the anode contact of the driving backplane through the via hole filled with metal material.

[0156] As shown in Figure 26 When combined, the metal via hole region in the first display device layer 21 is connected with the anode contact 11 of the driving backplane, and the cathode of the first display device layer 21 is connected to the peripheral common cathode of the driving backplane 10 through the first trench structure 41.

[0157] In one possible implementation, after S215, the following steps are further included: removing the compound substrate in the first light emitting unit; and roughening the surface of the first light emitting unit after the substrate is removed. The compound substrate in the combined first light emitting unit 31 is removed, and the compound is thinned by removing the substrate, thereby realizing N-contact conduction while thinning the cathode, reducing optical crosstalk between pixels, and obtaining a structure as shown in Figure 7 Figure 27 ​As shown, the first light emitting unit 31 after removing the substrate is surface roughened to achieve light extraction efficiency enhancement.

[0158] It can be understood that if the above-mentioned front groove structure design idea is adopted, the advantage is that N-type ohmic contact can be directly formed with the first light emitting unit; the disadvantage is that the first light emitting unit has been defined pattern during bonding, which needs to be combined with the driving backplate with certain accuracy, and at the same time is limited by the thickness of the first light emitting unit in the first display device layer, and the thickness of the first groove structure cannot be very flexible customized.

[0159] It can be understood that in the above steps S211 to S215, the subsequent preparation is based on the step etching to the first N-type ohmic contact layer, in another design, the step etching can be as shown in the figure Figure 28 The inorganic compound semiconductor except the first substrate 316 is etched completely, and the process step of extending the first N-type ohmic contact layer 311 to connect with the first groove structure 41 is added to connect the cathode of the first display device layer 21 to the peripheral common cathode of the driving backplate 10 through the first groove structure 41.

[0160] For the front and back groove structure combination design idea in the above embodiment, after S215, the following steps can be further included:

[0161] S216: filling the first display device layer with insulating material to form a second insulating layer.

[0162] Specifically, the first display device layer is filled with a single layer or a stack of medium layers such as silicon oxide, silicon nitride, SIC, SICN, Ti3O5, Ni2O5, etc. to form a second insulating layer.

[0163] S217: etching the second insulating layer to form a second groove structure connected to the first groove structure at one end.

[0164] Specifically, the second insulating layer is etched using a patterned etching scheme such as plasma dry etching to achieve groove isolation around the first light emitting unit in the second insulating layer, which is the second groove structure. The width of the second groove structure is 90nm-5um, the angle of the second groove structure is 90°±30°, and the optimal angle is 90°±10°.

[0165] S218: filling the second groove structure with metal material, and the second insulating layer and the second groove structure are combined to form a second display device layer.

[0166] Specifically, the second trench structure is filled with metal material using a metal backfill process. For example, Al, NiV, and Cu are deposited sequentially in the second trench structure; or Al is deposited in the second trench structure; or W is deposited in the second trench structure. This structure can simultaneously achieve optical pixel string isolation and cathode electrical connection. The seed layer corresponding to the filled metal material can also be a single layer or multiple layers of metals such as Ti, Ni, Cr, Au, Ge, Al, Pt, Ta, and W, or their nitrides. Furthermore, after filling, CMP can be used to remove excess metal and planarize the surface of the filled metal material.

[0167] Understandably, if the above-mentioned front and back groove structure combined design concept is adopted, the advantage is that it can directly form an N-type ohmic contact with the first light-emitting unit, and the depth of the second groove structure on the back can be customized very flexibly; the disadvantage is that the first light-emitting unit has already defined pattern during bonding, and it needs to be combined with the driving backplate with a certain precision, which increases the process cost.

[0168] Regarding the back groove structure design concept in the above embodiment, S2 may specifically include the following steps:

[0169] S221: An inorganic compound semiconductor with a bonding layer and a driving backplate with a bonding layer are bonded together by a hybrid bonding process. During bonding, the inorganic compound semiconductor is connected to the anode contacts in the driving backplate through the bonding layer.

[0170] Specifically, such as Figure 29 , Figure 30 As shown, bonding layer 322 is fabricated on an inorganic compound semiconductor, and similarly, bonding layer 322 is fabricated on the wafer of the driving backplate 10. The resulting structure is as follows. Figure 31 As shown, the bonding layer 322 is conductive and can be an opaque metallic material, such as a single layer or multiple layers of metals like Au, Sn, Al, Cu, and W. The bonding layer 322 can also be a transparent metal oxide material, such as a transparent conductive film like ITO or ZnO.

[0171] Furthermore, metals such as Cr, Ni, Ti, and TiN are used as an adhesion layer between the inorganic compound semiconductor / driving backplane 10 and the bonding layer 322 to increase the adhesion between the two. Further, such as Figure 31 As shown, after the compound wafer is integrated with the wafer of the driving backplane 10 by bonding process, the second substrate 324 of the inorganic compound semiconductor can be removed for the fabrication of subsequent devices.

[0172] S222: Step etching is performed on the inorganic compound semiconductor and bonding layer to prepare the second light-emitting unit.

[0173] Specifically, such asFigure 32 As shown, the step etching is performed using a patterned etching scheme such as plasma dry etching, and the preparation of the second light emitting unit 32 and the patterning of the bonding layer 322 are completed, and the corresponding etching depth of the second light emitting unit 32 is in the range of 0.3um-3um.

[0174] S223a: A passivation layer is coated on the surface of the second light emitting unit and the surface of the driving back plate; a part of the passivation layer on the top surface of the second light emitting unit is removed by a patterning process to expose the second N-type ohmic contact layer in the second light emitting unit; a cathode layer is coated on the surface of the second N-type ohmic contact layer and the surface of the passivation layer; an insulating material is used to fill the steps of the second light emitting unit to form a third insulating layer; the third insulating layer is etched to form a third trench structure surrounding the second light emitting unit; and a metal material is filled in the third trench structure.

[0175] In step S223a, the common cathode is connected before the trench process, and the micro display light emitting pixel prepared through this step is as shown in Figure 10 、 11 Specifically, after the passivation and patterning opening, the second N-type ohmic contact layer 323 in the second light emitting unit 32 is exposed for preparation of the contact, and then the cathode layer 70 is prepared, and the structure of the prepared cathode layer 70 is as shown in Figure 33 The transparent conductive film can be a single layer or multiple layers of ITO, ZnO, etc. In some embodiments, the transparent conductive film can be doped with metals such as Au, Ag, Al, etc. to optimize the resistance and transmittance of the transparent conductive film. Then, a third insulating layer 63 is prepared by further growing a medium layer using a plasma deposition process such as silicon glass, and after planarization, the third trench structure 43 is etched. The thickness of the third insulating layer 63 and the depth of the third trench structure 43 are greater than or equal to the depth of the pixel etching, generally in the range of 0.4um-5um, the width of the third trench structure 43 is in the range of 90nm-5um, and the angle of the third trench structure 43 is in the range of 90°±30°, with 90°±10° being optimal. After etching, metal filling is performed, such as: depositing metal Al, NiV, Cu in the third trench structure 43 in sequence; or depositing metal Al in the third trench structure 43; or depositing metal W in the third trench structure 43. This structure can simultaneously complete the optical pixel string isolation and the electrical connection of the cathode, and the seed layer of the filled metal material can also be a single layer or multiple layers of Ti, Ni, Cr, Au, Ge, Al, Pt, Ta, W, etc. or nitrides thereof. Further, after filling is completed, CMP can be used to remove excess metal on the surface of the filled metal material and to planarize the surface. Further, during the preparation of the third trench structure 43 process, the IO and the peripheral common cathode can be simultaneously filled with metal to achieve perfect functionality.

[0176] S223b: step-filling the second light emitting unit with insulating material to form a third insulating layer; etching the third insulating layer to form a third trench structure surrounding the second light emitting unit; filling the third trench structure with metal material; removing part of the third insulating layer on the top surface of the second light emitting unit by using a patterning process to expose the second N-type ohmic contact layer in the second light emitting unit; and covering the surface of the second N-type ohmic contact layer and the surface of the third insulating layer away from the driving backplane with a cathode layer.

[0177] In step S223b, the trench process is performed before the common cathode connection. The micro display light emitting pixel produced by this step is shown in FIG. 8B. Figure 12 Specifically, after the second light emitting unit 32 is prepared, the third insulating layer 63 is directly introduced. The third insulating layer 63 is prepared by further growing a dielectric layer using a plasma deposition process such as silicon glass. The structure after the third insulating layer 63 is introduced is shown in FIG. 8C. Figure 34 Then, the third insulating layer 63 is planarized, and the third trench structure 43 is etched. The dielectric layer on the driving backplane 10 is used to withstand over-etching. After etching, metal filling is performed. For example, metal Al, NiV and Cu are sequentially deposited in the third trench structure 43; or metal Al is deposited in the third trench structure 43; or metal W is deposited in the third trench structure 43. The structure after the metal filling is completed is shown in FIG. 8D. Figure 35 This structure can simultaneously complete the optical pixel string isolation and the electrical connection of the cathode. The seed layer of the filled metal material can also be a single layer or multiple layers of Ti, Ni, Cr, Au, Ge, Al, Pt, Ta, W or nitride thereof. Further, after the filling is completed, CMP can be used to remove the excess metal on the surface of the filled metal material and to planarize the surface. Then, a patterning opening is performed to expose the second N-type ohmic contact layer 323 in the second light emitting unit 32 for preparing a contact and connecting the cathode layer 70.

[0178] In a possible implementation, before the step of step-filling the second light emitting unit with insulating material to form a third insulating layer in S223b, the method further includes the following step: covering a passivation layer on the surface of the second light emitting unit and the surface of the driving backplane. That is, the passivation layer 80 is used as an etching stop layer for trench preparation. The structure after the step-filling is shown in FIG. 8E. The structure after the trench etching and metal filling is shown in FIG. 8F. The micro display light emitting pixel produced by this step is shown in FIG. 8G. Figure 36 Figure 37 Figure 13

[0179] ​​​It can be understood that if the above back groove structure design idea is adopted, the advantages are that the second light emitting unit has not been defined during bonding, the precision requirement is very low when combined with the driving back plate, and the depth of the third groove structure can be flexibly customized by adjusting the thickness of the third insulating layer; the disadvantage is that the N-type ohmic contact corresponding to the second light emitting unit needs to be prepared separately.

[0180] In summary, the preparation method of the micro display light emitting pixel provided by the embodiments of the present application can realize better optical crosstalk isolation by etching a groove structure in the display module of the micro display light emitting pixel and filling metal material in the groove structure, can constrain the light emitting angle by the depth of the groove structure, and the design process of the groove structure is relatively mature, and the yield is guaranteed.

[0181] Further, the preparation method adopts a semiconductor process, can be compatible to nanoscale work, and is more suitable for the preparation of micro pixel size.

[0182] All the optional technical solutions described above can be combined to form optional embodiments of the present application, that is, any number of embodiments can be combined to meet the needs of different application scenarios, and all are within the protection scope of the present application, which will not be repeated here.

[0183] It should be noted that the above description is only a preferred embodiment of the present application, and is not intended to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A microdisplay light emitting pixel that is immune to cross-talk, characterized by, The micro-display light-emitting pixel size is in the range of 0.5um-50um, and the micro-display light-emitting pixel comprises: a driving backboard; a display module arranged on the driving backboard, the display module comprising a light-emitting unit and a trench structure, the light-emitting unit being in electrical connection with an anode contact in the driving backboard, the trench structure surrounding the light-emitting unit and penetrating the vertical area where the display module is located, the trench structure being filled with a metal material, and the light-emitting unit being an inorganic compound semiconductor; the trench structures corresponding to adjacent light-emitting units are in communication with each other, or the trench structures corresponding to adjacent light-emitting units are isolated from each other by an insulating medium.

2. The microdisplay light emitting pixel of claim 1, wherein, The display module comprises at least a first display device layer, and the first display device layer comprises: a first light-emitting unit, a first P-type ohmic contact layer in the first light-emitting unit being connected with a through hole, the first light-emitting unit being in electrical connection with an anode contact in the driving backboard through the through hole filled with a metal material; a first insulating layer, the first insulating layer being filled and formed outside the first light-emitting unit; a first trench structure, the first trench structure penetrating the first insulating layer, one end of the first trench structure being connected with a first N-type ohmic contact layer in the first light-emitting unit, and the other end of the first trench structure being connected with an upper surface of the driving backboard.

3. The microdisplay light emitting pixel of claim 2, wherein, The display module further comprises a second display device layer arranged on the first display device layer, and the second display device layer comprises: a second insulating layer, the second insulating layer being filled and formed on a side of the first display device layer away from the driving backboard; a second trench structure, the second trench structure penetrating the second insulating layer and the first N-type ohmic contact layer, one end of the second trench structure being connected with the first trench structure.

4. The micro-display light-emitting pixel according to claim 3, wherein a width of the second trench structure is smaller than a width of the first trench structure.

5. The microdisplay light emitting pixel of claim 1, wherein, The display module comprises at least a third display device layer, and the third display device layer comprises: a second light-emitting unit, a second P-type ohmic contact layer in the second light-emitting unit being connected with the driving backboard through a bonding layer, the second light-emitting unit being in electrical connection with an anode contact in the driving backboard through the bonding layer, and a surface of a second N-type ohmic contact layer in the second light-emitting unit being covered with a part of a cathode layer; a third insulating layer, the third insulating layer being filled and formed outside the second light-emitting unit; a third trench structure, the third trench structure penetrating the third insulating layer, one end of the third trench structure being connected with the cathode layer.

6. The microdisplay light emitting pixel of claim 5, wherein, The cathode layer comprises a middle cathode layer and two side cathode layers, and the middle cathode layer covers the surface of the second N-type ohmic contact layer; a passivation layer covers the surface of the sidewall of the second light-emitting unit and the surface of the driving backboard, and the side cathode layer covers the surface of the passivation layer; or the side cathode layer covers a side surface of the third insulating layer away from the driving backboard.

7. The micro-display light-emitting pixel according to claim 6, wherein In the case that the side cathode layer is arranged on the side surface of the third insulating layer away from the driving back plate, the sidewall of the second light emitting unit and the surface of the driving back plate are further covered with a passivation layer.

8. The microdisplay light emitting pixel of claim 1, wherein, The corresponding trench pattern viewed from above includes: One of a circle, a rectangle, a hexagon, and an octagon.

9. The microdisplay light emitting pixel of claim 1, wherein, The display module further includes a microlens. The microlens is arranged on the light emitting unit and the trench structure.

10. The microdisplay light emitting pixel of claim 1, wherein, The metal material filled in the trench structure includes: Aluminum, nickel vanadium, and copper deposited vertically in sequence. Or, aluminum deposited. Or, tungsten deposited.

11. The micro display light emitting pixel of claim 1, wherein: The overall depth of the trench structure is not less than the overall depth of the light emitting unit.

12. The micro display light emitting pixel of claim 1, wherein: The width of the trench structure is in the range of 90 nm to 5 um.

13. The micro display light emitting pixel of claim 1, wherein: The depth of the trench structure is in the range of 0.4 um to 5 um.

14. The micro display light emitting pixel of claim 1, wherein: The angle of the trench structure gradually increases in the direction away from the driving back plate.

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