Time delay circuit, battery management system, battery equipment and vehicle

Abstract

The utility model relates to a time delay circuit, a battery management system, a battery device and a vehicle, when any one trigger circuit receives a time delay trigger signal, a first switch circuit and a second switch circuit enter a conducting state, and at the moment, a power supply signal input by the input end of the first switch circuit is switched on; and the current can flow into the first charging and discharging circuit through the first switching circuit for charging, and can be output to a controlled object through the first switching circuit and the second switching circuit to maintain the operation of the controlled object. And under the condition that the first charge-discharge circuit is gradually charged to reach a preset voltage threshold value, the second switch circuit enters a turn-off state from a turn-on state, the power supply signal stops outputting to the controlled object, and the controlled object switches the operation state, namely, the controlled object delays to act. Through the scheme, a plurality of trigger circuits share one power supply component, when any one trigger circuit is triggered, delay control of a controlled object can be realized, and the delay reusability is relatively high.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuits, in particular to a delay circuit, a battery management system, a battery device and a vehicle. BACKGROUND

[0002] With the development of science and technology, electric motorcycles, electric vehicles and other electric vehicles powered by batteries are used more and more widely in daily life, bringing great traffic convenience to people. The battery management system (BMS) as an important link between the battery and the electric vehicle can control the signal delay through the delay chip when detecting the abnormality of the battery, and realize the delay power-off control of the whole vehicle.

[0003] However, in the related art, the delay chip has poor delay multiplexing. UTILITY MODEL CONTENT

[0004] Therefore, it is necessary to provide a delay circuit, a battery management system, a battery device and a vehicle to improve the delay multiplexing.

[0005] The present application provides a delay circuit, which comprises a trigger component and a power supply component. The trigger component comprises a plurality of trigger circuits, and the input end of each trigger circuit is used for receiving a delay trigger signal. The power supply component comprises a first switch circuit, a second switch circuit and a first charge-discharge circuit. The output end of each trigger circuit is connected to the control end of the first switch circuit. The input end of the first switch circuit is connected to a first power supply. The output end of the first switch circuit is connected to the first end of the first charge-discharge circuit and the input end of the second switch circuit. The control end of the second switch circuit is connected to the second end of the first charge-discharge circuit. The output end of the second switch circuit is used for connecting a controlled object. In the case that any one of the trigger circuits receives the delay trigger signal, the first switch circuit and the second switch circuit are turned on to output the power supply signal of the first power supply to the controlled object and charge the first charge-discharge circuit. In the case that the first charge-discharge circuit is charged to a preset voltage threshold, the second switch circuit is turned off to stop outputting the power supply signal to the controlled object.

[0006] The scheme has the advantages that the trigger assembly includes a plurality of trigger circuits, each of which can receive the delay trigger signal, and the trigger circuits share one power supply assembly. When any one of the trigger circuits receives the delay trigger signal, the first switch circuit and the second switch circuit enter the conducting state, at this time, the power supply signal input to the input end of the first switch circuit can flow into the first charge-discharge circuit for charging, and can be output to the controlled object through the first switch circuit and the second switch circuit to maintain the operation of the controlled object. When the first charge-discharge circuit gradually charges to reach the preset voltage threshold, the second switch circuit enters the off state from the conducting state, and the power supply signal stops being output to the controlled object, and the controlled object will switch the operation state, that is, the controlled object delays the action. Through the scheme, the plurality of trigger circuits share one power supply assembly, and when any one of the trigger circuits is triggered, the delay control of the controlled object can be realized, and the delay multiplicity is high.

[0007] In some embodiments, the delay circuit further includes an output assembly, the output assembly includes output circuits consistent with the number of trigger circuits, the control end of the output circuit is used for receiving the delay trigger signal, the input end of the output circuit is connected with the output end of the second switch circuit, the output end of the output circuit is used for connecting the controlled object, and the same delay trigger signal is output to one trigger circuit and one output circuit at the same time.

[0008] The scheme has the advantages that the trigger assembly includes a plurality of trigger circuits, each of which can receive the delay trigger signal, and the trigger circuits share one power supply assembly. When any one of the trigger circuits receives the delay trigger signal, the first switch circuit and the second switch circuit enter the conducting state, at this time, the power supply signal input to the input end of the first switch circuit can flow into the first charge-discharge circuit for charging, and can be output to the controlled object through the first switch circuit and the second switch circuit to maintain the operation of the controlled object. When the first charge-discharge circuit gradually charges to reach the preset voltage threshold, the second switch circuit enters the off state from the conducting state, and the power supply signal stops being output to the controlled object, and the controlled object will switch the operation state, that is, the controlled object delays the action. Through the scheme, the plurality of trigger circuits share one power supply assembly, and when any one of the trigger circuits is triggered, the delay control of the controlled object can be realized, and the delay multiplicity is high.

[0009] In some embodiments, the output circuit includes a third switch circuit and a second charge-discharge circuit, the control end of the third switch circuit is used for receiving the delay trigger signal, the input end of the third switch circuit is connected with the output end of the second switch circuit, and the output end of the third switch circuit is connected with the controlled object through the second charge-discharge circuit.

[0010] The scheme has the advantages that the trigger assembly includes a plurality of trigger circuits, each of which can receive the delay trigger signal, and the trigger circuits share one power supply assembly. When any one of the trigger circuits receives the delay trigger signal, the first switch circuit and the second switch circuit enter the conducting state, at this time, the power supply signal input to the input end of the first switch circuit can flow into the first charge-discharge circuit for charging, and can be output to the controlled object through the first switch circuit and the second switch circuit to maintain the operation of the controlled object. When the first charge-discharge circuit gradually charges to reach the preset voltage threshold, the second switch circuit enters the off state from the conducting state, and the power supply signal stops being output to the controlled object, and the controlled object will switch the operation state, that is, the controlled object delays the action. Through the scheme, the plurality of trigger circuits share one power supply assembly, and when any one of the trigger circuits is triggered, the delay control of the controlled object can be realized, and the delay multiplicity is high.

[0011] In some embodiments, the second charging and discharging circuit comprises a first capacitor, a first end of the first capacitor is connected to an output end of the third switch circuit and the controlled object, and a second end of the first capacitor is grounded; wherein the capacitance of the first capacitor in different output circuits is not completely the same.

[0012] In the above scheme, the second charging and discharging circuit comprises a first capacitor, and the capacitance of the first capacitor in each output circuit can be set to be not completely the same, so that the time difference of different delay channels is set, thereby meeting different delay time requirements.

[0013] In some embodiments, the trigger assembly further comprises a first filter circuit, and the output end of each trigger circuit is connected to the control end of the first switch circuit through the first filter circuit.

[0014] In the above scheme, the first filter circuit is further arranged between the trigger circuit and the control end of the first switch circuit, and the signal input into the first switch circuit is filtered, thereby improving the working safety of the first switch circuit.

[0015] In some embodiments, the trigger circuit comprises a first anti-reverse circuit, a first end of the first anti-reverse circuit is used to receive the delay trigger signal, and a second end of the first anti-reverse circuit is connected to the control end of the first switch circuit through the first filter circuit.

[0016] In the above scheme, each trigger circuit comprises a first anti-reverse circuit, so that the possibility of backflow of the delay trigger signal through other trigger circuits is reduced, and the working reliability of the delay circuit is improved.

[0017] In some embodiments, the first anti-reverse circuit comprises a diode, an anode of the diode is used to receive the delay trigger signal, and a cathode of the diode is connected to the control end of the first switch circuit through the first filter circuit.

[0018] In the above scheme, the diode is used as the first anti-reverse circuit, which has the advantages of simple circuit structure, saving of circuit volume and circuit cost.

[0019] In some embodiments, the first anti-reverse circuit comprises a fourth switch circuit and a diode, a control end of the fourth switch circuit is used to receive the delay trigger signal, an input end of the fourth switch circuit is connected to a second power supply, an output end of the fourth switch circuit is connected to an anode of the diode, and a cathode of the diode is connected to the control end of the first switch circuit through the first filter circuit.

[0020] In the above scheme, the fourth switch circuit and the diode are used to form the first anti-reverse circuit, which has high anti-reverse operation reliability.

[0021] In some embodiments, the power supply assembly further comprises a reset switch circuit, a control end of the reset switch circuit is connected to an output end of the trigger circuit, an input end of the reset switch circuit is connected to a second end of the first charge-discharge circuit, and an output end of the reset switch circuit is grounded.

[0022] In the above scheme, the power supply assembly is further provided with a reset switch circuit. When the delay trigger ends, that is, in the case that no delay trigger signal is output, the reset switch circuit is turned on, so as to discharge the electric energy stored in the first charge-discharge circuit, and the power supply assembly returns to the initial operating state.

[0023] In some embodiments, the reset switch circuit comprises a fifth switch circuit and a discharge circuit, a control end of the fifth switch circuit is connected to an output end of the trigger circuit, an input end of the fifth switch circuit is connected to a second end of the first charge-discharge circuit, an output end of the fifth switch circuit is connected to a first end of the discharge circuit, and a second end of the discharge circuit is grounded.

[0024] In the above scheme, the reset switch circuit is formed by using the fifth switch circuit and the discharge circuit. The electric energy stored in the first charge-discharge circuit can be quickly consumed by the discharge circuit, and the discharge efficiency is high.

[0025] In some embodiments, the first charge-discharge circuit comprises a second capacitor and a first resistor, a first end of the second capacitor is connected to a control end of the second switch circuit, a second end of the second capacitor is connected to a first end of the first resistor, a common end formed by the second end of the second capacitor and the first end of the first resistor is grounded, and a second end of the first resistor is connected to an output end of the first switch circuit.

[0026] In the above scheme, the first charge-discharge circuit comprises the second capacitor and the first resistor. The electric energy is stored by the capacitor, and the first resistor is further arranged between the first switch circuit and the second capacitor to limit the current, so that the charge-discharge operation reliability is high.

[0027] In some embodiments, the power supply assembly further comprises a second filter circuit, and an output end of the second switch circuit is connected to the controlled object through the second filter circuit.

[0028] In the above scheme, the filter circuit is further arranged at the front end of the controlled object, so that the noise of the power supply signal flowing into the controlled object is reduced, and the operation reliability of the controlled object is improved.

[0029] In some embodiments, the power supply assembly further comprises a second anti-reverse circuit, and an output end of the second switch circuit is connected to the controlled object through the second anti-reverse circuit.

[0030] In the above scheme, the filter circuit is further arranged at the front end of the controlled object, so that the possibility of signal backflow from the controlled object to the delay circuit when the delay circuit is not triggered is reduced.

[0031] The application provides a battery management system, comprising a processor, a high-low edge driving chip and the delay circuit, the processor is used for outputting a delay trigger signal, the processor is connected with an input end of the trigger circuit and the high-low edge driving chip, and an output end of the second switch circuit is connected with the high-low edge driving chip.

[0032] The application provides a battery device, comprising a battery cell and the battery management system.

[0033] The application provides a vehicle, comprising a whole vehicle power-on / off switch and the battery management system, and the high-low edge driving chip is connected with the whole vehicle power-on / off switch. BRIEF DESCRIPTION OF DRAWINGS

[0034] Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The accompanying drawings are included to provide a description of the preferred embodiments and are not intended to limit the scope of the application. Furthermore, the same reference numerals are used throughout the several views of the drawings to designate the same parts. In the drawings:

[0035] Figure 1 The figure is a schematic diagram of the delay circuit structure in some embodiments of the application;

[0036] Figure 2 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0037] Figure 3 The figure is a schematic diagram of the output circuit structure in some embodiments of the application;

[0038] Figure 4 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0039] Figure 5 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0040] Figure 6 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0041] Figure 7 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0042] Figure 8 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0043] Figure 9 The figure is a schematic diagram of the delay circuit structure in some other embodiments of the application;

[0044] Figure 10Fig. 1 is a schematic diagram of a delay circuit structure in some embodiments of the present application;

[0045] Figure 11 Fig. 2 is a schematic diagram of a delay circuit structure in some embodiments of the present application;

[0046] Figure 12 Fig. 3 is a schematic diagram of a battery management system structure in some embodiments of the present application.

[0047] Legend of reference signs:

[0048] 10 - trigger component, 11 - trigger circuit, 20 - power supply component, 21 - first charge-discharge circuit, Q1 - first switch circuit, Q2 - second switch circuit; 30 - output component, 31 - output circuit; Q3 - third switch circuit, 311 - second charge-discharge circuit, C1 - first capacitor; 12 - first filter circuit, 111 - first anti-reverse circuit, D1 - diode, Q4 - fourth switch circuit; 22 - reset switch circuit, Q5 - fifth switch circuit, R - bleeder circuit, RL - current-limiting resistor; R1 - first resistor, R2 - second resistor, C2 - second capacitor; 23 - second filter circuit, 24 - second anti-reverse circuit; R3 - third resistor, C3 - third capacitor; 121 - processor, 122 - high-low side drive chip, 123 - delay circuit. DETAILED DESCRIPTION

[0049] The embodiments of the technical solutions of the present application will be described in detail below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present application, and therefore only serve as examples, and cannot limit the protection scope of the present application.

[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs; the terms used herein are only for the purpose of describing specific embodiments of the present application, and are not intended to limit the present application; the terms "include" and "have" and any variations thereof in the specification and claims of the present application and the above description of drawings are intended to cover non-exclusive inclusion.

[0051] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified.

[0052] Reference to an "example" in this text means that a particular feature, structure, or characteristic described in connection with the example can be included in at least one example of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same example, or to one or more particular examples, although this is possible. Those skilled in the art will appreciate that the examples described herein can be combined with other examples.

[0053] In the description of the embodiments of the application, the term "and / or" is only a description of the association relationship of associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in this paper generally represents that the front and rear associated objects are a "or" relationship.

[0054] In the description of the embodiments of the application, the term "a plurality of" refers to two or more (including two), and similarly, "a plurality of groups" refers to two or more groups (including two groups), and "a plurality of pieces" refers to two or more pieces (including two pieces).

[0055] In the description of the embodiments of the application, unless otherwise explicitly specified and limited, the technical terms "mounting", "connection", "connection", "fixing" and the like should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanical connection, or it can be electrical connection; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the application can be understood according to the specific circumstances.

[0056] At present, from the development of market situation, the application of battery is more and more extensive. Not only is it applied to energy storage systems such as hydroelectric, thermal, wind and solar power stations, but also is widely used in electric bicycles, electric motorcycles, electric vehicles and other electric vehicles, as well as military equipment, aerospace and other fields. With the continuous expansion of the application field of battery, the demand of its market is also increasing.

[0057] These batteries are generally configured with a battery management system to detect the battery state, analyze the battery state, protect the battery safety, control the energy, and manage the battery information. In the whole vehicle scene, the battery management system can control the high voltage relay through the high-low side driving chip to complete the control of the whole vehicle high voltage on and off. In order to alleviate the situation of instant loss of power during driving, it is usually necessary to design a delay for the whole vehicle high voltage, giving a certain emergency time.

[0058] However, the time delay function of the battery management system is realized by a time delay chip, and one time delay chip is independently arranged for each time delay channel. This scheme has a large number of chips, low reusability, and high time delay cost.

[0059] Through in-depth research, it is found that the time delay trigger time of different time delay channels is not the same, and at the same time, only one time delay channel triggers the time delay function. Therefore, the circuit for providing a time delay signal to a relay can be shared, thereby improving the time delay reusability and reducing the circuit cost.

[0060] Based on the above considerations, the application provides a time delay circuit, which comprises a trigger component and a power supply component. The trigger component comprises a plurality of trigger circuits, and the power supply component comprises a first switch circuit, a second switch circuit, and a first charge-discharge circuit. Each trigger circuit can receive a time delay trigger signal, and the trigger circuits share one power supply component. The output ends of the trigger circuits are respectively connected to the control ends of the first switch circuit. The input end of the first switch circuit is connected to a first power supply. The output end of the first switch circuit is connected to the first end of the first charge-discharge circuit and the input end of the second switch circuit. The control end of the second switch circuit is connected to the second end of the first charge-discharge circuit. The output end of the second switch circuit is used to connect to a controlled object.

[0061] When any one of the trigger circuits receives a time delay trigger signal, the first switch circuit and the second switch circuit enter a conduction state. At this time, the power supply signal input to the input end of the first switch circuit can flow into the first charge-discharge circuit through the first switch circuit for charging, and can be output to the controlled object through the first switch circuit and the second switch circuit to maintain the operation of the controlled object. When the first charge-discharge circuit gradually charges to a preset voltage threshold, the second switch circuit enters an off state from the conduction state, and the power supply signal stops being output to the controlled object. The controlled object will switch the operation state, that is, the controlled object will delay the action.

[0062] Through the above scheme, the plurality of trigger circuits share one power supply component. When any one of the trigger circuits is triggered, the time delay control of the controlled object can be realized, and the time delay reusability is high.

[0063] The time delay circuit provided by the application can be applied in a scene with multiple time delay requirements. For example, in some embodiments, the time delay circuit can be used in a battery management system to realize the time delay power-on or power-off control of an electric vehicle or other electric vehicles, or to realize the time delay power-on or power-off control of other electric devices powered by a battery. In another embodiment, the time delay circuit can also be applied to an electric device (such as a household appliance) powered by an alternating current power supply to realize the time delay power-on or power-off control of the electric device, without limitation.

[0064] Please refer to Figure 1The application provides a delay circuit, comprising a trigger component 10 and a power supply component 20, the trigger component 10 comprises a plurality of trigger circuits 11, and the input end of each trigger circuit 11 is used for receiving a delay trigger signal (i.e. S1, S2,..., Sn shown in the figure); the power supply component 20 comprises a first switch circuit Q1, a second switch circuit Q2 and a first charge-discharge circuit 21, the output end of each trigger circuit 11 is connected with the control end of the first switch circuit Q1, the input end of the first switch circuit Q1 is connected with a first power supply VCC1, the output end of the first switch circuit Q1 is connected with the first end of the first charge-discharge circuit 21 and the input end of the second switch circuit Q2, the control end of the second switch circuit Q2 is connected with the second end of the first charge-discharge circuit 21, and the output end of the second switch circuit Q2 is used for connecting a controlled object.

[0065] In the case that any one of the trigger circuits 11 receives the delay trigger signal, the first switch circuit Q1 and the second switch circuit Q2 are turned on to output the power supply signal of the first power supply VCC1 to the controlled object and charge the first charge-discharge circuit 21; in the case that the first charge-discharge circuit 21 is charged to a preset voltage threshold, the second switch circuit Q2 is turned off to stop outputting the power supply signal to the controlled object.

[0066] Specifically, the trigger component 10 is triggered to turn on and run under the action of the delay trigger signal. After the trigger component 10 is triggered to turn on and run, the signal type transmitted to the power supply component 20 is not unique, and is not specifically limited. For example, in an embodiment, the delay trigger signal can be directly transmitted to the power supply component 20 after the trigger component 10 is turned on. In another embodiment, the trigger component 10 can be additionally connected with other signal sources, such as a power supply, and the signal source can be transmitted to the power supply component 20 after the trigger component 10 is turned on and receives the delay trigger signal.

[0067] The power supply component 20 can turn on and output the power supply signal to the controlled object in the case that the trigger component 10 receives the delay trigger signal, maintain the running state of the controlled object, and turn off the circuit for outputting the power supply signal after a certain delay time, so that the controlled object switches the running state. The trigger circuit 11 refers to a circuit in the trigger component 10, which is used for receiving a single delay trigger signal and triggering to turn on and run according to the received delay trigger signal. In an actual scene, each trigger circuit 11 plus the power supply component 20 can be regarded as a delay channel, the delay trigger signals input into each trigger circuit 11 are not the same, each trigger circuit 11 can be connected with a same processor and receive different delay trigger signals from the same processor, or can be connected with multiple processors and receive delay trigger signals from different processors.

[0068] The first switch circuit Q1 can be turned on and off under the action of the signal output by the trigger component 10. The second switch circuit Q2 can be turned on or off according to the charge and discharge state of the first charge and discharge circuit 21. The first charge and discharge circuit 21 can realize charge operation or discharge operation according to the on-off state of the first switch circuit Q1. The controlled object needs to perform the related action after a delay time under the action condition.

[0069] The preset voltage threshold refers to the voltage value required by the control end of the second switch circuit Q2 when the switching state of the second switch circuit Q2 changes. The size of the preset voltage threshold is not unique, and will be different according to the structure or type of the second switch circuit Q2, and is not limited. During the gradual charging of the first charge and discharge circuit 21, the voltage of the first charge and discharge circuit 21 will gradually approach the preset voltage threshold, and finally reach the preset voltage threshold, so that the second switch circuit Q2 enters the off state from the on state.

[0070] After any one trigger circuit 11 receives the delay trigger signal, the trigger circuit 11 is triggered to turn on and transmit a signal to the control end of the first switch circuit Q1. Under the action of the signal, the first switch circuit Q1 is turned on. Since the charge and discharge circuit does not perform charge and discharge at this time, the second switch circuit Q2 will enter the on state synchronously, and the power supply signal output by the first power supply VCC1 can be output to the controlled object through the first switch circuit Q1 and the second switch circuit Q2, thereby maintaining the running state of the controlled object. In this process, the stored electric energy of the first charge and discharge circuit 21 gradually increases, and when the first charge and discharge circuit 21 is charged to the preset voltage threshold, the second switch circuit Q2 enters the off state from the on state, and the power supply signal stops being output to the controlled object. At this time, the controlled object will switch the running state, thereby realizing the delay action control of the controlled object.

[0071] The types of the first switch circuit Q1 and the second switch circuit Q2 are not unique. In an embodiment, the first switch circuit Q1 and the second switch circuit Q2 can include a plurality of switch devices of the same type or different types, as long as they can realize the on or off function under the corresponding signal.

[0072] In another embodiment, the first switch circuit Q1 and the second switch circuit Q2 can also be a single controllable switching device, such as a field effect tube, a crystal triode, or an insulated gate bipolar transistor, etc., without limitation. In order to facilitate the understanding of the technical solutions of the present application, the following embodiments can be understood that the first switch circuit Q1 and the second switch circuit Q2 are both single controllable switching devices, the first switch circuit Q1 includes a first switch tube, the control end, the input end and the output end of the first switch tube, which are respectively the control end, the input end and the output end of the first switch circuit Q1; the second switch circuit Q2 includes a second switch tube, the control end, the input end and the output end of the second switch tube, which are respectively the control end, the input end and the output end of the second switch circuit Q2.

[0073] It can be understood that the specific type of the first charging and discharging circuit 21 is not unique, and any device that can realize the functions of charging and discharging can be used, without limitation. The type of the controlled object can also not be unique, and the controlled object will also be different depending on the application scenario of the delay circuit.

[0074] In one embodiment, taking the high-voltage control of the whole vehicle by the battery management system as an example, the controlled object can be a high-low side drive chip. In a normal state, the processor directly outputs a control signal to the high-low side drive chip to control the high-low side drive chip to act. In an abnormal state, the processor loses the control ability of the high-low side drive chip, at this time, the delay circuit arranged between the processor and the high-low side drive chip intervenes, first maintains the running state of the high-low side drive chip by outputting a power supply signal, at this time, the whole vehicle can maintain the power-on running; after a certain time delay, the high-low side drive chip is controlled to act to drive the whole vehicle to power off.

[0075] The above scheme, the trigger assembly 10 includes a plurality of trigger circuits 11, each trigger circuit 11 can receive a delay trigger signal, and each trigger circuit 11 shares a power supply assembly 20. When any one of the trigger circuits 11 receives a delay trigger signal, the first switch circuit Q1 and the second switch circuit Q2 enter the conduction state, at this time, the power supply signal input to the input end of the first switch circuit Q1 can flow into the first charging and discharging circuit 21 for charging through the first switch circuit Q1, and output to the controlled object through the first switch circuit Q1 and the second switch circuit Q2, to maintain the running of the controlled object. In the case where the first charging and discharging circuit 21 gradually charges to reach a preset voltage threshold, the second switch circuit Q2 enters the off state from the conduction state, and the power supply signal stops outputting to the controlled object, and the controlled object will switch the running state, that is, the controlled object delays the action. Through this scheme, the plurality of trigger circuits 11 share a power supply assembly 20, and when any one of the trigger circuits 11 is triggered, the delay control of the controlled object can be realized, which has high delay multiplicity.

[0076] Further, by the scheme of the application, the delay control of the controlled object is realized by means of hardware circuit, without using integrated chip, so that the delay cost is effectively reduced, and the operation reliability is higher.

[0077] Please refer to Figure 2 In some embodiments, the delay circuit further comprises an output assembly 30, the output assembly 30 comprising output circuits 31 consistent in number with the trigger circuits 11, the control end of the output circuits 31 being configured to receive the delay trigger signals (i.e. S1, S2, …, Sn), the input end of the output circuits 31 being connected to the output end of the second switch circuit Q2, the output end of the output circuits 31 being configured to be connected to the controlled object, and the same delay trigger signal being simultaneously output to one trigger circuit 11 and one output circuit 31.

[0078] Specifically, the output assembly 30 transmits the power supply signal output by the power supply assembly 20 to the circuit of the corresponding controlled object. In actual scenarios, the number of controlled objects that need to be controlled by the delay circuit is not unique. Therefore, the output assembly 30 can be arranged between the power supply assembly 20 and the controlled object, and each trigger circuit 11 is configured with one output circuit 31. In this way, multiple delays can be formed, and the power supply assembly 20 of each delay is shared, and the trigger circuit 11 and the output circuit 31 can receive the delay trigger signal corresponding to the delay.

[0079] When there is a delay requirement, the delay trigger signal is transmitted to the input end of one of the trigger circuits 11 and the control end of one of the output circuits 31. Under the action of the delay trigger signal, the power supply assembly 20 outputs the power supply signal, and the output circuit 31 receiving the delay trigger signal is triggered to conduct, and transmits the power supply signal output by the power supply assembly 20 to the connected controlled object. At this time, the other output circuits 31 do not act and remain in the off state, and the controlled object connected to the other output circuits 31 will not trigger the delay control.

[0080] In actual scenarios, multiple output circuits 31 can be connected to one controlled object, i.e. the same controlled object can be controlled by multiple delays; or each output circuit 31 can be connected to one controlled object, i.e. one controlled object can be controlled by one delay, and the specific implementation is not limited.

[0081] The above scheme further provides the output assembly 30 between the power supply assembly 20 and the controlled object, the number of the output assembly 30 is consistent with the number of the trigger circuits 11, and the output assembly 30 responds to the delay trigger signal one by one. In this way, under different delay trigger signals, the same controlled object or different controlled objects can be controlled by different output circuits 31, and the delay multiplexing can be further improved.

[0082] It should be noted that the structure of the output circuit 31 is not unique, as long as it can enter the on state when receiving the delay trigger signal, and enter the off state when not receiving the delay trigger signal. For example, in an embodiment, the output circuit 31 can include a switching circuit, the control end of the switching circuit is used to receive the delay trigger signal, the input end of the switching circuit is connected to the output end of the second switching circuit Q2, and the output end of the switching circuit is used to connect the corresponding controlled object.

[0083] Please refer to Figure 3 In some embodiments, the output circuit 31 can also include a third switching circuit Q3 and a second charge-discharge circuit 311, the control end of the third switching circuit Q3 is used to receive the delay trigger signal, the input end of the third switching circuit Q3 is connected to the output end of the second switching circuit Q2, and the output end of the third switching circuit Q3 is connected to the controlled object through the second charge-discharge circuit 311.

[0084] Specifically, the third switching circuit Q3 can enter the on state when receiving the delay trigger signal, and the output circuit 31 in which the third switching circuit Q3 is located is turned on, so that the controlled object connected to the output circuit 31 can realize delay control. Further, in this embodiment, when the third switching circuit Q3 is turned on, the power supply signal is transmitted to the controlled object, so that the controlled object can maintain the running state while being charged by the second charge-discharge circuit 311. That is, in this embodiment, after receiving the delay trigger signal, both the first charge-discharge circuit 21 and the second charge-discharge circuit 311 will enter the charging state, until the second charge-discharge circuit 311 is fully charged, or the first charge-discharge circuit 21 is charged to the preset voltage threshold, and then the second switching circuit Q2 is turned off, and the second charge-discharge circuit 311 stops charging. When the second charge-discharge circuit 311 stops charging, although the power supply signal output by the first power supply VCC1 cannot be transmitted to the controlled object, the second charge-discharge circuit 311 discharges to the controlled object at this time, maintains the controlled object to continue running, until the second charge-discharge circuit 311 discharges ends, and the controlled object has no power supply signal input, the controlled object moves, and the delay control is completed.

[0085] In this scheme, the delay time of the delay circuit is: the time for the first charge-discharge circuit to charge to the preset voltage threshold + the discharge time of the second charge-discharge circuit. Therefore, in this embodiment, for different output circuits 31, the second charge-discharge circuit 311 can be configured to have different or the same discharge times according to actual needs, that is, the delay times of different delay channels can be independently set, so as to meet the different delay time requirements of different controlled objects.

[0086] It should be noted that, in an embodiment, in order to achieve independent setting of the delay time of different delay channels, the second charge-discharge circuit 311 of different delay channels needs to be able to store full electric energy in the charging phase, and the electric energy storage amount of each second charge-discharge circuit 311 is different. In actual situation, the charging time is determined by the first charge-discharge circuit 21, and when the first charge-discharge circuit 21 charges to the preset voltage threshold, the second charge-discharge circuit 311 will end charging. Therefore, in an embodiment, the charging time of the second charge-discharge circuit 311 full charging needs to be configured to be less than the charging time of the first charge-discharge circuit 21 full charging. Further, in an embodiment, the charging time of the second charge-discharge circuit 311 full charging can be configured to be less than the charging time of the first charge-discharge circuit 21 charging to the preset voltage threshold.

[0087] The above scheme, the output circuit 31 includes a third switch circuit Q3 and a second charge-discharge circuit 311, under the action of the delay trigger signal, the third switch circuit Q3 can conduct to charge the second charge-discharge circuit 311, and when the power supply component 20 stops outputting the power supply signal, the second charge-discharge circuit 311 can continue to discharge the controlled object, which can effectively improve the delay time.

[0088] Please continue to refer to Figure 3 In some embodiments, the second charge-discharge circuit 311 includes a first capacitor C1, a first end of the first capacitor C1 is connected to the output end of the third switch circuit Q3 and the controlled object, and a second end of the first capacitor C1 is grounded; wherein the capacitance values of the first capacitors C1 in different output circuits 31 are not completely the same.

[0089] Specifically, the specific type of the second charge-discharge circuit 311 is not unique, and can be any circuit including a device with automatic charging and discharging functions, such as a battery, a super capacitor, or a capacitor, etc., which is not limited in particular. The scheme of the embodiment takes the second charge-discharge circuit 311 including a capacitor as an example, and the second charge-discharge circuit 311 includes a first capacitor C1, wherein the first capacitor C1 can be a single capacitor or a capacitor group formed by multiple capacitors in series and / or parallel, which is not limited in particular.

[0090] In actual scenarios, the charging and discharging time of the capacitor is directly related to the capacitance value. The larger the capacitance value, the more the corresponding stored charge, and the longer the charging and discharging time. Therefore, the scheme of the embodiment can configure different capacitance values of the first capacitors C1 for different output circuits 31 according to actual needs, so as to achieve independent setting of the delay time.

[0091] It can be understood that in another embodiment, the capacitance values of each first capacitor C1 can also be set to be completely the same, which can be selected according to actual needs, which is not limited herein.

[0092] The second charging and discharging circuit 311 includes the first capacitor C1, and the capacitance of the first capacitor C1 of each output circuit 31 can be set to be different, so that the delay time of different delay channels is set to be different, thereby meeting different delay time requirements.

[0093] Please refer to Figure 4 In some embodiments, the trigger component 10 further includes a first filter circuit 12, and the output end of each trigger circuit 11 is connected to the control end of the first switch circuit Q1 through the first filter circuit 12.

[0094] Specifically, the first filter circuit 12 is a circuit configured in front of the power supply component 20 and used for filtering the signal output to the control end of the first switch circuit Q1 of the power supply component 20. The structure of the first filter circuit 12 is not unique, which can be a single filter capacitor, an RC (Resistance Capacitance) filter circuit, or the like, and is not limited in particular.

[0095] In order to facilitate understanding of the scheme of the present application, the first filter circuit 12 includes a filter capacitor in the following embodiments, wherein the output end of each trigger circuit is connected to the first end of the filter capacitor and the control end of the first switch circuit Q1, and the second end of the filter capacitor is grounded.

[0096] In the above scheme, the first filter circuit 12 is further arranged between the trigger circuit 11 and the control end of the first switch circuit Q1, and the working safety of the first switch circuit Q1 is improved by filtering the signal input to the first switch circuit Q1.

[0097] Please refer to Figure 5 In some embodiments, the trigger circuit 11 includes a first anti-reverse circuit 111, the first end of the first anti-reverse circuit 111 is used for receiving the delay trigger signal, and the second end of the first anti-reverse circuit 111 is connected to the control end of the first switch circuit Q1 through the first filter circuit 12.

[0098] Specifically, the first anti-reverse circuit 111 is a circuit used for relieving the phenomenon that the delay trigger signal input to the current trigger circuit 11 flows into other trigger circuits 11 and thus reversely outputs the delay trigger signal. In an actual scenario, the trigger component 10 includes a plurality of trigger circuits 11, and after any one of the trigger circuits 11 receives the delay trigger signal, the signal output by the trigger circuit 11 is output to the power supply component 20 through the first filter circuit 12 under the action of the first anti-reverse circuit 111, thereby reducing the possibility of the signal flowing into other trigger circuits 11.

[0099] The above scheme, each trigger circuit 11 respectively includes a first anti-reverse circuit 111, so that the possibility of reducing the delay trigger signal backflow through other trigger circuit 11, improve the working reliability of the delay circuit.

[0100] Please refer to Figure 6 In some embodiments, the first anti-reverse circuit 111 includes a diode D1, the anode of the diode D1 is used to receive the delay trigger signal, the cathode of the diode D1 is connected to the control end of the first switch circuit Q1 through the first filter circuit 12.

[0101] Specifically, the diode D1 and an electronic device made of semiconductor material, when a forward voltage is applied between the two poles of the diode D1, the diode D1 is turned on, and when a reverse voltage is applied, the diode D1 is turned off. The embodiment utilizes the one-way conduction characteristic of the diode D1 to build the first anti-reverse circuit 111.

[0102] In this scheme, the delay trigger signal can flow into the control end of the first switch circuit Q1 through the diode D1 and the first filter circuit 12. Therefore, the delay circuit of the embodiment is suitable for the scene of high-level trigger delay. Normally, the delay circuit receives low level, and when there is a delay requirement, the delay circuit receives high-level delay trigger signal. Under the action of the high-level signal, the first switch circuit Q1 is triggered to conduct. Since the first charge-discharge circuit 21 is in an empty state, the second switch circuit Q2 is also triggered to conduct, the power supply signal flows into the controlled object, and charges the first charge-discharge circuit 21 and the second charge-discharge circuit 311, thereby starting the delay control function.

[0103] The above scheme uses a diode D1 as the first anti-reverse circuit 111, which has the advantages of simple circuit structure, saving circuit volume and circuit cost.

[0104] Please refer to Figure 7 In some embodiments, the first anti-reverse circuit 111 includes a fourth switch circuit Q4 and a diode D1, the control end of the fourth switch circuit Q4 is used to receive the delay trigger signal, the input end of the fourth switch circuit Q4 is connected to the second power supply VCC2, the output end of the fourth switch circuit Q4 is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to the control end of the first switch circuit Q1 through the first filter circuit 12.

[0105] Specifically, the scheme of the embodiment, the delay trigger signal is used as the conduction trigger of the fourth switch circuit Q4, after the fourth switch circuit Q4 receives the delay trigger signal, the fourth switch circuit Q4 is triggered to conduct, the signal output by the second power supply VCC2 is transmitted to the power supply assembly 20 through the first filter circuit 12.

[0106] Correspondingly, the embodiment is applicable to the scenario of low-level trigger delay. Normally, the delay circuit receives a high level, and when there is a delay requirement, the delay circuit receives a low-level delay trigger signal. Under the action of the low-level signal, the fourth switch circuit Q4 is turned on, the second power supply VCC2 connected with the fourth switch circuit Q4 outputs a high-level signal to the first switch circuit Q1, and the first switch circuit Q1 is triggered to be turned on. Since the first charge-discharge circuit 21 is in an empty state, the second switch circuit Q2 is also triggered to be turned on, the power supply signal flows into the controlled object, and charges the first charge-discharge circuit 21 and the second charge-discharge circuit 311, thereby starting the delay control function.

[0107] The above scheme uses the fourth switch circuit Q4 and the diode D1 to build the first anti-reverse circuit 111, and has high anti-reverse operation reliability.

[0108] Please refer to Figure 8 In some embodiments, the power supply assembly 20 further comprises a reset switch circuit 22, the control end of the reset switch circuit 22 is connected with the output end of the trigger circuit 11, the input end of the reset switch circuit 22 is connected with the second end of the first charge-discharge circuit 21, and the output end of the reset switch circuit 22 is grounded.

[0109] Specifically, the reset switch circuit 22 is connected with the second end of the first charge-discharge circuit 21 and the ground. After the delay ends, the control end of the reset switch circuit 22 has no input of the delay trigger signal, at this time, the reset switch circuit 22 is triggered to be turned on, the first charge-discharge circuit 21 is grounded, thereby releasing the stored electric energy of the first charge-discharge circuit 21, and the delay circuit returns to the state before the delay is started. That is, the delay circuit returns to the state of the first charge-discharge circuit 21 being empty, so as to continue to trigger the second switch circuit Q2 to be turned on when there is a delay requirement in the future.

[0110] The above scheme, the power supply assembly 20 is further provided with the reset switch circuit 22, when the delay trigger ends, that is, there is no output of the delay trigger signal, the reset switch circuit 22 is turned on, thereby releasing the stored electric energy of the first charge-discharge circuit 21, so that the power supply assembly 20 returns to the initial running state.

[0111] It should be pointed out that the structure of the reset switch circuit 22 is not unique. In an embodiment, the reset switch circuit 22 can be a switch device, by turning on the switch device, the first charge-discharge circuit 21 is grounded, and the electric energy is released.

[0112] Please refer to Figure 9In some embodiments, the reset switch circuit 22 comprises a fifth switch circuit Q5 and a discharge circuit R, the control end of the fifth switch circuit Q5 is connected to the output end of the trigger circuit 11, the input end of the fifth switch circuit Q5 is connected to the second end of the first charge-discharge circuit 21, the output end of the fifth switch circuit Q5 is connected to the first end of the discharge circuit R, and the second end of the discharge circuit R is grounded.

[0113] Specifically, in the scheme of the present embodiment, the reset switch circuit 22 comprises a fifth switch circuit Q5 and a discharge circuit R. When the delay trigger signal is interrupted, the fifth switch circuit Q5 will receive a low-level signal, so that the fifth switch circuit Q5 enters the conduction state, and at this time the first charge-discharge circuit 21 is grounded through the discharge circuit R, so that the electrical energy can be quickly released.

[0114] It should be pointed out that the specific structure of the discharge circuit R is not unique, and any device that can consume electrical energy can be used, such as a resistor, a light-emitting diode D1, etc., and the specific structure is not limited.

[0115] In the above scheme, the reset switch circuit 22 is formed by using the fifth switch circuit Q5 and the discharge circuit R, and the electrical energy stored in the first charge-discharge circuit 21 can be quickly consumed through the discharge circuit R, so that the discharge efficiency is high.

[0116] Further, please continue to refer to Figure 9 In some embodiments, in order to improve the operation reliability of the fifth switch circuit Q5, a current-limiting resistor RL can also be connected in series at the control end of the fifth switch circuit Q5.

[0117] It should be pointed out that the specific type of the first charge-discharge circuit 21 is not unique, and can be set to be consistent with the second charge-discharge circuit 311, or can be set to be different, and the specific structure is not limited.

[0118] For example, in some embodiments, please refer to Figure 10 The first charge-discharge circuit 21 comprises a second capacitor C2 and a first resistor R1, the first end of the second capacitor C2 is connected to the control end of the second switch circuit Q2, the second end of the second capacitor C2 is connected to the first end of the first resistor R1, and the common end is grounded, and the second end of the first resistor R1 is connected to the output end of the first switch circuit Q1.

[0119] Specifically, the first charge-discharge circuit 21 comprises a second capacitor C2 and a first resistor R1, and the power supply signal output by the first power supply VCC1 is transmitted to the second capacitor C2 after passing through the first switch circuit Q1 and the first resistor R1, so as to charge the second capacitor C2. The second capacitor C2 can be a single capacitor or a capacitor group formed by connecting multiple capacitors in series and / or in parallel.

[0120] The first charging and discharging circuit 21 comprises the second capacitor C2 and the first resistor R1, the electric energy is stored through the capacitor, and the first resistor R1 is arranged between the first switch circuit Q1 and the second capacitor C2 to flow limit, and the charging and discharging operation reliability is high.

[0121] Further, please continue to refer to Figure 10 In some embodiments, the power supply assembly 20 further comprises a second resistor R2, the second resistor R2 is connected in series between the second end of the first charging and discharging circuit 21 and the control end of the second switch circuit Q2, the current flowing into the second switch circuit Q2 is limited, and the operation safety of the second switch circuit Q2 is improved.

[0122] Please refer to Figure 11 In some embodiments, the power supply assembly 20 further comprises a second filter circuit, and the output end of the second switch circuit Q2 is connected to the controlled object through the second filter circuit.

[0123] Specifically, the second filter circuit 23 is further arranged between the second output circuit 31 and the controlled object, and the power supply signal flowing into the controlled object is filtered, so that the influence of the noise signal on the controlled object is alleviated.

[0124] The above scheme further comprises the filter circuit arranged at the front end of the controlled object, reduces the noise of the power supply signal flowing into the controlled object, and improves the operation reliability of the controlled object.

[0125] And / or, please refer to Figure 11 In some embodiments, the power supply assembly 20 further comprises a second anti-reverse circuit 24, and the output end of the second switch circuit Q2 is connected to the controlled object through the second anti-reverse circuit 24.

[0126] Specifically, the second anti-reverse circuit 24 is further arranged between the second output circuit 31 and the controlled object, and in the case that the second switch circuit Q2 is off, the signal of the controlled object or the output assembly 30 is prevented from flowing back to the power supply assembly 20 and impacting the second switch circuit Q2.

[0127] The above scheme further comprises the filter circuit arranged at the front end of the controlled object, reduces the noise of the power supply signal flowing into the controlled object, and improves the operation reliability of the controlled object.

[0128] It should be pointed out that the structure of the second filter circuit 23 is not unique, and can be consistent with the first filter circuit 12 or not, and is not limited specifically. For example, in an embodiment, please refer to Figure 11The second filter circuit 23 comprises a third resistor R3 and a third capacitor C3. The first end of the third resistor R3 is connected to the output end of the second switch circuit Q2. The second end of the third resistor R3 is connected to the first end of the third capacitor C3 and the second anti-reverse circuit 24. The second end of the third capacitor C3 is grounded.

[0129] Similarly, the structure of the second anti-reverse circuit 24 is not unique. It can be consistent with the first anti-reverse circuit 111 or inconsistent. The specific structure is not limited. For example, in one embodiment, please refer to Figure 11 The second anti-reverse circuit 24 comprises a diode D1. The anode of the diode D1 is connected to the second end of the third resistor R3 and the first end of the third capacitor C3. The cathode of the diode D1 is connected to the controlled object or connected to the controlled object through the output assembly 30.

[0130] In order to facilitate understanding of the technical solutions of the present application, the present application will be explained and described in detail below in combination with more detailed embodiments.

[0131] The delay circuit comprises a trigger assembly 10, a power supply assembly 20 and an output assembly 30. The trigger assembly 10 comprises a first filter circuit 12 and a plurality of trigger circuits 11. The plurality of trigger circuits 11 are respectively connected to the power supply assembly 20 through the first filter circuit 12. The output assembly 30 comprises a plurality of output circuits 31 corresponding to the number of the trigger circuits 11. The trigger circuit 11 and the output circuit 31 correspond one by one. In combination with the power supply assembly 20, a plurality of delay channels are formed. The same delay trigger signal can be simultaneously output to one trigger circuit 11 and one output circuit 31.

[0132] The output circuit 31 comprises a third switch circuit Q3 and a second charge-discharge circuit 311. The second charge-discharge circuit 311 comprises a first capacitor C1. The capacitance values of the first capacitors C1 in different output circuits 31 are not completely the same. The power supply assembly 20 comprises a first switch circuit Q1, a second switch circuit Q2, a first charge-discharge circuit 21, a reset switch circuit 22, a second filter circuit 23 and a second anti-reverse circuit 24. The reset switch circuit 22 comprises a fifth switch circuit Q5, a bleeder circuit R and a current-limiting resistor RL.

[0133] Scheme 1:

[0134] The trigger component 10 comprises a first anti-reverse circuit 111, which comprises a diode D1. In this scheme, the normal state delay circuit receives a low level, and when there is a delay requirement, the delay circuit receives a high level delay trigger signal. When any one of the trigger circuits 11 receives a high level signal, the control end of the third switch circuit Q3 of one of the output circuits 31 also receives a high level signal, and the third switch circuit Q3 of the output circuit 31 is turned on. The high level signal is transmitted to the first filter circuit 12 through the diode D1, and after being filtered by the first filter circuit 12, it is transmitted to the control end of the first switch circuit Q1, and the first switch circuit Q1 is triggered to turn on. Since the first charge-discharge circuit 21 is in an empty state, the second switch circuit Q2 is also triggered to turn on, and the power supply signal is transmitted to the second charge-discharge circuit 311 through the first switch circuit Q1, the second switch circuit Q2, the second filter circuit 23, the second anti-reverse circuit 24 and the third switch circuit Q3 in turn, and then to the controlled object, thereby maintaining the running state of the controlled object. The power supply signal can also charge the first charge-discharge circuit 21 through the first switch circuit Q1.

[0135] When the first charge-discharge circuit 21 is charged to a preset voltage threshold, the second switch circuit Q2 is triggered to turn off, at which time the power supply signal of the first power supply VCC1 stops being transmitted to the output component 30, and the second charge-discharge circuit 311 starts to discharge, thereby continuing to maintain the running state of the controlled object. Until the second charge-discharge circuit 311 completes the discharge and ends the signal output to the controlled object, the controlled object will switch the running state, and thus the delay control of the controlled object is completed.

[0136] Scheme 2:

[0137] The trigger component 10 comprises a first anti-reverse circuit 111, which comprises a fourth switch circuit Q4 and a diode D1. In this scheme, the normal state delay circuit receives a high level, and when there is a delay requirement, the delay circuit receives a low level delay trigger signal. When any one of the trigger circuits 11 receives a low level signal, the control end of the third switch circuit Q3 of one of the output circuits 31 also receives a low level signal, and the third switch circuit Q3 of the output circuit 31 is turned on. The low level signal is transmitted to the control end of the fourth switch circuit Q4, which controls the fourth switch circuit Q4 to be turned on. The signal output by the second power supply VCC2 connected to the fourth switch circuit Q4 is transmitted to the first switch circuit Q1 through the diode D1 and the first filter circuit 12, and the first switch circuit Q1 is triggered to be turned on. Since the first charge-discharge circuit 21 is in an empty state, the second switch circuit Q2 is also triggered to be turned on, and the power supply signal is transmitted to the second charge-discharge circuit 311 through the first switch circuit Q1, the second switch circuit Q2, the second filter circuit 23, the second anti-reverse circuit 24 and the third switch circuit Q3, and then to the controlled object, thereby maintaining the running state of the controlled object. The power supply signal can also charge the first charge-discharge circuit 21 through the first switch circuit Q1.

[0138] When the first charge-discharge circuit 21 is charged to a preset voltage threshold, the second switch circuit Q2 is triggered to be turned off, at which time the power supply signal of the first power supply VCC1 stops being transmitted to the output component 30, and the second charge-discharge circuit 311 starts to be discharged, thereby continuing to maintain the running state of the controlled object. Until the second charge-discharge circuit 311 completes the discharge and ends the signal output to the controlled object, the controlled object will switch the running state, and thus the delay control of the controlled object is completed.

[0139] Please refer to Figure 12 The application provides a battery management system, which comprises a processor 121, a high-low side driving chip 122 and the above-mentioned delay circuit 123. The processor 121 is used for outputting a delay trigger signal, the processor 121 is connected to the input end of the trigger circuit 11 and the high-low side driving chip 122, and the output end of the second switch circuit Q2 is connected to the high-low side driving chip 122.

[0140] Specifically, the structure and working principle of the delay circuit 123 are as shown in the above embodiments and the drawings, which will not be repeated here. In this embodiment, the processor 121 can be a battery management unit in the battery management system, or an additional device such as a micro control unit, which is not limited in particular. The controlled object is the high-low side drive chip 122, which is a chip that uses the change of the high and low levels of two drive signals (high side drive signal and bottom side drive signal) to realize the state control of the output end. In the normal state, the high-low side drive chip 122 realizes high-low side drive through the control signal output by the processor 121. In the abnormal state, the processor 121 loses the control ability of the high-low side drive chip 122, at which time the processor 121 outputs a delay trigger signal to the delay circuit 123, so that the delay circuit 123 intervenes to realize the delay control of the high-low side drive chip 122.

[0141] The above battery management system, the plurality of trigger circuits 11 share one power supply component 20, when any one trigger circuit 11 is triggered, the delay control of the high-low side drive chip 122 can be realized, and the delay multiplicity is high.

[0142] The application provides a battery device, which comprises a battery cell and the above battery management system.

[0143] Specifically, the battery management system is as shown in the above embodiments and the drawings, which will not be repeated here. In the battery device, the delay function part of the battery management system, the plurality of trigger circuits 11 share one power supply component 20, when any one trigger circuit 11 is triggered, the delay control of the high-low side drive chip 122 can be realized, and the delay multiplicity is high.

[0144] The application provides a vehicle, which comprises a vehicle power-on / off switch and the above battery management system, and the high-low side drive chip 122 is connected to the vehicle power-on / off switch.

[0145] Specifically, the battery management system is as shown in the above embodiments and the drawings, which will not be repeated here. The vehicle power-on / off switch is a switch device for controlling the power-on or power-off of the vehicle, which is generally a high-voltage relay (i.e. a relay capable of bearing a high voltage). The scheme of this embodiment is applied to the vehicle scene, and the high-low side drive chip 122 is used for the power-on / off control of the vehicle. In this way, through the delay action of the high-low side drive chip 122, the delay power-off of the vehicle can be realized, which is beneficial to giving the user a risk avoidance time for braking during driving.

[0146] The above vehicle, the delay function part of the battery management system, the plurality of trigger circuits 11 share one power supply component 20, when any one trigger circuit 11 is triggered, the delay control of the high-low side drive chip 122 can be realized, and the delay multiplicity is high.

[0147] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should be covered in the scope of the claims and the description of the present application. In particular, as long as there is no structural conflict, each technical feature mentioned in each embodiment can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A delay circuit, characterized by, The delay circuit comprises a trigger assembly, a power supply assembly and an output assembly. The trigger assembly comprises a plurality of trigger circuits, and an input end of each of the trigger circuits is configured to receive a delay trigger signal. The power supply assembly comprises a first switch circuit, a second switch circuit and a first charge-discharge circuit, an output end of each of the trigger circuits is connected to a control end of the first switch circuit, an input end of the first switch circuit is connected to a first power supply, an output end of the first switch circuit is connected to a first end of the first charge-discharge circuit and an input end of the second switch circuit, a control end of the second switch circuit is connected to a second end of the first charge-discharge circuit, and an output end of the second switch circuit is configured to be connected to a controlled object. In a case where the delay trigger signal is received by any one of the trigger circuits, the first switch circuit and the second switch circuit are turned on to output a power supply signal of the first power supply to the controlled object and charge the first charge-discharge circuit, and in a case where the first charge-discharge circuit is charged to a preset voltage threshold, the second switch circuit is turned off to stop outputting the power supply signal to the controlled object.

2. The delay circuit of claim 1, wherein The delay circuit further comprises an output assembly, the output assembly comprises a plurality of output circuits corresponding to the number of the trigger circuits, a control end of each of the output circuits is configured to receive the delay trigger signal, an input end of each of the output circuits is connected to an output end of the second switch circuit, an output end of each of the output circuits is configured to be connected to the controlled object, and the same delay trigger signal is simultaneously output to one of the trigger circuits and one of the output circuits.

3. The delay circuit of claim 2, wherein, The output circuit comprises a third switch circuit and a second charge-discharge circuit, a control end of the third switch circuit is configured to receive the delay trigger signal, an input end of the third switch circuit is connected to an output end of the second switch circuit, and an output end of the third switch circuit is connected to the controlled object through the second charge-discharge circuit.

4. The delay circuit of claim 3, wherein The second charge-discharge circuit comprises a first capacitor, a first end of the first capacitor is connected to the output end of the third switch circuit and the controlled object, and a second end of the first capacitor is grounded.

5. The delay circuit according to any one of claims 1 to 4, characterized by The trigger assembly further comprises a first filter circuit, and an output end of each of the trigger circuits is connected to the control end of the first switch circuit through the first filter circuit.

6. The delay circuit of claim 5, wherein, The trigger circuit comprises a first anti-reverse circuit, a first end of the first anti-reverse circuit is configured to receive the delay trigger signal, and a second end of the first anti-reverse circuit is connected to the control end of the first switch circuit through the first filter circuit.

7. The delay circuit of claim 6, wherein, The first anti-reverse circuit comprises a diode, an anode of the diode is configured to receive the delay trigger signal, and a cathode of the diode is connected to the control end of the first switch circuit through the first filter circuit.

8. The delay circuit of claim 6, wherein, The first anti-reverse circuit comprises a fourth switch circuit and a diode, a control end of the fourth switch circuit is configured to receive the delay trigger signal, an input end of the fourth switch circuit is connected to a second power supply, an output end of the fourth switch circuit is connected to an anode of the diode, and a cathode of the diode is connected to the control end of the first switch circuit through the first filter circuit.

9. The delay circuit according to any one of claims 1 to 4, characterized by The power supply assembly further comprises a reset switch circuit, a control end of the reset switch circuit is connected with an output end of the trigger circuit, an input end of the reset switch circuit is connected with a second end of the first charge-discharge circuit, and an output end of the reset switch circuit is grounded.

10. The delay circuit of claim 9, wherein, The reset switch circuit comprises a fifth switch circuit and a bleeder circuit, a control end of the fifth switch circuit is connected with an output end of the trigger circuit, an input end of the fifth switch circuit is connected with a second end of the first charge-discharge circuit, an output end of the fifth switch circuit is connected with a first end of the bleeder circuit, and a second end of the bleeder circuit is grounded.

11. The delay circuit according to any one of claims 1 to 4, characterized by The first charge-discharge circuit comprises a second capacitor and a first resistor, a first end of the second capacitor is connected with a control end of the second switch circuit, a second end of the second capacitor is connected with a first end of the first resistor, a common end formed is grounded, and a second end of the first resistor is connected with an output end of the first switch circuit.

12. The delay circuit according to any one of claims 1 to 4, characterized by The power supply assembly further comprises a second filter circuit, an output end of the second switch circuit is connected with the controlled object through the second filter circuit. And / or, the power supply assembly further comprises a second anti-reverse circuit, an output end of the second switch circuit is connected with the controlled object through the second anti-reverse circuit.

13. A battery management system, characterized by, The power supply assembly further comprises a processor, a high-low side drive chip and the delay circuit, the processor is used for outputting a delay trigger signal, the processor is connected with an input end of the trigger circuit and the high-low side drive chip, and an output end of the second switch circuit is connected with the high-low side drive chip.

14. A battery device characterized by comprising: The power supply assembly further comprises a processor, a high-low side drive chip and the delay circuit, the processor is used for outputting a delay trigger signal, the processor is connected with an input end of the trigger circuit and the high-low side drive chip, and an output end of the second switch circuit is connected with the high-low side drive chip.

15. A vehicle characterized by comprising: The power supply assembly further comprises a processor, a high-low side drive chip and the delay circuit, the processor is used for outputting a delay trigger signal, the processor is connected with an input end of the trigger circuit and the high-low side drive chip, and an output end of the second switch circuit is connected with the high-low side drive chip. The power supply assembly further comprises a processor, a high-low side drive chip and the delay circuit, the processor is used for outputting a delay trigger signal, the processor is connected with an input end of the trigger circuit and the high-low side drive chip, and an output end of the second switch circuit is connected with the high-low side drive chip.

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