Power module and forming protection structure for power module
By creating holes in the copper foil and combining them with a sintering layer, the problem of gate bus breakage during the process was solved, thus protecting the gate bus and improving the stability of the device.
Patent Information
- Application Number
- CN202423193102.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2034-12-24
AI Technical Summary
During the manufacturing process, the gate bus of a semiconductor wafer is prone to breakage due to excessive stress, leading to device damage.
It adopts a combination structure of copper foil and sintered layer. The copper foil has holes and does not overlap with the sintered layer. It is bonded to the wafer through the sintering process. The holes correspond to the gate bus to reduce stress.
It effectively reduces damage to the gate bus during the process, avoids breakage, and improves the reliability and connection stability of the components.
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Figure CN223598720U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Some embodiments of the present application relate to a power module and a protective structure for a power module. BACKGROUND
[0002] A power module is a package containing a plurality of power elements, such as semiconductor dies. The power elements can be disposed on a substrate and connected to specific terminals through traces. The power module is commonly used in transportation systems, for example, in motor drivers, frequency converters, inverters, power supplies, etc. However, when different elements are bonded together, the elements can be damaged due to process conditions. For example, the gate bus lines of a semiconductor die can be broken due to excessive stress during the process. Therefore, a method for reducing the stress on the semiconductor die during the process is needed. SUMMARY
[0003] Some embodiments of the present application provide a shaped protective structure for a power module. The shaped protective structure includes a copper foil and at least one sintered layer. The copper foil has a plurality of first holes. The at least one sintered layer is formed on the copper foil, and the at least one sintered layer and the first holes of the copper foil do not overlap in a cross-section, wherein the at least one sintered layer is configured to bond the copper foil to a die of the power module, and the first holes are configured to be on a gate bus line of the die and arranged along the gate bus line in a top view.
[0004] In some embodiments, the copper foil further includes a plurality of second holes, and the second holes of the copper foil are configured to be on a source pad of the die of the power module.
[0005] In some embodiments, the at least one sintered layer and the second holes do not overlap in the cross-section.
[0006] In some embodiments, the at least one sintered layer includes a plurality of sintered layers, and the first holes are arranged along the gaps between the sintered layers.
[0007] Some embodiments of the present application provide a power module including a die and a shaped protective structure. The die includes a source pad, a gate pad, and a gate bus line adjacent to the source pad and electrically connected to the gate pad. The shaped protective structure is on the die, wherein the shaped protective structure includes at least one sintered layer and a copper foil. The at least one sintered layer is disposed on the source pad. The copper foil has a plurality of first holes, and the first holes of the copper foil are on the gate bus line of the die and arranged along the gate bus line in a top view.
[0008] In some embodiments, the at least one sintered layer and the first holes do not overlap in a cross-section.
[0009] In some embodiments, the copper foil further comprises a plurality of second holes, the second holes of the copper foil being on the source pads of the wafer.
[0010] In some embodiments, the at least one sintering layer does not overlap with the gate bus in cross-section.
[0011] In some embodiments, the power module further comprises an encapsulation material, the encapsulation material covering the shaped protection structure and the wafer, wherein the encapsulation material extends into the first holes of the copper foil.
[0012] In some embodiments, the power module further comprises a substrate and a wire. The substrate is under the wafer. The wire connects the copper foil of the shaped protection structure and the substrate. BRIEF DESCRIPTION OF DRAWINGS
[0013] Figures 1-3 FIG. 1 is a top view illustrating a process of forming a power module in some embodiments of the present application.
[0014] Figure 4 FIG. 2 is a cross-sectional view illustrating a process of forming a power module in some embodiments of the present application.
[0015] Figure 5 FIG. 3 is a top view illustrating a process of forming a power module in some embodiments of the present application, and Figure 4 FIG. 4 is a cross-sectional view along the line A-A’ of FIG. 3. Figure 5
[0016] FIG. 5 is a cross-sectional view illustrating a process of forming a power module in some embodiments of the present application. Figures 6-8
[0017] FIG. 6 is a cross-sectional view illustrating a process of forming a power module in some other embodiments of the present application. Figure 9
[0018] FIG. 7 is a top view illustrating a process of forming a power module in some other embodiments of the present application, and Figure 10 FIG. 8 is a cross-sectional view along the line A-A’ of FIG. 7. Figure 9 Figure 10
[0019] Figures 11A-11J FIG. 9 is a diagram illustrating the distribution of holes of a copper foil in different embodiments of the present application. DETAILED DESCRIPTION
[0020] Some embodiments of the present application relate to a protective structure for a power module. The protective structure can be formed by combining a copper foil with a sintering layer, and the protective structure can be connected to the upper surface of a wafer by a sintering process. The copper foil of the protective structure of some embodiments of the present application has holes, and the holes can correspond to the gate bus of the wafer. Therefore, when the protective structure is combined with the wafer, the sintering process does not cause too much stress to the gate bus of the wafer, and the gate bus of the wafer is not damaged.
[0021] Figures 1-3 To illustrate the top view of the protective structure 100 manufactured in some embodiments of the present application. Referring to Figure 1 , a copper foil 110 is provided, and a plurality of holes H1 are formed on the copper foil 110. In some embodiments, the copper foil 110 can have any suitable shape, for example, the overall shape of the copper foil 110 is rectangular or circular. In some embodiments, the copper foil 110 can be subjected to various different surface treatments, for example, the surface of the copper foil 110 can be electroplated or electroless plated with metal nickel, gold, silver, nanobimorphous copper, or nanobimorphous silver. The holes H1 can be formed by any suitable method. In some embodiments, photolithography etching, laser drilling, or computer numerical control (CNC) mechanical drilling can be used to form a plurality of holes H1 on the copper foil 110. The holes H1 can have various different shapes, and the holes H1 can be arranged in different distribution patterns. In some embodiments, the holes H1 can be circular, oval, capsule-shaped, diamond-shaped, square, star-shaped, etc.
[0022] Referring to Figure 2In some embodiments, the plurality of sintering layers 120 can be arranged in an array. For example, two rows of sintering layers 120 can be arranged between two rows of holes H1. The sintering layers 120 can be in any suitable form. In some embodiments, the sintering layers 120 can be sintering paste, sintering sheet or sintering film. In some embodiments, the sintering layers 120 can be made of metal, such as silver. In some embodiments, the sintering layers 120 and the copper foil 110 are made of different materials. The sintering layers 120 can be applied to the copper foil 110 by printing, spraying, stamping, or mass transfer processes. The sintering layers 120 can then be fixed to the copper foil 110 by an adhesion process. In some embodiments, if the sintering layers 120 are sintering paste, the sintering layers 120 can be pre-dried before being fixed to the copper foil 110. In other embodiments, if the sintering layers 120 are sintering paste, the sintering paste can be printed on the copper foil 110 and then pre-dried. For example, the pre-drying conditions can be at a temperature of 60 to 140 degrees Celsius for 5 to 20 minutes. If the sintering layers 120 are sintering film, the sintering layers 120 can be fixed to the copper foil 110 at a lamination interface temperature of 120 to 150 degrees Celsius, a pressure of 2 to 5 MPa, and a time of 30 to 120 seconds. After the sintering layers 120 are fixed to the copper foil 110, a cutting protection tape can be attached to the side of the sintering layers 120 that does not contact the copper foil 110, so that the sintering layers 120 are not damaged or do not affect the subsequent cutting process.
[0023] Reference Figure 3 The protective structure 100 can be divided into a plurality of shaped protective structures 100A by cutting the copper foil 110. Each shaped protective structure 100A includes at least one of the copper foil 110, the plurality of sintering layers 120, and a portion of the plurality of holes H1. Specifically, the copper foil 110 with the sintering layers 120 adhered thereto can be cut and divided by a saw, laser cutting, stamping, etching, or water jet cutting. For example, the copper foil 110 can be cut along the dashed lines in FIG. 1, and each shaped protective structure 100A can include two sintering layers 120 and a column of holes H1 arranged along the gap between the two sintering layers 120. Figure 3
[0024] Figure 4 FIG. 4 is a cross-sectional view of a process for forming a power module according to some embodiments of the present application. Figure 5 To disclose the top view of the process of forming the power module in some embodiments of the present utility model, and Figure 4 To disclose the cross-sectional view of the process of forming the power module in some embodiments of the present utility model. Refer to Figure 5 the cross-sectional view of the line A-A' of Figures 6-8 To disclose the cross-sectional view of the process of forming the power module in some embodiments of the present utility model. Refer to Figure 4 and Figure 5 The molding protection structure 100A is joined with the wafer 200 to form the power module 700. The wafer 200 can include a semiconductor layer 210, a source pad 220, a gate pad 230( Figure 5 ), a gate bus line 240, a protection layer 250, and a drain pad 260. The semiconductor layer 210 can include a plurality of doped regions, and different doped regions can be electrically connected to different elements. The source pad 220, the gate pad 230, and the gate bus line 240 are on the same side of the semiconductor layer 210. The gate bus line 240 can be adjacent to the source pad 220. As seen from the top view of the wafer 200( Figure 5 ), the source pad 220 can be located in the lower half of the wafer 200, and the gate pad 230 can be located in the upper half of the wafer 200. The source pad 220 and the gate bus line 240 can be respectively connected to different doped regions, and electrically isolated between the source pad 220 and the gate bus line 240. The gate bus line 240 is further electrically connected to the gate pad 230.
[0025] In some embodiments, the number of source pads 220 can be two, and the number of gate pads 230 can be three, but the present utility model is not limited thereto. In some embodiments, the gate bus line 240 can be between the two source pads 220. The protection layer 250 covers the gate bus line 240 and is used to protect the gate bus line 240, and the protection layer 250 does not cover the source pad 220 and the gate pad 230. The drain pad 260 and the source pad 220 are on opposite sides of the semiconductor layer 210. In some embodiments, the semiconductor layer 210 can be made of a semiconductor material, such as silicon or silicon carbide. The source pad 220, the gate pad 230, the gate bus line 240, and the drain pad 260 can be made of a conductor, such as metal. The protection layer 250 can be made of a dielectric material, such as silicon oxide. In some embodiments, the wafer 200 can be pre-joined to the metal layer 320 of the substrate through the sintering layer 350.
[0026] When the molding protection structure 100A is joined with the wafer 200, the molding protection structure 100A and the source pad 220 of the wafer 200 are joined through at least one of the sintering layers 120. Refer to Figure 4 , the hole H1 of the copper foil 110 and the sintering layer 120 do not overlap in the cross-section, and the sintering layer 120 and the gate bus line 240 do not overlap in the cross-section. The hole H1 of the copper foil 110 is configured to be on the gate bus line 240 of the wafer 200, and as Figure 5As shown in the top view, the gate bus 240 is arranged along the wafer 200. It should be noted that because the gate bus 240 is covered by the protective layer 250, therefore... Figure 5 The holes H1, illustrated as copper foil 110, are arranged along the protective layer 250.
[0027] According to some embodiments of the present invention, the number of sintered layers 120 included in each molded protective structure 100A corresponds to the number of source pads 220 of the wafer 200. Specifically, the number of sintered layers 120 included in each molded protective structure 100 is equal to the number of source pads 220 of the wafer 200, and when the molded protective structure 100A is bonded to the wafer 200, each sintered layer 120 contacts the source pad 220.
[0028] Specifically, in the process of bonding the molded protective structure 100A to the wafer 200, a temporary die bonding process can be performed first, followed by a permanent bonding process, to bond the molded protective structure 100A to the wafer 200. The temporary die bonding process is as follows: Figure 4 As shown, the packaged molded protective structure 100A can be temporarily fixed to the source pad 220 on the surface of the wafer 200 by a hot-pressing process using a die bonder (DB). In some embodiments, the temporary die bonding process is performed at a temperature of 100 to 160 degrees Celsius, a pressure of 0.5 to 4 MPa, and a time of 200 to 2000 milliseconds.
[0029] refer to Figure 6 After performing a temporary die-bonding process, a permanent bonding process can be performed to permanently bond the sintered layer 120 of the formed protective structure 100A to the source pad 220 on the surface of the wafer 200. Specifically, a polymer layer PO can be placed on top of a copper foil 110, and then a pressure head P is used to apply specific pressure and temperature to the copper foil 110 to ensure permanent bonding between the sintered layer 120 of the protective structure 100 and the source pad 220 on the surface of the wafer 200. In some embodiments, the polymer layer PO can be a PTFE (polytetrafluoroethylene) layer. In some embodiments, the permanent bonding process is performed at a temperature of 200 to 300 degrees Celsius, a pressure of 5 to 30 MPa, and a time of 1 to 5 minutes. After the permanent bonding process is completed, the polymer layer PO can be removed.
[0030] Generally, if the shaped protection structure does not have a specific design for protecting the gate bus lines 240, the stress generated by the permanent bonding process can cause the gate bus lines of the underlying wafer to break, resulting in poor contact between the gate pads and the doped regions in the semiconductor layer underneath. According to embodiments of the present disclosure, when the shaped protection structure 100A is joined to the wafer 200, the holes H1 are arranged on the gate bus lines 240 of the wafer 200, and from the top view, the holes H1 are arranged along the gate bus lines 240 of the wafer 200 Figure 5 Therefore, when the permanent bonding process is performed, the copper foil 110 generates less stress on the gate bus lines 240 of the wafer 200, and does not cause too much damage to the gate bus lines 240 of the wafer 200. In addition, the sintered layer 120 of the shaped protection structure 100A does not overlap the gate bus lines 240 of the wafer 200. Therefore, when the permanent bonding process is performed, the sintered layer 120 densified by diffusion also does not cause too much damage to the gate bus lines 240.
[0031] Referring to Figure 7 The wafer 200 is joined to the substrate 300. In some embodiments, the wafer 200 can also be joined to the substrate 300 before the protection structure 100 is joined to the wafer 200. The substrate 300 can include a carrier plate 310 and a metal layer 320 coated on a surface of the carrier plate 310, a metal layer 330, and a metal layer 340. The metal layer 320 and the metal layer 330 are on the same side of the carrier plate 310. The metal layer 320 and the metal layer 340 are on opposite sides of the carrier plate 310. The wafer 200 can be joined to the metal layer 320 of the substrate 300 through a sintered layer 350. Specifically, the metal layer 320 can be connected to the drain pads 260 of the wafer 200. In some embodiments, before the wafer 200 is joined to the substrate 300, the metal layer 340 of the substrate 300 can be joined to the base plate 400 through a sintered layer 360. In some embodiments, the substrate 300 can be made of an insulating material, such as ceramic. The metal layer 320, the metal layer 330, and the metal layer 340 can be made of a suitable metal, such as copper. The sintered layer 350 and the sintered layer 360 can be made of silver.
[0032] Next, the molding protection structure 100A is bonded to the substrate 300 by wire 500. Specifically, the wire 500 connects the copper foil 110 of the molding protection structure 100A to the metal layer 330 of the substrate 300 to provide electrical connection between the source pad 220 of the die 200 and the metal layer 330 of the substrate 300. In some embodiments, the wire 500 can pass through at least one hole H1 in the top view. In some embodiments, the wire 500 can be a copper wire or a copper ribbon. In some embodiments, the hole H1 has a diameter of 0.2 millimeter (mm). In embodiments where the wire 500 is a copper wire, the wire 500 has a diameter of 0.4 mm; in embodiments where the wire 500 is a copper ribbon, the wire 500 has a diameter of 1 mm.
[0033] Reference is made to Figure 8 A packaging material 600 is formed to cover the molding protection structure 100A, the die 200, the substrate 300, the backplane 400, and the wire 500, and the packaging material 600 extends into the hole H1. The packaging material 600 further contacts the protection layer 250 and serves to protect the gate bus line 240 to enhance the reliability of the gate bus line 240. In some embodiments, the packaging material 600 can be a polymer material with high flowability, and thus is easy to flow into the hole H1.
[0034] Figure 9 Reference is made to Figure 10 Reference is made to Figure 9 Reference is made to Figure 10 Reference is made to Figure 9 The molding protection structure 100A is bonded to the die 200 to form a power module 800. Figures 9-10 The power module 800 of Figures 4-8 The difference between the power module 800 of Figures 9-10 The copper foil 110 of the molding protection structure 100A further includes a plurality of holes H2 to improve the stress release effect. The sintering layer 120 and the holes H2 of the copper foil 110 do not overlap in the cross-sectional view. When the molding protection structure 100A is bonded to the die 200, the holes H2 of the copper foil 110 are disposed on the source pad 220 of the die 200 of the power module. The holes H2 can be various different shapes and different arrangements. In some embodiments, the holes H2 can be circular, oval, capsule-shaped, diamond-shaped, square-shaped, star-shaped, etc.
[0035] Figures 11A-11J Reference is made to Figures 11A-11JIn some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11A In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11B In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11A In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11A In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11B In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows.
[0036] In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11C In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11D In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11E In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows.
[0037] In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11F In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11G In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11H In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11I In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows. Figure 11J In some embodiments, the holes H are circular, and the holes H are arranged in a plurality of rows. The holes H of each row are misaligned with the holes H of adjacent rows, and the holes H of each row are offset with respect to the holes H of adjacent rows. In particular, some of the holes H are aligned with the center points of the center lines of two adjacent holes H of adjacent rows.
[0038] It should be noted that although Figures 11A-11J To illustrate the distribution of the holes H of the copper foil of different embodiments, however, as long as a portion of the holes H (for example Figure 5 H1 in FIG. 1) are located on the gate bus lines of the wafer and arranged along the gate bus lines in the top view after the molding protective structure is bonded to the wafer, the copper foil of the molding protective structure of the present application can reduce the stress on the gate bus lines in the bonding process (for example Figure 4 the temporary die bonding process of FIG. 1 and Figure 6 the permanent bonding process of FIG. 2) to avoid the fracture of the gate bus lines.
[0039] The above only describes some embodiments of the present application, not all embodiments, and any equivalent changes made by those skilled in the art through reading the description of the present application to the technical solutions of the present application are all covered by the claims of the present application.
[0040]
Symbol Description
[0041] 100: protective structure
[0042] 100A: molding protective structure
[0043] 110: copper foil
[0044] 120, 350, 360: sintering layer
[0045] 200: wafer
[0046] 210: semiconductor layer
[0047] 220: source pad
[0048] 230: gate pad
[0049] 240: gate bus line
[0050] 250: protective layer
[0051] 260: drain pad
[0052] 300: substrate
[0053] 310: carrier plate
[0054] 320, 330, 340: metal layer
[0055] 400: bottom plate
[0056] 500: wire
[0057] 600: encapsulation material
[0058] 700, 800: power module
[0059] A-A': line
[0060] DB: die bonder
[0061] H, H1, H2: hole
[0062] P: pressure head
[0063] PO: polymer layer.
Claims
1. A shaped protective structure for a power module, characterized by, A copper foil having a plurality of first holes; and at least one sintering layer formed on the copper foil, and the at least one sintering layer does not overlap with the plurality of first holes of the copper foil in a cross section; wherein the at least one sintering layer is configured to bond the copper foil to a wafer of the power module, and the plurality of first holes is configured to be on a gate bus line of the wafer and arranged along the gate bus line in a top view. wherein the copper foil further comprises a plurality of second holes, the plurality of second holes of the copper foil is configured to be on a source pad of the wafer.
2. The shaped protective structure of claim 1, wherein, wherein the at least one sintering layer does not overlap with the plurality of second holes in the cross section.
3. The shaped protective structure of claim 2, wherein, wherein, 4. The shaped protective structure of claim 1, wherein, the at least one sintering layer comprises a plurality of sintering layers, and the plurality of first holes is arranged along a gap between the plurality of sintering layers. A wafer comprising:
5. A power module, characterized by a source pad; a gate pad; a gate bus line adjacent to the source pad and electrically connected to the gate pad; a shaped protection structure on the wafer, wherein the shaped protection structure comprises: at least one sintering layer disposed on the source pad; and a copper foil having a plurality of first holes arranged on the gate bus line of the wafer and along the gate bus line in a top view. wherein the at least one sintering layer does not overlap with the plurality of first holes in a cross section. wherein the copper foil further comprises a plurality of second holes, the plurality of second holes of the copper foil is on the source pad of the wafer. wherein the at least one sintering layer does not overlap with the gate bus line in the cross section.
6. The power module of claim 5, wherein, further comprising:
7. The power module of claim 5, wherein, an encapsulation material covering the shaped protection structure and the wafer, wherein the encapsulation material extends into the plurality of first holes of the copper foil.
8. The power module of claim 5, wherein, further comprising:
9. The power module of claim 5, wherein, a substrate under the wafer; a wire connecting the copper foil of the shaped protection structure and the substrate.
10. The power module of claim 5, wherein,