Switching circuit based on VGA interface

Abstract

The utility model discloses a conversion circuit based on a VGA (Video Graphics Array) interface, which relates to the technical field of digital signal processing and comprises a first VGA interface, a second VGA interface, a third VGA interface, a first amplifier, a second amplifier and a buffer, the first VGA interface is electrically connected with the input end of the first amplifier, the input end of the second amplifier and the input end of the buffer; the second VGA interface is electrically connected with the output end of the first amplifier and the output end of the buffer; and the third VGA interface is electrically connected with the output end of the second amplifier and the output end of the buffer. The beneficial effects of the utility model are that one-in and two-out of the video analog signal and the line-field signal can be realized so as to meet the application requirements and optimize the user experience.

Description

TECHNICAL FIELD

[0001] The utility model relates to digital signal processing technical field more specifically, relate to a kind of conversion circuit based on VGA interface. BACKGROUND

[0002] VGA interface (Video Graphics Array) is a kind of standard interface for transmitting video signals, usually used to connect between computer and display, widely used in computer display and graphics work, projector and display device, industry and embedded device, education and training, medical equipment and other scenes for.

[0003] In some specific application scenarios, the content that computer needs to show needs to be displayed by two displays, based on this, the utility model provides a kind of conversion circuit based on VGA interface, can realize the one-in two-out of video analog signal and line field signal, to meet the application demand, optimize user experience. UTILITY MODEL CONTENT

[0004] In order to overcome the deficiencies of the prior art, the utility model provides a kind of conversion circuit based on VGA interface, can realize the one-in two-out of video analog signal and line field signal, to meet the application demand, optimize user experience.

[0005] The utility model solves technical scheme that its technical problem adopts: a kind of conversion circuit based on VGA interface, its improvement lies in, the conversion circuit based on VGA interface includes first VGA interface, second VGA interface, third VGA interface, first amplifier, second amplifier and buffer, and the input end of first VGA interface is electrically connected with the input end of first amplifier, the input end of second amplifier and the input end of buffer;Second VGA interface is electrically connected with the output end of first amplifier and the output end of buffer;The output end of second amplifier and the output end of buffer are electrically connected with third VGA interface.

[0006] In the above structure, the first VGA interface, the second VGA interface and the third VGA interface all include a VGA_R pin, a VGA_B pin, a VGA_G pin, a VGA_HSYNC pin and a VGA_VSYNC pin; the VGA_R pin, the VGA_B pin and the VGA_G pin of the first VGA interface are electrically connected with the input end of the first amplifier and the input end of the second amplifier, and the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the input end of the buffer; the VGA_R pin, the VGA_B pin and the VGA_G pin of the second VGA interface are electrically connected with the output end of the first amplifier, and the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the output end of the buffer; the VGA_R pin, the VGA_B pin and the VGA_G pin of the third VGA interface are electrically connected with the output end of the second amplifier, and the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the output end of the buffer.

[0007] In the above structure, the first amplifier includes a first amplification chip, the first amplification chip includes a RIN pin, a GIN pin, a BIN pin, a ROUT pin, a GOUT pin and a BOUT pin, the RIN pin of the first amplification chip is electrically connected with the VGA_R pin of the first VGA interface, the GIN pin is electrically connected with the VGA_G pin of the first VGA interface, the BIN pin is electrically connected with the VGA_B pin of the first VGA interface, the ROUT pin is electrically connected with the VGA_R pin of the second VGA interface, the GOUT pin is electrically connected with the VGA_G pin of the second VGA interface, and the BOUT pin is electrically connected with the VGA_B pin of the second VGA interface.

[0008] In the above structure, the first amplification chip is ISL59833 I AZ.

[0009] In the above structure, the second amplifier includes a second amplification chip, the second amplification chip includes a RIN pin, a GIN pin, a BIN pin, a ROUT pin, a GOUT pin and a BOUT pin, the RIN pin of the second amplification chip is electrically connected with the VGA_R pin of the first VGA interface, the GIN pin is electrically connected with the VGA_G pin of the first VGA interface, the BIN pin is electrically connected with the VGA_B pin of the first VGA interface, the ROUT pin is electrically connected with the VGA_R pin of the third VGA interface, the GOUT pin is electrically connected with the VGA_G pin of the third VGA interface, and the BOUT pin is electrically connected with the VGA_B pin of the third VGA interface.

[0010] In the above structure, the second amplification chip is ISL59833 I AZ.

[0011] In the above structure, the buffer includes a buffer chip, the buffer chip includes A1 pin, A2 pin, A3 pin, A4 pin, Y1 pin, Y2 pin, Y3 pin and Y4 pin, the A1 pin and the A2 pin are electrically connected with the VGA_HSYNC pin of the first VGA interface, the A3 pin and the A4 pin are electrically connected with the VGA_VSYNC pin of the first VGA interface, the Y2 pin is electrically connected with the VGA_HSYNC pin of the second VGA interface, the Y4 pin is electrically connected with the VGA_VSYNC pin of the second VGA interface, the Y1 pin is electrically connected with the VGA_HSYNC pin of the third VGA interface, and the Y3 pin is electrically connected with the VGA_VSYNC pin of the third VGA interface.

[0012] In the above structure, the model of the buffer chip is SN74LS125ANSR.

[0013] The beneficial effects of the present application are as follows: the first amplifier and the second amplifier are used for sampling and amplifying the signals of the first VGA interface respectively, the first amplifier transmits the amplified signals to the second VGA interface and outputs, and the second amplifier transmits the amplified signals to the third VGA interface and outputs, so that the one-in and two-out of the video analog signals are realized; and the line field signal driving is enhanced through the buffer, so that the one-in and two-out of the line field signal are realized, the application requirements are met, and the user experience is optimized. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 It is a whole structure schematic view of the conversion circuit based on the VGA interface of the present application;

[0015] Figure 2 It is a structure schematic view of the first amplifier of the conversion circuit based on the VGA interface of the present application;

[0016] Figure 3 It is a structure schematic view of the second amplifier of the conversion circuit based on the VGA interface of the present application;

[0017] Figure 4 It is a buffer structure schematic view of the conversion circuit based on the VGA interface of the present application. DETAILED DESCRIPTION

[0018] The present application is further described below in combination with the drawings and embodiments.

[0019] The concept, specific structure and generated technical effects of the present application will be described clearly and completely in combination with the embodiments and drawings, so as to fully understand the purpose, features and effects of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application. In addition, all the connection relationships involved in the patent do not mean that the components are directly connected, but means that the better connection structure can be composed by adding or reducing the connection auxiliary parts according to the specific implementation situation. The various technical features in the present application can be combined interactively without mutual contradiction and conflict.

[0020] Referring to Figures 1-4 The utility model discloses a conversion circuit based on VGA interface, conversion circuit based on VGA interface includes first VGA interface, second VGA interface, third VGA interface, first amplifier, second amplifier and buffer, first VGA interface and first amplifier's input, second amplifier's input and buffer's input electric connection, second VGA interface and first amplifier's output and buffer's output electric connection, third VGA interface and second amplifier's output and buffer's output electric connection.

[0021] It should be noted that in the embodiment, the first VGA interface is used as an input port of the video analog signal, and is configured to receive the video analog signal from a source device (such as a computer); the second VGA interface is used as an output port, and the video analog signal can be output to the second VGA interface after processing; the third VGA interface is used as another output port, and the video analog signal can also be output to the third VGA interface after processing; the first amplifier is configured to amplify the video analog signal transmitted to the second VGA interface, and is configured to increase the intensity of the video analog signal, so that the quality of the video analog signal is maintained during transmission; the second amplifier is configured to amplify the video analog signal transmitted to the third VGA interface, and is also configured to increase the intensity of the video analog signal, so that the quality of the video analog signal is maintained during transmission; and the buffer is configured to drive and enhance the horizontal field signal, so as to realize one-in and two-out of the horizontal field signal; in the specific implementation of the utility model, the first VGA interface is connected with the source device, and the second VGA interface and the third VGA interface are respectively connected with two displays; the source device transmits the video analog signal to the input end of the first amplifier and the second amplifier through the first VGA interface, the first amplifier and the second amplifier amplify the video analog signal, increase the intensity of the video analog signal, and transmit the amplified video analog signal to the display through the second VGA interface and the third VGA interface; the source device transmits the horizontal field signal to the buffer through the first VGA interface, the buffer drives and enhances the horizontal field signal, and transmits the horizontal field signal to the display through the second VGA interface and the third VGA interface, so as to realize one-in and two-out of the video analog signal and the horizontal field signal, so as to meet the application requirement and optimize the user experience.

[0022] Referring to Figure 1 As shown in FIG. 1, the first VGA interface, the second VGA interface and the third VGA interface all include a VGA_R pin, a VGA_B pin, a VGA_G pin, a VGA_HSYNC pin and a VGA_VSYNC pin; the VGA_R pin, the VGA_B pin and the VGA_G pin of the first VGA interface are electrically connected with the input end of the first amplifier and the input end of the second amplifier, and the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the input end of the buffer; the VGA_R pin, the VGA_B pin and the VGA_G pin of the second VGA interface are electrically connected with the output end of the first amplifier, and the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the output end of the buffer; and the VGA_R pin, the VGA_B pin and the VGA_G pin of the third VGA interface are electrically connected with the output end of the second amplifier, and the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the output end of the buffer.

[0023] It should be noted that in the embodiment, the VGA_R pin is used to transmit a video red signal (Red), the VGA_G pin is used to transmit a video green signal (Green), and the VGA_B pin is used to transmit a video blue signal (Blue); the VGA_HSYNC pin is used to transmit a horizontal line field signal (Horizontal Sync), and the VGA_VSYNC pin is used to transmit a vertical line field signal (Vertical Sync), which together transmit color information and display timing of an image, so as to ensure that the display can correctly present the image; the first amplifier and the second amplifier are used to amplify amplitudes of the video red signal (Red), the video green signal (Green), and the video blue signal (Blue), so as to ensure that the signals can be effectively transmitted to subsequent circuits or interfaces, and reduce signal loss and attenuation; and the buffer (Buffer) is used to isolate and enhance the horizontal line field signal (Horizontal Sync) and the vertical line field signal (Vertical Sync), so as to ensure that the signals remain stable and reliable when transmitted between multiple paths.

[0024] Referring to FIGS. 1 to 3, the first VGA interface includes a VGA_R pin, a VGA_G pin, a VGA_B pin, a VGA_HSYNC pin, and a VGA_VSYNC pin. Figure 1 and Figure 2 As shown in FIGS. 1 to 3, the first amplifier includes a first amplification chip, the first amplification chip includes an RIN pin, a GIN pin, a BIN pin, an ROUT pin, a GOUT pin, and a BOUT pin, the RIN pin of the first amplification chip is electrically connected with the VGA_R pin of the first VGA interface, the GIN pin is electrically connected with the VGA_G pin of the first VGA interface, the BIN pin is electrically connected with the VGA_B pin of the first VGA interface, the ROUT pin is electrically connected with the VGA_R pin of the second VGA interface, the GOUT pin is electrically connected with the VGA_G pin of the second VGA interface, and the BOUT pin is electrically connected with the VGA_B pin of the second VGA interface; and the model of the first amplification chip is ISL59833 I AZ.

[0025] It should be noted that in the embodiment, the first VGA interface inputs the video red signal (Red), the video green signal (Green) and the video blue signal (Blue) to the amplification chip through the RIN pin, the GIN pin and the BIN pin; the amplification chip amplifies the input video red signal (Red), the video green signal (Green) and the video blue signal (Blue), enhances the amplitude of the signal, so as to ensure that the signal will not be attenuated in long distance transmission, and ensure that the signal strength is sufficient and clear; the amplified video red signal (Red), the video green signal (Green) and the video blue signal (Blue) are output to the second VGA interface through the ROUT pin, the GOUT pin and the BOUT pin, so that the second VGA interface can receive the amplified signal and transmit it to the display or other devices, ensuring that the image is correctly displayed on the display connected with the second VGA interface.

[0026] Referring to FIGS. 1 to 3, the first VGA interface includes a first VGA chip, and the first VGA chip includes a VGA_R pin, a VGA_G pin, a VGA_B pin, a RIN pin, a GIN pin and a BIN pin. The VGA_R pin of the first VGA chip is electrically connected with the RIN pin of the second amplification chip, the VGA_G pin is electrically connected with the GIN pin, and the VGA_B pin is electrically connected with the BIN pin. Figure 1 Figure 3 The second amplification chip includes a second amplification chip, and the second amplification chip includes a RIN pin, a GIN pin, a BIN pin, a ROUT pin, a GOUT pin and a BOUT pin. The RIN pin of the second amplification chip is electrically connected with the VGA_R pin of the first VGA interface, the GIN pin is electrically connected with the VGA_G pin of the first VGA interface, the BIN pin is electrically connected with the VGA_B pin of the first VGA interface, the ROUT pin is electrically connected with the VGA_R pin of the third VGA interface, the GOUT pin is electrically connected with the VGA_G pin of the third VGA interface, and the BOUT pin is electrically connected with the VGA_B pin of the third VGA interface. The model of the second amplification chip is ISL59833 I AZ.

[0027] It should be noted that in the embodiment, the first VGA interface inputs the video red signal (Red), the video green signal (Green) and the video blue signal (Blue) to the amplification chip through the RIN pin, the GIN pin and the BIN pin; the amplification chip amplifies the input video red signal (Red), the video green signal (Green) and the video blue signal (Blue), enhances the amplitude of the signal, so as to ensure that the signal will not be attenuated in long distance transmission, and ensure that the signal strength is sufficient and clear; the amplified video red signal (Red), the video green signal (Green) and the video blue signal (Blue) are output to the third VGA interface through the ROUT pin, the GOUT pin and the BOUT pin, so that the third VGA interface can receive the amplified signal and transmit it to the display or other devices, ensuring that the image is correctly displayed on the display connected with the third VGA interface.

[0028] ​Referring to Figure 1 and Figure 4 As shown in the figure, the buffer includes a buffer chip, the buffer chip includes A1 pin, A2 pin, A3 pin, A4 pin, Y1 pin, Y2 pin, Y3 pin and Y4 pin, the A1 pin and A2 pin are electrically connected with the VGA_HSYNC pin of the first VGA interface; the A3 pin and A4 pin are electrically connected with the VGA_VSYNC pin of the first VGA interface; the Y2 pin is electrically connected with the VGA_HSYNC pin of the second VGA interface; the Y4 pin is electrically connected with the VGA_VSYNC pin of the second VGA interface; the Y1 pin is electrically connected with the VGA_HSYNC pin of the third VGA interface; the Y3 pin is electrically connected with the VGA_VSYNC pin of the third VGA interface; the model of the buffer chip is SN74LS125ANSR.

[0029] It should be noted that in the embodiment, the horizontal line field signal (VGA_HSYNC) and the vertical line field signal (VGA_VSYNC) are processed by the buffer chip, specifically, the buffer chip includes A1 pin, A2 pin, A3 pin, A4 pin, Y1 pin, Y2 pin, Y3 pin and Y4 pin, wherein the A1 pin and A2 pin receive the horizontal line field signal from the first VGA interface; the A3 pin and A4 pin receive the vertical line field signal from the first VGA interface; after the horizontal line field signal and the vertical line field signal are driven and strengthened by the buffer chip, the Y2 pin transmits the strengthened horizontal line field signal to the second VGA interface, the Y1 pin transmits the strengthened horizontal line field signal to the third VGA interface, the Y4 pin transmits the strengthened vertical line field signal to the second VGA interface, and the Y3 pin transmits the strengthened vertical line field signal to the third VGA interface, so as to realize one-in and two-out of the line field signal, so as to meet the application requirements and optimize the user experience; in the specific implementation of the utility model, the buffer chip is mainly used for providing level conversion and signal isolation, so as to ensure that the quality of the signal is not lost in the transmission process; and the driving capacity of the signal can be enhanced, so as to ensure that the signal will not be attenuated or distorted when transmitted in a long distance or connected with multiple devices.

[0030] The above is a specific description of the preferred embodiment of the utility model, but the utility model creation is not limited to the embodiments, and those skilled in the art can make various equivalent modifications or replacements without departing from the spirit of the utility model, and these equivalent modifications or replacements are all included in the range defined by the claims of the present application.

Claims

1. A conversion circuit based on a VGA interface, characterized in that, The conversion circuit based on the VGA interface comprises a first VGA interface, a second VGA interface, a third VGA interface, a first amplifier, a second amplifier and a buffer, the first VGA interface is electrically connected with the input end of the first amplifier, the input end of the second amplifier and the input end of the buffer; the second VGA interface is electrically connected with the output end of the first amplifier and the output end of the buffer; the third VGA interface is electrically connected with the output end of the second amplifier and the output end of the buffer.

2. The conversion circuit based on VGA interface according to claim 1, characterized in that, The first VGA interface, the second VGA interface and the third VGA interface all comprise a VGA_R pin, a VGA_B pin, a VGA_G pin, a VGA_HSYNC pin and a VGA_VSYNC pin; the VGA_R pin, the VGA_B pin and the VGA_G pin of the first VGA interface are electrically connected with the input end of the first amplifier and the input end of the second amplifier, the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the input end of the buffer; the VGA_R pin, the VGA_B pin and the VGA_G pin of the second VGA interface are electrically connected with the output end of the first amplifier, the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the output end of the buffer; the VGA_R pin, the VGA_B pin and the VGA_G pin of the third VGA interface are electrically connected with the output end of the second amplifier, the VGA_HSYNC pin and the VGA_VSYNC pin are electrically connected with the output end of the buffer.

3. The conversion circuit based on VGA interface according to claim 2, characterized in that, The first amplifier comprises a first amplification chip, the first amplification chip comprises an RIN pin, a GIN pin, a BIN pin, a ROUT pin, a GOUT pin and a BOUT pin, the RIN pin of the first amplification chip is electrically connected with the VGA_R pin of the first VGA interface, the GIN pin is electrically connected with the VGA_G pin of the first VGA interface, the BIN pin is electrically connected with the VGA_B pin of the first VGA interface, the ROUT pin is electrically connected with the VGA_R pin of the second VGA interface, the GOUT pin is electrically connected with the VGA_G pin of the second VGA interface, and the BOUT pin is electrically connected with the VGA_B pin of the second VGA interface.

4. The conversion circuit based on VGA interface according to claim 3, characterized in that, The model of the first amplification chip is ISL59833 IAZ.

5. The conversion circuit based on VGA interface according to claim 2, characterized in that, The second amplifier comprises a second amplification chip, the second amplification chip comprises an RIN pin, a GIN pin, a BIN pin, a ROUT pin, a GOUT pin and a BOUT pin, the RIN pin of the second amplification chip is electrically connected with the VGA_R pin of the first VGA interface, the GIN pin is electrically connected with the VGA_G pin of the first VGA interface, the BIN pin is electrically connected with the VGA_B pin of the first VGA interface, the ROUT pin is electrically connected with the VGA_R pin of the third VGA interface, the GOUT pin is electrically connected with the VGA_G pin of the third VGA interface, and the BOUT pin is electrically connected with the VGA_B pin of the third VGA interface.

6. The conversion circuit based on VGA interface according to claim 5, characterized in that, The model of the second amplification chip is ISL59833 IAZ.

7. The conversion circuit based on VGA interface according to claim 2, characterized in that, The buffer comprises a buffer chip, the buffer chip comprises A1 pin, A2 pin, A3 pin, A4 pin, Y1 pin, Y2 pin, Y3 pin and Y4 pin, the A1 pin and the A2 pin are electrically connected with the VGA_HSYNC pin of the first VGA interface; the A3 pin and the A4 pin are electrically connected with the VGA_VSYNC pin of the first VGA interface; the Y2 pin is electrically connected with the VGA_HSYNC pin of the second VGA interface; the Y4 pin is electrically connected with the VGA_VSYNC pin of the second VGA interface; the Y1 pin is electrically connected with the VGA_HSYNC pin of the third VGA interface; and the Y3 pin is electrically connected with the VGA_VSYNC pin of the third VGA interface.

8. The conversion circuit based on VGA interface according to claim 7, characterized in that, The model of the buffer chip is SN74LS125 ANSR.

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