Low-temperature co-fired ceramic delay line
The delay line, made of low-temperature co-fired ceramic material, employs a spiral coil and multi-layer stacked design, which solves the problems of large size and heavy weight of existing delay lines, and achieves low-loss signal delay in the high-frequency band, making it suitable for electronic instruments and communication systems.
Patent Information
- Application Number
- CN202423100438.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-14
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2034-12-14
AI Technical Summary
Existing delay line components are large, heavy, and difficult to integrate, making them unsuitable for high-frequency applications.
The delay line, made of low-temperature co-fired ceramic material, includes a ceramic substrate, a delay structure, an input electrode, an output electrode, and a ground electrode. The delay structure consists of a ground layer and delay units. Signal delay is achieved through a spiral coil and a multi-layer stack design to ensure low-loss signal propagation.
It achieves low-loss signal delay in a small volume at high frequencies, improving signal stability and anti-interference capability. The frequency range is 100MHz-2GHz, with insertion loss ≤3dB, delay 1.5ns±50ps, and VSWR ≤1.5. It is suitable for applications in electronic instruments and communication systems.
Smart Images
Figure CN223612665U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of delay lines, and more particularly to a low-temperature co-fired ceramic delay line. BACKGROUND
[0002] A delay line is an element or device capable of delaying an electrical signal for a certain period of time. In various electronic instruments and communication system designs, delay lines are often used to achieve the purpose of delaying a signal for a specific period of time.
[0003] Existing delay lines include coaxial cable delay lines, bulk acoustic wave delay lines, surface acoustic wave delay lines, and optical fiber delay lines. The earliest to enter the application field is the coaxial cable delay line, but it has the disadvantages of large size and heavy weight. Bulk acoustic wave and surface acoustic wave delay lines can achieve a large delay in a small volume, but they are mainly applied in low frequency bands and have too much loss at high frequencies. Optical fiber delay lines have the characteristics of wide bandwidth, low loss, anti-interference, and good security, but the structure of the optical fiber delay line is quite complex and not easy to integrate, and the cost is relatively high. CONTENT OF THE INVENTION
[0004] The purpose of the embodiments of the application is to provide a low-temperature co-fired ceramic delay line to solve the technical problems of large size, heavy weight, and difficulty in integration of the delay line element in the prior art.
[0005] To achieve the above-mentioned purpose, the technical solution adopted by the application is:
[0006] A low-temperature co-fired ceramic delay line is provided, comprising:
[0007] A ceramic base body;
[0008] A time delay structure encapsulated in the ceramic base body, the time delay structure comprising a ground layer and a time delay unit, the ground layer being arranged on both sides of the time delay unit;
[0009] An input electrode, one end of which is connected to the input end of the time delay unit and the other end of which extends to the outside of the ceramic base body;
[0010] An output electrode, one end of which is connected to the output end of the time delay unit and the other end of which extends to the outside of the ceramic base body;
[0011] A ground electrode, one end of which is connected to the ground layer and the other end of which extends to the outside of the ceramic base body.
[0012] As a further improvement of the above technical solution:
[0013] Optionally, the time delay unit comprises an odd number of time delay sub-units arranged in sequence along the transverse direction.
[0014] Optionally, the time delay subunit comprises a first conductive column, an upper coil and a lower coil, the upper coil and the lower coil are electrically connected with the first conductive column, one end of the upper coil is further electrically connected with the upper coil of an adjacent time delay subunit, or one end of the lower coil is further electrically connected with the lower coil of an adjacent time delay subunit.
[0015] Optionally, one of the upper coil and the lower coil is a spiral coil wound in a clockwise direction, and the other of the upper coil and the lower coil is a spiral coil wound in an anticlockwise direction.
[0016] Optionally, the time delay subunit further comprises end plates arranged at two ends of the first conductive column, the end plates form a capacitor with the ground layer.
[0017] Optionally, the ground layer and the time delay subunit are vertically stacked in sequence.
[0018] Optionally, the time delay structure further comprises a second conductive column, one end of the second conductive column is electrically connected with the time delay subunit, and the other end of the second conductive column is electrically connected with the time delay subunit of an adjacent layer.
[0019] The low-temperature co-fired ceramic delay line provided by the application has the following beneficial effects:
[0020] The low-temperature co-fired ceramic delay line of the application comprises a ceramic base, a time delay structure, an input electrode, an output electrode and a grounding electrode. The ceramic base is made of low-temperature co-fired ceramic powder, the sintering temperature is ≤900℃, the dielectric constant of the ceramic powder is 4-100, and the dielectric loss factor is tanα≤0.002. The package size of the ceramic base is 5.0mm*2.5mm*1.5mm (length* width*height, tolerance ±0.1mm). The time delay structure is packaged in the ceramic base, the time delay structure comprises a grounding layer and a time delay unit, the grounding layer is arranged on the upper and lower sides of the time delay unit to form a complete shielding environment, which helps to reduce external electromagnetic interference and improve time delay stability. The time delay unit is responsible for introducing the required signal delay to ensure that the signal can propagate according to the predetermined path with low loss. The input electrode and the output electrode are responsible for the input and output of the signal respectively. One end of the input electrode is connected to the input end of the time delay unit, and the other end extends to the outside of the ceramic base for easy electrical connection with the external circuit. One end of the output electrode is connected to the output end of the time delay unit, and the other end also extends to the outside of the ceramic base. The grounding electrode is a grounding reference point of the entire delay line. One end of the grounding electrode is connected to the grounding layer, and the other end extends to the outside of the ceramic base for easy electrical connection with the external circuit. The input electrode, the output electrode and the grounding electrode are all made of three layers of metal paste. The innermost layer is silver paste, the silver paste content is 60%±20%, the middle layer is nickel layer, and the outermost layer is tin layer. The electrodes of the time delay unit are made of low-temperature silver paste, the sintering temperature of the silver paste is ≤900℃, and the silver content of the silver paste is 85%±10%. The working frequency range of the low-temperature co-fired ceramic delay line of the application is 100MHz-2GHz, the insertion loss is ≤3dB; the time delay is 1.5ns±50ps; and the standing wave ratio is ≤1.5. BRIEF DESCRIPTION OF DRAWINGS
[0021] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can also be obtained by those skilled in the art without creative labor.
[0022] Figure 1 The three-dimensional structure schematic diagram of the low-temperature co-fired ceramic delay line provided by the application;
[0023] Figure 2 The local enlarged structure schematic diagram of the low-temperature co-fired ceramic delay line provided by the application Figure 1 ;
[0024] Figure 3 The local enlarged structure schematic diagram of the low-temperature co-fired ceramic delay line provided by the application Figure 2 ;
[0025] Figure 4 Partial enlarged structure schematic of low temperature co-fired ceramic delay line provided in the present application Figure 3 ;
[0026] Figure 4 Partial enlarged structure schematic of low temperature co-fired ceramic delay line provided in the present application Figure 6 ;
[0027] Figure 5 Partial enlarged structure schematic of low temperature co-fired ceramic delay line provided in the present application Figure 7 ;
[0028] Figure 8 Top view structure schematic of time delay unit of low temperature co-fired ceramic delay line provided in the present application
[0029] Figure 1 Perspective structure schematic of time delay unit of low temperature co-fired ceramic delay line provided in the present application
[0030] In the drawings, various reference numbers refer to components having the same or similar function or structure.
[0031] 1, ceramic base; 2, time delay structure; 21, ground layer; 22, time delay unit; 221, first conductive column; 222, upper coil; 223, lower coil; 224, end plate; 23, second conductive column; 3, input electrode; 4, output electrode; 5, ground electrode. DETAILED DESCRIPTION
[0032] Embodiments of the present application will be described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numbers represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by reference to the drawings are exemplary and are intended to explain the present application, and cannot be understood as a limitation of the present application.
[0033] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise" are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application.
[0034] In addition, the terms "first", "second", "third", "fourth", "fifth", "sixth", "seventh" and "eighth" are only used for descriptive purpose and are not to be construed as indicating or implying relative importance or a specific number of the technical features indicated. Therefore, the features defined with "first", "second", "third", "fourth", "fifth", "sixth", "seventh" and "eighth" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more than two, unless otherwise explicitly specified and limited.
[0035] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be connected inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0036] In the present application, unless otherwise explicitly specified and limited, the "upper" or "lower" of the first feature to the second feature can include the direct contact of the first and second features, or can include the contact of the first and second features through another feature between them. Moreover, the "upper", "upper" and "upper" of the first feature to the second feature include the vertical direction of the first feature above and obliquely above the second feature, or only indicate that the horizontal height of the first feature is higher than that of the second feature. The "lower", "lower" and "lower" of the first feature to the second feature include the vertical direction of the first feature below and obliquely below the second feature, or only indicate that the horizontal height of the first feature is less than that of the second feature.
[0037] In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of the ordinary skilled in the art, when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, nor within the scope of the present application.
[0038] In the subsequent description, the suffixes such as "module", "component", "assembly" or "unit" are only used for the convenience of the description of the present application, and have no specific meaning. Therefore, they can be mixedly used.
[0039] The present application will be described in further detail below by specific embodiments in conjunction with the drawings.
[0040] As shown in Figure 2 and Figures 6 to 8 The present application provides a low-temperature co-fired ceramic delay line, which comprises a ceramic base body 1, a time delay structure 2, an input electrode 3, an output electrode 4 and a grounding electrode 5.
[0041] The ceramic substrate 1 is made of low-temperature co-fired ceramic powder, the sintering temperature is less than or equal to 900 DEG C, the dielectric constant of the ceramic powder is 4-100, and the dielectric loss factor tan a is less than or equal to 0.002. The packaging size of the ceramic substrate 1 is 5.0 mm*2.5 mm*1.5 mm (length*width*height, tolerance ±0.1 mm).
[0042] The delay structure 2 is packaged in the ceramic substrate 1, and the delay structure 2 includes a grounding layer 21 and a delay unit 22. The grounding layer 21 is arranged on the upper and lower sides of the delay unit 22 to form a complete shielding environment, which helps to reduce external electromagnetic interference and improve delay stability. The delay unit 22 is responsible for introducing the required signal delay to ensure that the signal can be propagated in a low-loss manner according to the predetermined path.
[0043] The input electrode 3 and the output electrode 4 are respectively responsible for the input and output of the signal. One end of the input electrode 3 is connected to the input end of the delay unit 22, and the other end extends to the outside of the ceramic substrate 1 for easy electrical connection with the external circuit. One end of the output electrode 4 is connected to the output end of the delay unit 22, and the other end also extends to the outside of the ceramic substrate 1. The grounding electrode 5 serves as the grounding reference point of the entire delay line. One end of the grounding electrode 5 is connected to the grounding layer 21, and the other end extends to the outside of the ceramic substrate 1 for easy electrical connection with the external circuit. The input electrode 3, the output electrode 4 and the grounding electrode 5 are all made of three layers of metal paste. The innermost layer is silver paste, the silver paste content is 60%±20%, the middle layer is nickel layer, and the outermost layer is tin layer. The electrodes of the delay unit 22 are made of low-temperature silver paste, the sintering temperature of the silver paste is less than or equal to 900 DEG C, and the silver content of the silver paste is 85%±10%.
[0044] The working frequency range of the low-temperature co-fired ceramic delay line of the present application is 100 MHz-2 GHz, the insertion loss is less than or equal to 3 dB, the delay is 1.5 ns±50 ps, and the standing wave ratio is less than or equal to 1.5.
[0045] As shown in the figure, Figures 6 to 8 In one specific embodiment of the present application, the delay unit 22 includes an odd number of delay sub-units arranged in sequence in the transverse direction. The delay sub-unit is the basic constituent element of the delay unit 22. The configuration of the odd number of sub-units makes the entire delay unit have symmetry in signal processing, which helps to reduce signal distortion and interference in the transmission process.
[0046] As shown in the figure, Figure 6 In one specific embodiment of the present application, the delay sub-unit includes a first conductive column 221, an upper layer coil 222 and a lower layer coil 223. Specifically, the upper layer coil 222 and the lower layer coil 223 are electrically connected with the first conductive column 221. One end of the upper layer coil 222 is also electrically connected with the upper layer coil 222 of the adjacent delay sub-unit, or one end of the lower layer coil 223 is also electrically connected with the lower layer coil 223 of the adjacent delay sub-unit.
[0047] When an electrical signal is input from the upper coil 222 of a certain time delay sub-unit, it is first conducted along the path of the upper coil 222, and then enters the first conductive post 221 directly connected to the upper coil 222. It then travels from the first conductive post 221 along the path of the lower coil 223. Since the lower coil 223 is electrically connected to the lower coil 223 of the adjacent time delay sub-unit, the electrical signal can be conducted through the lower coil 223 to the lower coil 223 of the adjacent time delay sub-unit, and then sequentially to the first conductive post 221 and the upper coil 222 of the adjacent time delay sub-unit.
[0048] In one specific embodiment of this application, one of the upper coil 222 and the lower coil 223 is a helical coil wound in a clockwise direction, and the other is a helical coil wound in a counterclockwise direction. The helical coil can effectively extend the transmission path of the electrical signal within a finite plane, thereby achieving signal delay. Furthermore, the helical coil can meet the signal delay time requirement without increasing the overall volume of the delay line. By adjusting the winding direction and number of turns of the helical coil, the transmission distance of the electrical signal can be precisely controlled, thereby achieving precise control of the signal delay time.
[0049] like Figure 6 As shown in a specific embodiment of this application, in both the upper and lower delay units 22, the delay sub-unit further includes end plates 224 disposed at both ends of the first conductive post 221, and the end plates 224 and the ground layer 21 form a capacitor structure. This capacitor structure helps to improve the anti-interference capability of the delay sub-unit, enabling it to have stable performance.
[0050] like Figure 6 As shown, in another specific embodiment of this application, in the middle layer delay unit 22, the end plates 224 may not be provided at both ends of the first conductive post 221. Although this will sacrifice some delay, it can reduce the height of the product after molding.
[0051] like Figures 3 to 7 As shown in a specific embodiment of this application, multiple ground layers 21 and delay units 22 are stacked vertically. Specifically, each delay unit 22 is disposed between two ground layers 21. As the number of delay unit layers 22 increases, the transmission distance of the electrical signal increases exponentially. Although the transmission distance of the electrical signal increases significantly, the volume of the entire delay line does not increase rapidly due to the small thickness of the delay sub-units, thus achieving a combination of small volume and large delay. Since each delay unit 22 can be fine-tuned according to actual needs, the performance parameters of the entire delay line can be flexibly adjusted to meet the diverse needs of different application scenarios.
[0052] As shown, in one embodiment of the present application, the time delay structure 2 further comprises a second conductive column 23. One end of the second conductive column 23 is electrically connected with the time delay unit 22, and the other end of the second conductive column 23 is electrically connected with the time delay unit 22 of the adjacent layer, so as to realize the conduction of signals between time delay units of different layers.
[0053] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. Any modification, equivalent replacement and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A low temperature co-fired ceramic delay line, characterized by, include: Ceramic matrix (1); A time delay structure (2) is encapsulated within the ceramic substrate (1). The time delay structure (2) includes a ground layer (21) and a time delay unit (22). The ground layer (21) is disposed on both sides of the time delay unit (22). The input electrode (3) is connected at one end to the input terminal of the delay unit (22) and at the other end extends to the outside of the ceramic substrate (1); The output electrode (4) is connected at one end to the output end of the delay unit (22) and at the other end extends to the outside of the ceramic substrate (1); The grounding electrode (5) has one end connected to the grounding layer (21) and the other end extending to the outside of the ceramic substrate (1).
2. The low temperature co-fired ceramic delay line of claim 1, wherein, The delay unit (22) includes an odd number of delay sub-units arranged sequentially along the horizontal direction.
3. The low temperature co-fired ceramic delay line of claim 2, wherein, The time delay subunit includes a first conductive post (221), an upper coil (222), and a lower coil (223). The upper coil (222) and the lower coil (223) are both electrically connected to the first conductive post (221). One end of the upper coil (222) is also electrically connected to the upper coil (222) of the adjacent time delay subunit. Alternatively, one end of the lower coil (223) is also electrically connected to the lower coil (223) of the adjacent time delay subunit.
4. The low temperature co-fired ceramic delay line of claim 3, wherein, One of the upper coil (222) and the lower coil (223) is a spiral coil wound in a clockwise direction, and the other of the upper coil (222) and the lower coil (223) is a spiral coil wound in a counterclockwise direction.
5. The low temperature co-fired ceramic delay line of claim 3, wherein, The time delay subunit also includes end plates (224) disposed at both ends of the first conductive post (221), and the end plates (224) and the ground layer (21) form a capacitor.
6. The low temperature co-fired ceramic delay line of any of claims 1 to 5, wherein, The grounding layer (21) and the delay unit (22) are stacked in a vertical direction in multiple layers.
7. The low temperature co-fired ceramic delay line of claim 6, wherein, The delay structure (2) further includes a second conductive post (23), one end of which is electrically connected to the delay unit (22), and the other end of which is electrically connected to the delay unit (22) in the adjacent layer.