Time gain control circuit for receiving of depth finder

Abstract

The utility model discloses a time gain control circuit used for receiving of a depth finder. The time gain control circuit comprises a reference power supply, a single-chip microcomputer, a DA chip, an adder, a follower and a gainer. According to the set sound velocity, the selected time control gain curve and the selected measuring range, the single chip microcomputer generates a digital signal corresponding to a propagation loss formula on a time axis which takes sound wave emission as starting time and takes propagation time required by the measuring range as ending time, and transmits the digital signal to the DA chip; an analog signal generated by the DA chip according to an input digital signal and a reference voltage passes through the adder and the follower and then serves as a control signal to be input to the gainer, the gainer is controlled to correspond to different amplification factors at different times, and corresponding amplification control over the input signal on a time axis is achieved. According to the utility model, the intensity of echo signals at different depths is improved, so that deep water area echo signals which are originally weak and even difficult to distinguish due to long-distance propagation can be clearly presented, and the depth measurement accuracy is improved.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit technology, and in particular to a time gain control circuit for depth sounder reception. Background Technology

[0002] Underwater acoustic signals, as the most effective means of underwater detection, have been widely used in various sonar devices for underwater target detection. Echo sounders are conventional depth measurement devices that use underwater acoustic signals for distance measurement, and are also the most widely used detection devices today.

[0003] Because sound waves attenuate as they travel through water, the intensity of the echo signal weakens, and the echo signal generated by the reflecting interface farther from the transducer is weaker. In order to more clearly and accurately detect and display the echoes reflected from the bottom of the water and objects in the water at different depths or distances, it is necessary to adjust the gain of the received echo signal according to its arrival time (corresponding to different depths). Utility Model Content

[0004] The purpose of this invention is to provide a time gain control circuit for depth sounder reception, so as to solve the problems in the background art.

[0005] To solve the above-mentioned technical problems, this utility model provides a time gain control circuit for depth sounder reception, including: a reference power supply, a microcontroller, a DA chip, an adder, a follower, a gainer, and a power supply circuit;

[0006] The microcontroller generates a digital signal corresponding to the propagation loss formula on a time axis with the sound wave emission time as the start time and the propagation time required by the range as the end time, based on the set sound speed, the selected time control gain curve, and the selected range, and transmits it to the DA chip.

[0007] The analog signal generated by the DA chip based on the input digital signal and the reference voltage is fed into the gain unit as a control signal after passing through the adder and the follower. This controls the gain unit to correspond to different amplification factors at different times, thereby realizing the corresponding amplification control of the input signal on the time axis.

[0008] The power supply circuit is used to supply power to each module.

[0009] In one embodiment, the power supply circuit includes module N6, capacitors C10 to C15, and inductors L1 to L2; module N6 is model WRA2405ZP-6W, used to convert external input power into +5V and -5V, which is provided to the operational amplifier chip and gainer in the receiving circuit.

[0010] Capacitors C12 and C13 are the input filter capacitors of module N6, connected in parallel to the +VIN and -VIN ports of module N6, respectively; inductors L1 and L2, and capacitors C10, C11, C14, and C15 are the output filter inductors and capacitors of module N6, respectively. The first end of inductor L1 is connected to the +Vo port of module N6, and the second end is connected to the first end of capacitors C11 and C10. The first end of inductor L2 is connected to the -Vo port of module N6, and the second end is connected to the first end of capacitors C14 and C15. The second ends of capacitors C11 and C10, and the second ends of capacitors C14 and C15 are connected to the 0V port of module N6.

[0011] In one embodiment, the reference power supply includes modules N1 and N3, and capacitors C1 to C4; module N1 is model RC1117S33T, module N3 is model ADR433B, capacitors C1 and C3 are connected in parallel between the Vout port of module N1 and ground, and capacitors C2 and C4 are connected in parallel between the Vin port of module N1 and ground; and the Vin port of module N3 is connected to the Vin port of module N1; wherein capacitors C2 and C4 are input filter capacitors of module N1, and capacitors C1 and C3 are output filter capacitors of module N1.

[0012] In one embodiment, the DA chip includes module N4, which is model MCP4921. The +5V converted by the power supply circuit is converted into +3VD and the reference power supply for module N4 by modules N1 and N3 respectively.

[0013] In one embodiment, the microcontroller includes modules N7 and J1, resistors R4 to R6, capacitors C7 and C8, and capacitors C16 and C17; module N7 is model C8051F340, and module J1 is model HEADER 5X2; resistors R4 and R5 are connected in series to the RST / C2CK port of module N7, resistor R6 is connected to the C2D port of module N7, capacitors C7 and C8 are connected in parallel between the VDD port of module N7 and ground, and capacitors C16 and C17 are connected in parallel between the fifth port of module J1 and ground; wherein capacitors C7, C8, C16, and C17 are filter capacitors, resistors R4 and R5 constitute the microcontroller reset circuit, and resistors R5 and R6 also serve as current limiters; module J1 is connected to an external emulator to simulate and program the microcontroller.

[0014] In one embodiment, the adder includes module N2A and adjustable resistors RP1 and R1-R3. After processing the analog signal from the DA chip, it outputs the signal to the follower. Module N2A is model TL084. Its first terminal is connected to +5V through resistors R2 and R3. Its second terminal is connected to the adjustment pin of adjustable resistor RP1. Another second terminal is also connected between resistors R2 and R3. Its third terminal is grounded through resistor R1. The input pin of adjustable resistor RP1 is connected to the VOUTA port of module N4, and its output pin is grounded.

[0015] In one embodiment, the follower includes module N2B and capacitor C5, wherein module N2B is also of model TL084, capacitor C5 is connected between the seventh terminal of module N2B and ground, the fifth terminal of module N2B is connected to the first terminal of module N2A, and capacitor C5 is a filter capacitor for the output signal of module N2B.

[0016] In one embodiment, the gainer includes module N5 and capacitors C6 and C9, which convert the pre-amplified signal into a time-gain processed signal. Capacitors C6 and C9 are power supply filter capacitors. Capacitor C6 is connected to the U(-) port of module N5, and capacitor C9 is connected to the U(+) port of module N5.

[0017] This invention provides a time gain control circuit for depth sounder reception. Based on the arrival time of echo signals, corresponding to the depth information, the gain of the receiving amplifier is gradually increased. Generally, signals farther from the transducer (later arrival times) receive higher gain compensation to compensate for attenuation caused by long-distance sound wave propagation, ensuring relatively balanced intensity of echo signals from different depths after processing. Through reasonable time gain control, the intensity of echo signals at different depths can be effectively enhanced, allowing even faint or indistinguishable deep-water echo signals to be clearly presented. This reduces misjudgments and missed judgments caused by signal attenuation, improving the accuracy and reliability of depth sounding. Attached Figure Description

[0018] Figure 1 This utility model provides a schematic diagram of a time gain control circuit for depth sounder reception.

[0019] Figure 2 This utility model provides a schematic diagram of a time gain control circuit for depth sounder reception. Detailed Implementation

[0020] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the time gain control circuit for depth sounder reception proposed in this utility model. The advantages and features of this utility model will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this utility model.

[0021] For sound waves propagating outward as spherical waves in a uniform, infinitely large ideal medium, the propagation loss is commonly calculated using the formula: 20logr (in dB). In some scenarios, such as the propagation of approximate cylindrical waves in the horizontal direction in shallow seas, the propagation loss is calculated using the formula: 10logr (in dB), where r is the propagation distance. In certain special applications of depth sounders, the formula 30logr may also be considered.

[0022] In a circuit, as long as the gain amplifier circuit is amplified and controlled accordingly on the time axis according to the propagation loss formula, the amplification factor of signals with shorter propagation distances is small, and the amplification factor of signals with longer propagation distances is large, then the attenuation caused by the long-distance propagation of sound waves can be compensated.

[0023] This utility model provides a time gain control circuit for depth sounder reception, the system block diagram of which is as follows: Figure 1 As shown, it includes a reference power supply, a microcontroller, a DA chip, an adder, a follower, and a gainer.

[0024] The microcontroller generates a digital signal corresponding to the propagation loss formula on a time axis, starting from the sound wave emission time and ending at the propagation time required by the range, based on the set sound velocity, the selected TVG curve (time-controlled gain curve), and the selected range. This digital signal is then transmitted to the DA chip. The DA chip generates an analog signal based on the input digital signal and the reference voltage. After passing through an adder and a follower, the analog signal is used as a control signal input to the gain converter. This controls the gain converter to perform different amplification factors at different times, thereby achieving corresponding amplification control of the input signal on the time axis.

[0025] The specific structural schematic diagram of the time gain control circuit used for depth sounder reception is as follows: Figure 2 As shown.

[0026] The power supply circuit includes module N6, capacitors C10-C15, and inductors L1-L2. Module N6, model WRA2405ZP-6W, is used to convert the external input power to +5V and -5V, which can be used by the operational amplifier chip and gain chip in the receiving circuit. Capacitors C12 and C13 are the input filter capacitors of module N6, connected in parallel to the +VIN and -VIN ports of module N6, respectively. Inductors L1, L2, and capacitors C10, C11, C14, and C15 are used for power supply. 5 are the output filter inductor and filter capacitor of module N6, respectively. The first end of inductor L1 is connected to the +Vo port of module N6, and the second end is connected to the first end of capacitor C11 and the first end of capacitor C10. The first end of inductor L2 is connected to the -Vo port of module N6, and the second end is connected to the first end of capacitor C14 and the first end of capacitor C15. The second ends of capacitors C11 and C10, and the second ends of capacitors C14 and C15 are connected to the 0V port of module N6.

[0027] The reference power supply includes modules N1 and N3, and capacitors C1 to C4. Module N1 is model RC1117S33T, and module N3 is model ADR433B. Capacitors C1 and C3 are connected in parallel between the Vout port of module N1 and ground, and capacitors C2 and C4 are connected in parallel between the Vin port of module N1 and ground. The Vin port of module N3 is connected to the Vin port of module N1. The DA chip includes module N4, model MCP4921. The +5V converted by the power supply circuit is converted into +3VD by modules N1 and N3 respectively, which is then used as the reference power supply for module N4. Capacitors C2 and C4 are the input filter capacitors of module N1, and capacitors C1 and C3 are the output filter capacitors of module N1. Module N3 uses a high-precision, low-noise, and low-temperature drift reference source chip to ensure the accuracy of the DA chip output.

[0028] The microcontroller includes modules N7 and J1, resistors R4-R6, capacitors C7 and C8, and capacitors C16 and C17. Module N7 is a C8051F340, and module J1 is a HEADER 5X2. Resistors R4 and R5 are connected in series to the RST / C2CK port of module N7, resistor R6 is connected to the C2D port of module N7, capacitors C7 and C8 are connected in parallel between the VDD port of module N7 and ground, and capacitors C16 and C17 are connected in parallel between the fifth port of module J1 and ground. Module N7 outputs corresponding digital signals according to the selected parameters. Capacitors C7, C8, C16, and C17 are filter capacitors, resistors R4 and R5 form the microcontroller reset circuit, and R5 and R6 also serve as current limiters. Module J1 connects to an external emulator for microcontroller simulation and programming.

[0029] The DA chip converts the microcontroller's digital signals into analog signals. The adder includes module N2A and adjustable resistors RP1 and R1-R3. After processing the analog signals from the DA chip, it outputs them to the follower. Module N2A is model TL084. Its first terminal is connected to +5V through resistors R2 and R3. The second terminal is connected to the adjustment pin of adjustable resistor RP1, and another second terminal is connected between resistors R2 and R3. The third terminal is grounded through resistor R1. The input pin of adjustable resistor RP1 is connected to the VOUTA port of module N4, and its output pin is grounded.

[0030] The follower includes module N2B and capacitor C5. Module N2B is also model TL084. Capacitor C5 is connected between the seventh terminal of module N2B and ground. The fifth terminal of module N2B is connected to the first terminal of module N2A. Capacitor C5 is a filter capacitor for the output signal of module N2B. It has high input impedance and low output impedance, and can transmit the output analog signal of the DA chip to the gainer without distortion.

[0031] The gainer includes module N5 and capacitors C6 and C9, which can convert the signal after pre-amplification into a signal after time gain processing. C6 and C9 are power supply filter capacitors. Capacitor C6 is connected to the U(-) port of module N5, and capacitor C9 is connected to the U(+) port of module N5.

[0032] The specific implementation is as follows. Taking the user-selected 20logr formula as an example, assuming the maximum range of the depth sounder is 300m and the speed of sound is 1500m / s, then the 20logr value at 1.5m is approximately 3.52, at 15m it is approximately 23.5, at 150m it is approximately 43.5, and at 300m it is approximately 49.5. According to the depth sounding distance formula L = 0.5ct, where L is the depth sounding distance, c is the speed of sound, and t is time, the microcontroller outputs a digital signal value of 3.52 at 0.002s, 23.5 at 0.02s, 43.5 at 0.2s, and 49.5 at 0.4s on the time axis. By outputting the corresponding digital signal at fixed time intervals on the time axis in this way, the digital signal output of the formula on time is achieved.

[0033] Since the MCP4921 DA chip has 12-bit resolution and can provide 4096 output stages, using a 3V reference voltage VREF here results in a resolution of 0.73mV, which is sufficient for controlling the voltage gain. As mentioned earlier, the digital signal value output at 0.4s is 49.5, corresponding to a maximum digital input value of 4096 for the DA chip. Therefore, the microcontroller amplifies the calculated value by a factor of approximately 4096 / 49.5 ≈ 82 before outputting it.

[0034] The output voltage of the DA chip is V OUT =V dd× (D / 4096), where V dd Given a reference source voltage of 3V and D as the output digital signal value of the microcontroller, the output voltage range of the DA chip is 0 to 3V.

[0035] The output voltage of the adder is V ctr =-R2(V OUT / R'+5 / R3), where R' is the resistance value of the adjustable resistor RP1, V OUT The output voltage of the DA chip is V. When R3 is 100KΩ, then V OUT When V is 0, ctr It is approximately equal to 0V. The voltage (V) can be changed by adjusting the value of the adjustable resistor. OUT V corresponding to 3V ctr Therefore, by changing the value of R3 and the value of the adjustable resistor, V can be changed. ctr The entire voltage range value is determined to meet the requirement that the control voltage range of the gain is 0V to -2V, and the control voltage range can be adjusted according to the actual use of the instrument.

[0036] The gainer is applied at an external voltage V ctr Under control, the gain can be continuously and linearly varied from -40dB to +40dB. The control voltage's effect on the gain G is as follows:

[0037] G(dB)=-40V ctr -40

[0038] Based on the above, we can conclude that when the sound wave transmission begins, the control voltage is approximately 0, corresponding to a G(dB) of -40dB. At the maximum range of 300m, corresponding to a time of 0.4s, the control voltage is -2V, corresponding to a G(dB) of 40dB. During the time between 0s and 0.4s, the control voltage changes according to the propagation attenuation formula. As a result, when the signal in the receiving circuit, after being amplified by the pre-amplifier, passes through the gain converter, it will gradually increase according to the propagation attenuation formula from the start of transmission to the end of the range, thereby compensating for the attenuation caused by the long-distance propagation of the sound wave.

[0039] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A time gain control circuit for depth sounder reception, characterized in that, include: Reference power supply, microcontroller, DA chip, adder, follower, gainer and power supply circuit; The microcontroller generates a digital signal corresponding to the propagation loss formula on a time axis with the sound wave emission time as the start time and the propagation time required by the range as the end time, based on the set sound speed, the selected time control gain curve, and the selected range, and transmits it to the DA chip. The analog signal generated by the DA chip based on the input digital signal and the reference voltage is fed into the gain unit as a control signal after passing through the adder and the follower. This controls the gain unit to correspond to different amplification factors at different times, thereby realizing the corresponding amplification control of the input signal on the time axis. The power supply circuit is used to supply power to each module.

2. The time gain control circuit for depth sounder reception as described in claim 1, characterized in that, The power supply circuit includes module N6, capacitors C10 to C15, and inductors L1 to L2; module N6 is model WRA2405ZP-6W, which is used to convert the external input power into +5V and -5V to provide power to the operational amplifier chip and gainer in the receiving circuit. Capacitors C12 and C13 are the input filter capacitors of module N6, connected in parallel to the +VIN and -VIN ports of module N6, respectively; inductors L1 and L2, and capacitors C10, C11, C14, and C15 are the output filter inductors and capacitors of module N6, respectively. The first end of inductor L1 is connected to the +Vo port of module N6, and the second end is connected to the first end of capacitors C11 and C10. The first end of inductor L2 is connected to the -Vo port of module N6, and the second end is connected to the first end of capacitors C14 and C15. The second ends of capacitors C11 and C10, and the second ends of capacitors C14 and C15 are connected to the 0V port of module N6.

3. The time gain control circuit for depth sounder reception as described in claim 2, characterized in that, The reference power supply includes modules N1 and N3, and capacitors C1 to C4; module N1 is model RC1117S33T, module N3 is model ADR433B, capacitors C1 and C3 are connected in parallel between the Vout port of module N1 and ground, and capacitors C2 and C4 are connected in parallel between the Vin port of module N1 and ground; and the Vin port of module N3 is connected to the Vin port of module N1; wherein capacitors C2 and C4 are input filter capacitors of module N1, and capacitors C1 and C3 are output filter capacitors of module N1.

4. The time gain control circuit for depth sounder reception as described in claim 3, characterized in that, The DA chip includes module N4, model MCP4921. The +5V converted by the power supply circuit is converted into +3VD and the reference power supply for module N4 by modules N1 and N3 respectively.

5. The time gain control circuit for depth sounder reception as described in claim 4, characterized in that, The microcontroller includes modules N7 and J1, resistors R4-R6, capacitors C7 and C8, and capacitors C16 and C17. Module N7 is model C8051F340, and module J1 is model HEADER 5X2. Resistors R4 and R5 are connected in series to the RST / C2CK port of module N7, resistor R6 is connected to the C2D port of module N7, capacitors C7 and C8 are connected in parallel between the VDD port of module N7 and ground, and capacitors C16 and C17 are connected in parallel between the fifth port of module J1 and ground. Among them, capacitors C7, C8, C16, and C17 are filter capacitors, resistors R4 and R5 constitute the microcontroller reset circuit, and resistors R5 and R6 also serve as current limiters. Module J1 is connected to an external emulator to simulate and program the microcontroller.

6. The time gain control circuit for depth sounder reception as described in claim 5, characterized in that, The adder includes module N2A and adjustable resistors RP1 and R1-R3. It processes the analog signal from the DA chip and outputs it to the follower. Module N2A is model TL084. Its first terminal is connected to +5V through resistors R2 and R3. Its second terminal is connected to the adjustment pin of adjustable resistor RP1. Another second terminal is also connected between resistors R2 and R3. Its third terminal is grounded through resistor R1. The input pin of adjustable resistor RP1 is connected to the VOUTA port of module N4, and its output pin is grounded.

7. The time gain control circuit for depth sounder reception as described in claim 6, characterized in that, The follower includes module N2B and capacitor C5. Module N2B is also a TL084. Capacitor C5 is connected between the seventh terminal of module N2B and ground. The fifth terminal of module N2B is connected to the first terminal of module N2A. Capacitor C5 is a filter capacitor for the output signal of module N2B.

8. The time gain control circuit for depth sounder reception as described in claim 7, characterized in that, The gainer includes module N5 and capacitors C6 and C9, which convert the signal after pre-amplification into a signal after time gain processing. Capacitors C6 and C9 are power supply filter capacitors. Capacitor C6 is connected to the U(-) port of module N5, and capacitor C9 is connected to the U(+) port of module N5.

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