Voltage detection device of chip and electronic equipment
By combining the adapter board and the testing equipment, the chip voltage detection is automated, which solves the problem of inaccurate data caused by manually configuring the voltage threshold range, improves the reliability and efficiency of the test results, and ensures the stability of the chip.
Patent Information
- Application Number
- CN202422918137.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-28
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-11-28
AI Technical Summary
In existing technologies, the programmable voltage detectors of chips require manual configuration of voltage threshold levels one by one during testing, resulting in insufficient data accuracy and affecting the reliability of test results.
By using an adapter board to connect the chip under test (DUT) and the testing equipment, automated voltage threshold level switching and flip-voltage detection are achieved. The power supply voltage of the DUT is automatically adjusted using the level adjustment command sent by the testing equipment and the pre-stored test program. The flip-voltage corresponding to each voltage threshold level is determined by monitoring the level changes of the pins of the DUT.
This improves the reliability of test results, reduces the need for manual adjustments, enhances testing efficiency and user experience, and ensures the stability and reliability of the chip during power-on and power-off processes.
Smart Images
Figure CN223637657U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of voltage detection, and further relates to a chip voltage detection device and electronic equipment. BACKGROUND
[0002] In the prior art, a programmable voltage detector (PVD) in a chip usually has multiple voltage threshold levels. When testing, each voltage threshold level needs to be configured one by one, and the generation of an interrupt is observed and a voltage value is read by manual observation. Due to the inevitable delay in the manual observation process, the boundary point data obtained may not be accurate enough, affecting the reliability of the test results. CONTENT OF THE UTILITY MODEL
[0003] To solve the above technical problem, the present application provides a chip voltage detection device and electronic equipment, which avoids the problem that the boundary point data obtained may not be accurate enough due to the inevitable delay in the manual observation process, and improves the reliability of the test results.
[0004] In a first aspect, the present application provides a chip voltage detection device, comprising: an adapter plate; a chip to be tested, connected with the adapter plate; a detection device, connected with the chip to be tested through the adapter plate; when detecting a flip voltage of the chip to be tested, the chip to be tested is configured to switch a voltage threshold level multiple times based on a level adjustment instruction sent by the detection device and a pre-stored test program; the detection device is configured to increase or decrease a power supply voltage of the chip to be tested by a first value at a preset frequency, and determine the flip voltage of the chip to be tested corresponding to each voltage threshold level through a change in a high or low level of a pin of the chip to be tested; wherein the flip voltage includes a rising flip voltage or a falling flip voltage.
[0005] The above chip voltage detection device can realize automatic voltage threshold level switching and flip voltage detection by using an adapter plate to connect a chip to be tested and a detection device. The chip to be tested automatically switches the voltage threshold level multiple times according to a level adjustment instruction sent by the detection device and a pre-stored test program, thereby reducing the need for manual adjustment. The detection device adjusts the power supply voltage of the chip to be tested at a preset frequency, and determines the rising flip voltage or the falling flip voltage corresponding to each voltage threshold level by monitoring the level change of the pin of the chip to be tested. The device avoids the problem that the boundary point data obtained may not be accurate enough due to the inevitable delay in the manual observation process, and improves the reliability of the test results.
[0006] In an implementation, the chip under test is connected to the adapter board through a plurality of first pins, and is configured to adjust the level of each pin based on the gear adjustment instruction and the test program to complete the switching of the voltage threshold gear.
[0007] The chip voltage detection device automatically switches the voltage threshold gear by connecting the plurality of first pins of the chip under test to the adapter board and adjusting the level of each pin of the chip under test based on the gear adjustment instruction and the test program. This design eliminates the need for manual adjustment, not only improving test efficiency but also improving user experience.
[0008] In an implementation, the chip under test is further configured to detect a power-on reset voltage or a power-off reset voltage of the chip under test, and when detecting the power-on reset or power-off reset voltage of the chip under test, the chip under test is connected to the adapter board through a second pin.
[0009] The chip voltage detection device accurately monitors the reset voltage of the chip by configuring the chip under test to detect the power-on reset voltage or the power-off reset voltage and using the connection of the second pin to the adapter board. This design helps to ensure the stability and reliability of the chip during power-on or power-off, and by monitoring the reset voltage in real time, potential power supply problems can be found in time, so that appropriate measures can be taken.
[0010] In an implementation, the adapter board includes a first interface circuit connected to the chip under test.
[0011] In an implementation, the adapter board includes a second interface circuit connected to the detection device.
[0012] In an implementation, a capacitor is further included, one end of the capacitor is connected to the first interface circuit and the chip under test respectively, and the other end is grounded.
[0013] In an implementation, a download device is further included, the download device is connected to the chip under test and the host computer respectively, and is configured to burn the test program sent by the host computer to the chip under test.
[0014] In an implementation, the download device includes a download interface circuit, and the first download pin and the second download pin of the download interface circuit are both connected to the chip under test.
[0015] In an implementation, the detection device is connected to the host computer and is configured to send the flip voltage to the host computer for display.
[0016] In a second aspect, the application further provides an electronic device comprising the chip voltage detection device of any of the above implementations.
[0017] Compared with the prior art, the utility model has at least one of the following beneficial effects:
[0018] 1、 through using the adapter plate connection to be measured chip and detection equipment, can realize the automation voltage threshold gear switching and the turnover voltage detection. To be measured chip according to the gear adjustment instruction sent by detection equipment and the test program stored in advance, automatically switches multiple times to voltage threshold gear, to reduce the need of manual adjustment. Detection equipment adjusts the power supply voltage of to be measured chip according to the preset frequency, determines the rising turnover voltage or the falling turnover voltage corresponding to each voltage threshold gear by monitoring the level change of the pin of to be measured chip. The device avoids the inevitable inertia in the process of manual observation, so that the obtained boundary point data can not be accurate enough, improves the reliability of test result.
[0019] 2、 through connecting multiple first pins of to be measured chip with the adapter plate, and adjusting the level of each pin of to be measured chip based on the gear adjustment instruction and test program, the automatic switching of voltage threshold gear is realized. This design eliminates the need for manual adjustment, not only improves the test efficiency but also improves the user experience.
[0020] 3、 through configuring to be measured chip to detect power-on reset voltage or power-off reset voltage, and using the connection of second pin and adapter plate, the accurate monitoring of chip reset voltage is realized. This design helps to ensure the stability and reliability of chip during power-on or power-off, and through real-time monitoring of reset voltage, potential power problems can be found in time, so that corresponding measures can be taken. BRIEF DESCRIPTION OF DRAWINGS
[0021] The above-mentioned characteristics, technical features, advantages and implementation modes of the utility model will be further described in a clear and easy-to-understand manner in combination with the preferred embodiments and the attached drawings.
[0022] Figure 1 A schematic diagram of a voltage detection device for a chip is shown;
[0023] Figure 2 A structural schematic diagram of an adapter plate is shown;
[0024] Figure 3 A circuit diagram of an interface connection between a to-be-tested chip and an adapter plate is shown;
[0025] Figure 4 A circuit diagram of a download interface circuit is shown;
[0026] Figure 5A voltage response diagram of the chip to be tested is shown. DETAILED DESCRIPTION
[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, specific embodiments of the present application will be described below with reference to the drawings. Obviously, the drawings described below are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained from these drawings without creative labor, and other embodiments can also be obtained.
[0028] In order to make the drawing simple, only the parts related to the present application are shown in each drawing, which does not represent the actual structure of the product. In addition, in order to make the drawing simple and easy to understand, in some drawings, only one of the components with the same structure or function is shown, or only one of them is marked. In this paper, "one" not only means "only one", but also means "more than one".
[0029] It should be further understood that the term "and / or" used in the present application and the appended claims means any combination of one or more of the associated listed terms and all possible combinations, and includes these combinations.
[0030] In this paper, it should be noted that unless otherwise specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0031] In addition, in the description of the present application, the terms "first", "second" and the like are only used for differentiation and description, and cannot be understood as indicating or implying relative importance.
[0032] It should be noted that the above embodiments can be freely combined according to needs. The above is only the preferred embodiment of the present application, and it should be pointed out that for those skilled in the art, without departing from the principle of the present application, some improvements and refinements can also be made, which should be regarded as the protection scope of the present application.
[0033] The programmable voltage detector is a functional module built in a chip, which is used to monitor whether the power voltage (VDD) of the chip is in a preset safe range. The programmable voltage detector has multiple voltage threshold levels, and each voltage threshold level corresponds to different boundary point data. When the power voltage exceeds or is lower than the boundary point data, the programmable voltage detector generates an interrupt signal or a reset signal to inform the chip to take corresponding measures.
[0034] The boundary point data are critical values of the programmable voltage detector in response to the voltage change of the chip and generating an interrupt signal or a reset signal, and they are key indicators of the accuracy of the voltage monitoring function. For the case that the programmable voltage detector generates an interrupt signal, the boundary point data can include the rising flip voltage and the falling flip voltage; for the case that the programmable voltage detector generates a reset signal, the boundary point data can include the power-on reset voltage and the falling reset voltage. The detection device, the adapter board and the chip to be tested in the embodiments of the present application cooperate with each other, and the power-on reset voltage, the power-off reset voltage and the rising flip voltage and the falling flip voltage corresponding to each voltage threshold level of the chip to be tested are determined through the change of the high and low levels of the pins of the chip to be tested, which can achieve at least one of the following beneficial effects: the problem that the obtained boundary point data may not be accurate due to the inevitable delay in the manual observation process is avoided, and the reliability of the test results is improved; manual voltage threshold level adjustment is not required, which not only improves the test efficiency but also improves the user experience.
[0035] The following will be described in conjunction with the accompanying drawings:
[0036] Referring to the accompanying drawings Figure 1 , a schematic diagram of a voltage detection device of a chip is shown. As shown in Figure 1 , it includes a detection device 100, an adapter board 200 and a chip to be tested 300. The chip to be tested 300 is connected with the adapter board 200, and the detection device 100 is connected with the chip to be tested 300 through the adapter board 200. When the flip voltage of the chip to be tested 300 is detected, the chip to be tested 300 is configured to switch the voltage threshold level multiple times based on the gear adjustment instruction sent by the detection device 100 and the pre-stored test program; the detection device 100 is configured to increase or decrease the power voltage of the chip to be tested 300 by a first value at a preset frequency, and determine the flip voltage of the chip to be tested 300 corresponding to each voltage threshold level through the change of the high and low levels of the pins of the chip to be tested 300; wherein the flip voltage includes the rising flip voltage or the falling flip voltage.
[0037] The testing device 100 can be a PXI digital-mode instrument (or a NIPXIE6570 PXI digital-mode instrument) used for performing characteristic analysis and production testing of semiconductor devices using timing settings and programmable power supply measurement unit (PPMU) functions. In PPMU mode, the testing device 100 can act as a voltage source or current source to provide voltage or current to the chip under test. When acting as a voltage source, the testing device 100 can output a voltage signal from -2V to 6V, with a maximum current of 20mA and a resolution of 221uV.
[0038] The adapter board 200 can be a PXIE6570 adapter board or an NI CB-2162 adapter board corresponding to the testing equipment 100, used to connect the chip under test 300 to the testing equipment 100.
[0039] Host computer (with) Figure 1 (Not shown) is connected to the testing device 100. After the test starts, the host computer controls the testing device 100 to increase the power supply voltage of the chip under test (300) from 0V to a predetermined value (the first value can be 5mV, which can be set according to the actual situation) at a preset frequency. After the chip under test is powered on, the host computer sends a range adjustment command to the testing device 100, which then sends the range adjustment command to the chip under test 300. Based on the range adjustment command and the internally pre-stored test program, the chip under test 300 switches the voltage threshold range to the range that the user wants to test. When the power supply voltage of the chip under test 300 is less than the threshold voltage corresponding to the current voltage threshold range, the pin on the chip under test 300 used to detect the switching voltage will output a low level. When the power supply voltage of the chip under test 300 is greater than the threshold voltage corresponding to the current voltage threshold range, the pin on the chip under test used to detect the switching voltage will output a high level.
[0040] Further, the detection device 100 reads the voltage value of the pin for detecting the flip voltage on the chip 300 to be tested every time the power voltage of the chip 300 to be tested is increased by one level until the pin for detecting the flip voltage on the chip 300 to be tested outputs a high level, at which time the voltage value read by the detection device 100 is the rising flip voltage at the current voltage threshold level, and the detection device 100 sends the rising flip voltage at the current voltage threshold level read to the host computer for recording and display. Then, the host computer sends a gear adjustment instruction to the chip 300 to be tested again, and switches the voltage threshold level of the chip 300 to be tested to the next voltage threshold level to be tested by the user. After completing the gear switching, the pin for detecting the flip voltage on the chip 300 to be tested outputs a low level, and the detection device 100 reads the voltage value of the pin for detecting the flip voltage on the chip 300 to be tested every time the power voltage of the chip 300 to be tested is increased by one level until the pin for detecting the flip voltage on the chip 300 to be tested outputs a high level, and the rising flip voltage at the current voltage threshold level is obtained. The above process is repeated several times until the rising flip voltages of all voltage threshold levels are determined.
[0041] Further, after completing the reading of the rising flip voltage of the last voltage threshold level, the host computer controls the detection device 100 to decrease the power voltage of the chip 300 to be tested by a first value every time according to a preset frequency. Similarly, the detection device 100 reads the voltage value of the pin for detecting the flip voltage on the chip 300 to be tested every time the power voltage of the chip 300 to be tested is decreased by one level until the pin for detecting the flip voltage on the chip 300 to be tested outputs a low level, at which time the voltage value read by the detection device 100 is the falling flip voltage at the current voltage threshold level, and the detection device 100 sends the falling flip voltage at the current voltage threshold level read to the host computer for recording and display. Then, the host computer sends a gear adjustment instruction to the chip 300 to be tested again, and switches the voltage threshold level of the chip 300 to be tested to the next voltage threshold level to be tested by the user. After completing the gear switching, the pin for detecting the flip voltage on the chip 300 to be tested outputs a high level, and the detection device 100 reads the voltage value of the pin for detecting the flip voltage on the chip 300 to be tested every time the power voltage of the chip 300 to be tested is increased by one level until the pin for detecting the flip voltage on the chip 300 to be tested outputs a low level, and the falling flip voltage at the current voltage threshold level is obtained. The above process is repeated several times until the falling flip voltages of all voltage threshold levels are determined.
[0042] Through the foregoing, the rising flip voltage and the falling flip voltage corresponding to each voltage threshold level of the to-be-tested chip 300 can be obtained, and of course, the user can also detect the rising flip voltage or the falling flip voltage corresponding to each voltage threshold level of the to-be-tested chip 300 according to the user's own needs.
[0043] The embodiment of the present application can realize automatic voltage threshold level switching and flip voltage detection by using the adapter board to connect the to-be-tested chip and the detection device. The to-be-tested chip automatically switches the voltage threshold level multiple times according to the level adjustment instruction sent by the detection device and the pre-stored test program, thereby reducing the need for manual adjustment. The detection device adjusts the power supply voltage of the to-be-tested chip according to the preset frequency, determines the rising flip voltage or the falling flip voltage corresponding to each voltage threshold level by monitoring the level change of the pin of the to-be-tested chip. The device avoids the problem that the boundary point data obtained may not be accurate due to the inevitable inertia in the manual observation process, and improves the reliability of the test result.
[0044] Reference is made to FIG. 1, which shows a structure schematic diagram of an adapter board provided by an embodiment of the present application. As shown in the figure, the adapter board includes a first interface circuit J18 and a second interface circuit J16. The first interface circuit J18 is connected with the to-be-tested chip, and the second interface circuit is connected with the detection device. Figure 2 Figure 2 Reference is made to FIG. 2, which shows a circuit diagram of the to-be-tested chip and the adapter board interface connection provided by an embodiment of the present application. As shown in the figure, the to-be-tested chip 300 is connected with the first interface circuit J18 of the adapter board through a plurality of first pins (reference is made to FIG. 1, the plurality of first pins are IO1, IO2, IO3, IO4 respectively), and is configured to adjust the level of each pin based on the level adjustment instruction and the test program, to complete the switching of the voltage threshold level.
[0045] Reference is made to FIG. 3, which shows a structure schematic diagram of a detection device provided by an embodiment of the present application. As shown in the figure, the detection device includes a power supply circuit J20, a control circuit J22 and a display circuit J24. The power supply circuit J20 is connected with the adapter board, and is configured to supply power to the to-be-tested chip through the adapter board. The control circuit J22 is connected with the adapter board, and is configured to send the level adjustment instruction to the to-be-tested chip through the adapter board. The display circuit J24 is connected with the control circuit J22, and is configured to display the test result of the to-be-tested chip. Figure 3 Figure 3 Reference is made to FIG. 2, which shows a circuit diagram of the to-be-tested chip and the adapter board interface connection provided by an embodiment of the present application. As shown in the figure, the to-be-tested chip 300 is connected with the first interface circuit J18 of the adapter board through a plurality of first pins (reference is made to FIG. 1, the plurality of first pins are IO1, IO2, IO3, IO4 respectively), and is configured to adjust the level of each pin based on the level adjustment instruction and the test program, to complete the switching of the voltage threshold level. Figure 3
[0046] The to-be-tested chip 300 switches the voltage threshold of the to-be-tested chip 300 by setting the high and low levels of each first pin. For example, if the gear adjustment instruction sent by the upper computer indicates that the to-be-tested chip 300 switches the voltage threshold gear to the first gear, then the to-be-tested chip 300 adjusts the voltage of each first pin to low level based on the gear adjustment instruction and the internal pre-stored test program (that is, the first pin IO1 to the first pin IO4 are all adjusted to binary 0, and finally 0000 represents the first gear); for another example, if the voltage threshold gear of the to-be-tested chip 300 is switched to the second gear, then the first pin IO4 is adjusted to high level, and the remaining first pins remain low level (that is, the first pin IO4 is adjusted to binary 1, and the remaining first pins remain binary 0, and finally 0001 represents the second gear). Finally, by adjusting the high and low levels of the plurality of first pins, the switching between the plurality of voltage threshold gears can be realized, and the number of first pins can also be adjusted according to the number of voltage threshold gears of the to-be-tested chip 300.
[0047] Further, after completing the switching of the voltage threshold gear, the detection device can read the rising and falling flip voltages corresponding to each voltage threshold gear through the pin IO5 in the to-be-tested chip 300 (the pin IO5 is the pin of the to-be-tested chip 300 for detecting the flip voltage), and send the rising and falling flip voltages corresponding to each voltage threshold voltage to the upper computer for display.
[0048] The embodiment of the present application realizes the automatic switching of the voltage threshold gear by connecting the plurality of first pins of the to-be-tested chip with the adapter board and adjusting the level of each pin of the to-be-tested chip based on the gear adjustment instruction and the test program. This design eliminates the need for manual adjustment, not only improves the test efficiency but also improves the user experience.
[0049] In an embodiment of the present application, reference is made to the accompanying drawings Figure 3 The to-be-tested chip 300 is also configured to detect the power-on reset voltage or the power-off reset voltage of the to-be-tested chip, and when detecting the power-on reset or the power-off reset voltage of the to-be-tested chip 300, the to-be-tested chip 300 is connected with the first interface circuit J18 of the adapter board through the second pin IO6.
[0050] The detection device can also detect the power-on reset voltage or the power-off reset voltage of the to-be-tested chip 300 during the process of powering on or powering off the to-be-tested chip 300 (after powering on or before powering off, the to-be-tested chip 300 can perform the operation of adjusting the voltage threshold gear). At the same time, during the process of powering on and powering off the to-be-tested chip 300, the plurality of first pins of the to-be-tested chip 300 are disconnected or connected with the first interface circuit J18.
[0051] Taking the detection of the power-on reset voltage of the to-be-tested chip 300 as an example, the host computer controls the detection device 100 to increase the power supply voltage of the to-be-tested chip 300 by a first value at a preset frequency each time. The detection device reads the voltage value of the second pin IO6 each time the power supply voltage of the to-be-tested chip 300 is adjusted. When the second pin IO6 changes from a low level to a high level, the voltage value of the second pin IO6 read by the detection device at this time is the power-on reset voltage, and the power-on reset voltage is sent to the host computer for display.
[0052] Similarly, when the power-down reset voltage of the to-be-tested chip 300 is detected, the host computer controls the detection device 100 to decrease the power supply voltage of the to-be-tested chip 300 by a first value each time. The detection device reads the voltage value of the second pin IO6 each time the power supply voltage of the to-be-tested chip 300 is adjusted. When the second pin IO6 changes from a high level to a low level, the voltage value of the second pin IO6 read by the detection device at this time is the power-down reset voltage, and the power-down reset voltage is sent to the host computer for display.
[0053] When the power-on reset voltage and the power-down reset voltage of the to-be-tested chip 300 are detected, the rising flip voltage and the falling flip voltage of each voltage threshold level of the to-be-tested chip 300 can also be detected. Alternatively, the power-on reset voltage, the power-down reset voltage, the rising flip voltage, and the falling flip voltage of the to-be-tested chip 300 are detected separately.
[0054] In the embodiment of the application, the power-on reset voltage or the power-down reset voltage of the to-be-tested chip is detected by configuration, and the second pin is connected with the adapter board, thereby realizing accurate monitoring of the chip reset voltage. This design helps to ensure the stability and reliability of the chip during power-on or power-down, and potential power supply problems can be found in time through real-time monitoring of the reset voltage, so that corresponding measures can be taken.
[0055] In an embodiment of the application, reference is made to the accompanying drawings Figure 3 Further comprising a capacitor C1, one end of the capacitor C1 is connected with the first interface circuit J18 and the to-be-tested chip 300 respectively, and the other end is grounded. The capacitor C1 is used for decoupling the power supply to stabilize the power supply voltage and reduce the influence of power supply noise on the circuit.
[0056] In an embodiment of the application, reference is made to the accompanying drawings Figure 1 Further comprising a download device 400 connected with the to-be-tested chip 300 and the host computer through internal download interface circuits respectively, and configured to burn the test program sent by the host computer to the to-be-tested chip.
[0057] Reference is made to the accompanying drawings Figure 4 which shows a circuit diagram of a download interface circuit provided in an embodiment of the application. As shown in the drawing, Figure 4As shown, the chip under test includes a download interface circuit CN1. A first download pin TMS of the download interface circuit CN1 is connected to a pin PA13 of the chip under test, and a second download pin TCK of the download interface circuit CN1 is connected to a pin PA14 of the chip under test, for programming a test program sent by the host computer into the chip under test.
[0058] Reference is made to the accompanying drawings Figure 5 Fig. 1 shows a voltage response diagram of a chip under test according to an embodiment of the present application. As shown, different voltage threshold levels have different threshold voltages (or PVD threshold voltages), and there are differences between rising and falling edges. For example, if the threshold voltage of a certain voltage threshold level is 2.1V, then the rising flip voltage can be 2.19V, and the falling flip voltage can be 2.09V. There is a voltage difference of 100mV between the rising flip voltage and the falling flip voltage, which is called hysteresis.
[0059] The present application also provides an electronic device, which includes the chip voltage detection device according to any one of the above embodiments.
[0060] It should be noted that the above embodiments can be freely combined as needed. The above is only a preferred embodiment of the present application, and it should be pointed out that for those skilled in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, and these improvements and refinements should also be considered within the scope of protection of the present application.
Claims
1. A voltage detecting device of a chip, characterized by comprising: The chip voltage detection device comprises: a conversion board; a chip to be tested, which is connected with the conversion board; a detection device, which is connected with the chip to be tested through the conversion board; when the flip voltage of the chip to be tested is detected, the chip to be tested is configured to switch the voltage threshold gear multiple times based on the gear adjustment instruction sent by the detection device and the pre-stored test program; the detection device is configured to increase or decrease the power voltage of the chip to be tested by a first value at a preset frequency, and determine the flip voltage of the chip to be tested corresponding to each voltage threshold gear through the change of the high and low levels of the chip to be tested pin; wherein, the flip voltage includes rising flip voltage or falling flip voltage.
2. The voltage detection apparatus of a chip according to claim 1, characterized by The chip to be tested is connected with the conversion board through a plurality of first pins, and is configured to adjust the level of each pin based on the gear adjustment instruction and the test program to complete the switching of the voltage threshold gear.
3. The voltage detection apparatus of a chip according to claim 2, wherein The chip to be tested is also configured to detect the power-on reset voltage or the power-off reset voltage of the chip to be tested, and when the power-on reset or the power-off reset voltage of the chip to be tested is detected, the chip to be tested is connected with the conversion board through a second pin.
4. The voltage detection apparatus of a chip according to claim 1, wherein The conversion board comprises a first interface circuit connected with the chip to be tested.
5. The voltage detection apparatus of a chip according to claim 4, wherein The conversion board comprises a second interface circuit connected with the detection device.
6. The voltage detection apparatus of a chip according to claim 5, wherein It also comprises a capacitor, one end of which is connected with the first interface circuit and the chip to be tested respectively, and the other end is grounded.
7. The voltage detection apparatus of a chip according to claim 1, wherein It also comprises: a download device, which is connected with the chip to be tested and the host computer respectively, and is configured to burn the test program sent by the host computer to the chip to be tested.
8. The voltage detection apparatus of a chip according to claim 7, wherein The download device comprises a download interface circuit, and the first download pin and the second download pin of the download interface circuit are connected with the chip to be tested.
9. The voltage detection apparatus of a chip according to claim 7, wherein The detection device is connected with the host computer and is configured to send the flip voltage to the host computer for display.
10. An electronic device, comprising: The chip voltage detection device comprises the chip according to any one of claims 1-9. The chip voltage detection device comprises the chip according to any one of claims 1-9.