Electrostatic discharge protection device and integrated circuit

Abstract

The utility model relates to an electrostatic discharge protection device and an integrated circuit. The ESD protection device includes at least one semiconductor electronic switch electrically coupled in parallel with the diode. The semiconductor electronic switch and the diode each include at least one finger extending substantially parallel to the first direction. The fingers of the semiconductor electronic switch and the diode are aligned with each other along the first direction. With the embodiments of the present disclosure, it is advantageously possible to reduce the occupied surface area of electrostatic discharge protection for the input / output of a substrate-specific integrated circuit while maintaining the electrostatic discharge protection level required for packaging.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to the field of electrostatic discharge (ESD) protection or prevention of electrostatic discharge. BACKGROUND

[0002] Input / outputs of integrated circuits comprise ESD protection circuits. For example, for an integrated circuit package, the ESD protection circuits at each pin of the package can be such that they withstand 2kV HBM (i.e. according to the HBM model or human body model) voltage electrostatic discharges. However, for an integrated circuit substrate or wafer, the so-called ESD protection level of the input / outputs is typically lower, for example such that the input / outputs withstand 200V HBM voltage electrostatic discharges.

[0003] When the pins of an integrated circuit package are electrically coupled to each other (for example in the case where the pins are used to receive an integrated circuit supply voltage), the ESD protection threshold of the circuit of each input / output coupled to these pins is increased. In order to guarantee that this increase reaches the ESD protection level required for the pins of the package, the dimensions of the ESD protection circuits of the integrated circuit input / outputs can be determined such that each of them can withstand the electrostatic voltage discharge level required for the package pins. Although this solution guarantees an ESD protection level sufficient for the package pins (even for the integrated circuit input / outputs each coupled to a single pin of the package), the excessive dimensions of the ESD protection circuits of the integrated circuit input / outputs result in a significant semiconductor surface area for forming these protection circuits, thus uselessly increasing the total semiconductor surface area required for the integrated circuit.

[0004] As an alternative to the above-mentioned solution, the ESD protection circuits of the integrated circuit input / outputs can be dimensioned individually according to the wiring provided with the package pins. However, this alternative solution is very time-consuming due to the specific design required for each ESD protection circuit of the integrated circuit input / outputs. SUMMARY

[0005] It is an object of the present disclosure to provide an electrostatic discharge protection device and an integrated circuit to at least partially solve the above-mentioned problems existing in the prior art.

[0006] An aspect of the present disclosure provides an electrostatic discharge, ESD, protection device, comprising: a diode comprising at least one first finger; and at least one semiconductor electronic switch electrically coupled in parallel to the diode and comprising at least one second finger, wherein the at least one first finger and the at least one second finger extend substantially parallel to a first direction and are aligned to each other along the first direction.

[0007] According to one or more embodiments, wherein the semiconductor electronic switch comprises a plurality of second fingers and the diode comprises a plurality of first fingers, each second finger of the semiconductor electronic switch is aligned with one of the first fingers of the diode along a first direction, thereby forming together a finger pair, the finger pair being aligned with each other along a second direction substantially perpendicular to the first direction.

[0008] According to one or more embodiments, the electrostatic discharge protection device further comprises at least one resistor having a larger dimension substantially parallel to the first direction.

[0009] According to one or more embodiments, wherein the semiconductor electronic switch comprises a GGNMOS or a GCPMOS or a BiCMOS type transistor or thyristor.

[0010] According to one or more embodiments, the electrostatic discharge protection device further comprises: two connection terminals coupled to an electrode of the semiconductor electronic switch and to an electrode of the diode.

[0011] According to one or more embodiments, wherein the semiconductor electronic switch and the diode are configured to withstand an electrostatic discharge voltage having a value equal to a target electrostatic discharge protection value of the substrate.

[0012] According to one or more embodiments, wherein at least one first finger of the diode comprises: a lateral side parallel to the first direction and aligned with a lateral side of at least one second finger of the semiconductor electronic switch, wherein the lateral side of the at least one second finger is parallel to the first direction.

[0013] Another aspect of the disclosure provides an integrated circuit comprising: an electrostatic discharge electrostatic discharge protection device comprising: a plurality of diodes each comprising a first finger extending in a first direction; and a plurality of switches each comprising a second finger extending in the first direction and aligned with a respective first finger in the first direction; and a plurality of input / output, I / O, terminals electrically coupling the electrostatic discharge protection device.

[0014] According to one or more embodiments, the integrated circuit further comprises: a core region; and an I / O circuit arranged at a periphery of the core region of the integrated circuit and comprising the electrostatic discharge protection device.

[0015] According to one or more embodiments, further comprising a package comprising a plurality of pins, each pin electrically coupled to at least one of the I / O terminals, the electrostatic discharge protection device coupled to a group of pins or to each pin of a group of pins being configured to withstand together an electrostatic discharge voltage having a value equal to a target electrostatic discharge protection value of the package.

[0016] According to one or more embodiments, wherein at least one of the pins of the package is not electrically coupled to any of the other pins, the electrostatic discharge protection device coupled to at least one of the pins is configured to individually withstand an electrostatic discharge voltage having a value equal to a target electrostatic discharge protection value of the package.

[0017] According to one or more embodiments, wherein the core region comprises one or more of a memory circuit and a controller.

[0018] According to one or more embodiments, wherein each switch is electrically coupled in parallel with a respective diode.

[0019] According to one or more embodiments, wherein the electrostatic discharge protection device comprises a resistor coupled to a control terminal of at least one of the switches.

[0020] According to one or more embodiments, wherein the switches comprise GGNMOS or GCPMOS or BiCMOS type transistors or thyristors.

[0021] Yet another aspect of the disclosure provides an integrated circuit comprising an electrostatic discharge protection device, the electrostatic discharge protection device comprising: a plurality of pairs of fingers, each pair of fingers comprising a first finger and a second finger, the first and second fingers each extending in a first direction and aligned with each other along the first direction; a plurality of diodes, each diode comprising a respective first finger; and a plurality of switches, each switch comprising a respective second finger.

[0022] According to one or more embodiments, wherein each first finger is a strip of a first semiconductor material, wherein each second finger is a strip of a second semiconductor material.

[0023] According to one or more embodiments, wherein each pair of fingers corresponds to one of the diodes and one of the switches electrically coupled in parallel.

[0024] According to one or more embodiments, wherein the electrostatic discharge protection device comprises a resistor extending in the first direction and being wider than the first fingers and the second fingers in a second direction.

[0025] According to one or more embodiments, wherein each switch comprises: a transistor having a gate terminal and a body terminal coupled together.

[0026] Utilizing embodiments of the disclosure advantageously can reduce the footprint area of electrostatic discharge protection dedicated to input / output of an integrated circuit of a substrate, while maintaining a required level of electrostatic discharge protection for the package. BRIEF DESCRIPTION OF DRAWINGS

[0027] The foregoing features and advantages, as well as others, will be described in detail in the disclosure of specific embodiments which follows, given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0028] Figure 1 An ESD protection device according to one embodiment is schematically illustrated;

[0029] Figure 2 A layout of an ESD protection device according to one embodiment is illustrated;

[0030] Figure 3 An ESD protection device according to one embodiment is illustrated in the form of a functional diagram; and

[0031] Figure 4 An integrated circuit comprising an ESD protection device according to one embodiment is schematically illustrated. DETAILED DESCRIPTION

[0032] In the various drawings, like features are denoted by like reference numerals. In particular, structural and / or functional features common to the various embodiments can have the same reference numerals and can be provided with the same structural, dimensional and material properties.

[0033] For the sake of clarity, only the steps and elements necessary for the understanding of the described embodiments are described and detailed. In particular, the different elements of the ESD protection device (crystals, thyristors, diodes, etc.) and the different parts of the integrated circuit (core, I / O circuit, package) are not described in detail. The skilled person will be able to manufacture these elements in detail based on the functional description given here.

[0034] Unless otherwise stated, when referring to two elements connected together, this means a direct connection without any intermediate element other than a conductor, and when referring to two elements coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0035] In the following description, when reference is made to terms defining an absolute position, such as the terms "edge", "rear", "top", "bottom", "left", "right", etc., or a relative position, such as the terms "above", "below", "upper", "lower", etc., or terms defining a direction, such as the terms "horizontal", "vertical", etc., unless otherwise stated, it refers to the orientation of the drawings in the normal position of use. Similarly, the terms "parallel" and "perpendicular" are interpreted by taking into account angular differences corresponding to manufacturing tolerances usually allowed in the field.

[0036] The expressions "about", "approximately", "substantially" and "of the order of" mean plus or minus 10%, preferably plus or minus 5%, unless otherwise stated.

[0037] The following description is made in relation to the accompanying drawings, in which Figure 1 An example of an embodiment of an ESD protection device 100 is described.

[0038] The device 100 comprises at least one semiconductor electronic switch 102, corresponding to a transistor or a thyristor. In the example shown, the switch 102 is formed by or comprises a transistor, which can be a GGNMOS, or a GCPMOS (Gate Coupled PMOS), or a BiCMOS type (Bi-polar CMOS). Figure 1 In the example shown, the transistor is of the NMOS type). As a variant, the switch 102 can be formed by or comprise a triac or a bipolar transistor, or more generally any component configured to dissipate electrostatic discharges. Figure 1 According to another variant, when it is necessary to withstand a voltage greater than the conduction threshold of a single diode (for example 0.6V), the semiconductor electronic switch 102 can be formed by or comprise a diode or a plurality of diodes coupled in series.

[0039] Throughout the document, the expression "semiconductor electronic switch" means one or more semiconductor electronic components that allow or do not allow the flow of an electric current depending on the value of a control signal applied to these components and / or depending on the direction of the current flow.

[0040] The switch 102 is coupled in parallel with a diode 104. In the example shown, the anode of the diode 104 is electrically coupled to the source of the transistor forming the switch 102, and the cathode of the diode 104 is electrically coupled to the drain of this transistor. According to an example of embodiment, the diode 104 can be of the "gate-controlled diode" type, i.e. comprising a gate for separating the anode and the cathode of the diode 104, or of the STI ("Silicon Trench Isolation") type, i.e. comprising an insulating trench for separating the anode and the cathode of the diode 104.

[0041] Figure 1 The device 100 shown also comprises a first connection terminal 106, having electrically coupled thereto the cathode of the diode 104 and a first current I / O electrode of the switch 102 (this first electrode corresponding to the drain of the transistor in the example shown). The power supply voltage of the integrated circuit comprising the device 100 is intended to be applied to this first connection terminal 106, for example.

[0042] Figure 1 Figure 1

[0043] Figure 1 ​​​The device 100 also comprises a second connection terminal 108 having electrically coupled thereto the anode of the diode 104 and the second current I / O electrode of the switch 102 (this second electrode corresponding to the source of the transistor in the example of Figure 1 The second connection terminal 108 is for example used to be coupled to a reference potential, i.e. ground, of an integrated circuit comprising the device 100.

[0044] When the semiconductor electronic switch 102 is formed by a diode or by a plurality of diodes coupled in series, or comprises a diode or comprises a plurality of diodes coupled in series, the diode (or the anode of each of these diodes in the case of a plurality of diodes coupled in series) can be coupled to the first connection terminal 106 and the diode (or the cathode of each of these diodes in the case of a plurality of diodes coupled in series) can be coupled to the second connection terminal 108.

[0045] In the example of Figure 1 The device 100 also comprises a resistor 110. In the particular configuration described, a first electrode of the resistor 110 is electrically coupled to the gate and to the substrate electrode or "bulk" electrode of the transistor forming the switch 102, and a second electrode of the resistor 110 is electrically coupled to the second current I / O electrode of the switch 102, i.e. to the source of the transistor in the example of Figure 1 and thus also to the anode of the diode 104 and to the second connection terminal 108. According to examples of embodiments, the value of the resistor 110 can be in the range 500 Ohms to 10 kOhms. The resistor 110 can adjust the turn-on voltage of the parasitic bipolar transistor of the MOS transistor forming the switch 102. Indeed, for a positive ESD between the terminals 106 and 108, this parasitic bipolar transistor will precisely conduct the entire discharge. For a negative ESD between the terminals 106 and 108, the current will be drained through the diode 104.

[0046] Although they are not shown, the device 100 can comprise other components coupled to the switch 102 and to the diode 104, such as a flip-flop or other resistor.

[0047] The switch 102 and the diode 104 each comprise at least one finger extending substantially parallel to the first direction and aligned with each other along this first direction. These features are shown in Figure 2 the example of Figure 2 The example of the topology or layout of the device 100 is shown.

[0048] In the example of Figure 2In the example, each of switch 102 and diode 104 includes multiple fingers. The fingers of switch 102 are indicated by reference numerals 112.1-112.7, and the fingers of diode 104 are indicated by reference numerals 113.1-113.7. Each finger 112.1-112.7 of switch 102 is aligned along a first direction with one of the fingers 113.1-113.7 of diode 104, thus forming a pair of fingers together. The finger pairs 112.1-112.7 and 113.1-113.7 are aligned with each other along a second direction substantially perpendicular to the first direction. Figure 2 In this configuration, the first direction is parallel to the axis Y, and the second direction is parallel to the axis X. In one embodiment, each finger 112.1–112.7 corresponds to a semiconductor material strip. In another embodiment, each finger 113.1–113.7 corresponds to a semiconductor material strip.

[0049] For switch 102, each finger 112.1–112.7 may correspond to an active portion of switch 102. More specifically, when switch 102 is formed of or includes a transistor, each finger 112.1–112.7 may include a semiconductor region in which a source region, channel region, and drain region of a transistor are formed, wherein a portion of the transistor gate extends over that portion of the channel region. The width of this portion of the gate corresponds to a gate dimension substantially perpendicular to the alignment direction of the source, drain, and channel regions of the transistor (i.e., the current flow direction in the active portion of the transistor), and this width may be substantially parallel to a first direction, and the length of this portion of the gate may be substantially perpendicular to the first direction.

[0050] For diode 104, each finger 113.1–113.7 may correspond to an active portion of diode 104, which includes portions of the anode and cathode regions of diode 104 that extend substantially adjacent to each other in parallel and substantially parallel to a first direction.

[0051] exist Figure 2 In the example, resistor 110 is arranged such that it has a large dimension that is substantially parallel to the first direction.

[0052] The paired configuration 112.1–112.7; 113.1–113.7 of the fingers of switch 102 and diode 104 allows for a modular design of device 100. According to this modular design, device 100 may include a first fixed portion (where the term "fixed" can be understood herein as "always present") comprising a pair of fingers of switch 102 and diode 104. Figure 2In particular, the first fixed portion is delimited by a rectangle indicated with reference 114 and comprises a pair of fingers 112.1, 113.1. The device 100 can also comprise a second fixed portion, which in particular comprises the components of the device 100 other than the fingers of the switch 102 and of the diode 104, i.e. in the example described the resistor 110. In particular, the second fixed portion is delimited by a rectangle indicated with reference 116. Figure 2

[0053] Between the two fixed portions 114, 116, there can be one or more pairs of fingers of the switch 102 and of the diode 104 (pairs 112.2-112.7, 113.2-113.7 in the example described). The number of pairs of fingers of the switch 102 and of the diode 104 present between the fixed portions 114, 116 is chosen on the design of the device 100 according to the value of the electrostatic discharge of the voltage that the device 100 has to withstand, both for the electrostatic voltage discharge on the substrate (before packaging) and for the electrostatic voltage discharge on the package. Figure 2

[0054] In one embodiment, the fingers of the diode comprise a lateral side aligned parallel to the first direction and to the lateral sides of the fingers of the semiconductor electronic switch also parallel to the first direction.

[0055] Figure 3 The modular structure of the device 100 is shown in the form of a functional diagram. In this diagram, the device 100 comprises two fixed portions 114, 116 (the fixed portion 114 comprises the first pair of fingers 112.1, 113.1 of the switch 102 and of the diode 104) and possibly n-1 further pairs of fingers 112.2-112.n of the switch 102 and 113.2-113.n of the diode 104, n being an integer greater than or equal to 1, additional between the fixed portions 114, 116.

[0056] For example, the dimensions of each pair of fingers 112.1-112.n, 113.1-113.n of the switch 102 and of the diode 104 can be determined so as to withstand by itself an electrostatic discharge of a voltage value at least equal to the target ESD protection value at the substrate (for example equal to approximately 100 V or 200 V HBM). Therefore, even in the absence of pairs of fingers of the switch 102 and of the diode 104 between the fixed portions 114, 116, the pairs of fingers of the switch 102 and of the diode 104 present in the fixed portion 114 (indicated with reference 112.1, 113.1 in the example described) ensure that the device 100 is able to withstand an electrostatic discharge of a voltage value equal to the target ESD protection value of the substrate. In the example described, the pairs of fingers of the switch 102 and of the diode 104 present in the fixed portion 116 (indicated with reference 112.2-112.7, 113.2-113.7) ensure that the device 100 is able to withstand an electrostatic discharge of a voltage value equal to the target ESD protection value of the package. Figure 2 Figure 2 ​​​In the example of the device 100, considering that each of the pairs of fingers 112.1-112.7, 113.1-113.7 is capable of withstanding electrostatic discharge having a voltage equal to approximately 100 V HBM, the device 100 is configured to withstand electrostatic discharge having a voltage equal to approximately 700 V HBM. In particular configurations, the device 100 can include pairs of fingers of switches 102 and diodes 104 that enable it to withstand electrostatic discharge having a voltage value in the range of approximately 100 V HBM to 2000 V HBM.

[0057] Figure 4 An integrated circuit 1000 including a plurality of ESD protection devices 100 is schematically shown.

[0058] The integrated circuit 1000 includes a core region 1002 that includes, for example, computation circuitry, memory circuitry, controllers, etc. The integrated circuit 1000 also includes I / O circuitry 1004 (also referred to as an "I / O ring") that is disposed at the periphery of the core region 1002 and includes ESD protection devices 100 (not shown in Figure 4

[0059] Each ESD protection device 100 is electrically coupled to one of the inputs / outputs of the integrated circuit 1000. By forming the device 100 such that each device 100 includes at least one pair of fingers of switches 102 and diodes 104 that are sized to withstand electrostatic discharge having a voltage value at least equal to a target ESD protection value of the substrate (e.g., equal to approximately 100 V or 200 V HBM), each of the inputs / outputs of the integrated circuit 1000 is well protected from electrostatic discharge at the substrate by one of the devices 100.

[0060] The integrated circuit 1000 also includes a package 1006 having a plurality of pins (not shown in Figure 4 Some of the pins, for example those intended to have a power supply voltage applied thereto of the integrated circuit 1000, can be electrically coupled together, thereby forming a group of pins. The devices 100 electrically coupled to the electrically coupled together pins of the group can be configured or sized to withstand electrostatic discharge having a voltage value equal to a target ESD protection value of the package (e.g., equal to approximately 2000 V HBM). Thus, the integrated circuit 1000 is well protected at each pin of the package 1006 of the integrated circuit 1000.

[0061] ​Therefore, by using the devices 100 within the integrated circuit 1000, it is possible to reduce the footprint of the ESD protection dedicated to the input / outputs of the integrated circuit 1000 from the substrate, while maintaining the level of ESD protection required for the packaging, since each device 100 can be individually and easily configured or dimensioned by choosing the number of pairs of fingers of switches 102 and diodes 104 present in each device 100 (modularity of the devices 100). The modularity of the devices 100 makes it possible to avoid significant developments of these devices 100.

[0062] Various embodiments and variants have been described. The person skilled in the art will understand that certain features of these various embodiments and variants can be combined, and that other variants will occur to the person skilled in the art.

[0063] Finally, the actual implementation of the described embodiments and variants is within the reach of the person skilled in the art, based on the functional indications given above.

[0064] The ESD protection device (100) comprises at least one semiconductor electronic switch (102) electrically coupled in parallel with a diode (104), wherein the semiconductor electronic switch (102) and the diode (104) each comprise at least one finger (112.1-112.7; 113.1-113.7), the fingers (112.1-112.7; 113.1-113.7) extending parallel to a first direction, the fingers (112.1-112.7; 113.1-113.7) of the semiconductor electronic switch (102) and of the diode (104) being aligned with each other along the first direction.

[0065] The semiconductor electronic switch (102) and the diode (104) each comprise a plurality of fingers (112.1-112.7; 113.1-113.7), each finger (112.1-112.7) of the semiconductor electronic switch (102) being aligned along a first direction with one of the fingers (113.1-113.7) of the diode (104), thereby forming together a pair of fingers (112.1-112.7; 113.1-113.7), the pairs of fingers (112.1-112.7; 113.1-113.7) being aligned with each other along a second direction substantially perpendicular to the first direction.

[0066] The ESD protection device (100) comprises at least one resistor (110) having a larger dimension substantially parallel to the first direction.

[0067] The semiconductor electronic switch (102) comprises a GGNMOS or GCPMOS or BiCMOS type transistor, or comprises a thyristor.

[0068] The ESD protection device (100) further comprises two connection terminals (106, 108) having electrodes of the semiconductor electronic switch (102) and the diode (104) coupled thereto.

[0069] The semiconductor electronic switch (102) and the diode (104), or each pair of fingers when the semiconductor electronic switch (102) and the diode (104) each comprise a plurality of fingers (112.1-112.7; 113.1-113.7), are configured to withstand an electrostatic discharge voltage having a value equal to a target ESD protection value of the substrate.

[0070] The integrated circuit (1000) comprises a plurality of inputs / outputs, each electrically coupled to at least one ESD protection device (100).

[0071] The ESD protection device (100) forms part of an I / O circuit (1004) arranged peripherally to a core area (1002) of the integrated circuit (1000).

[0072] The integrated circuit (1000) further comprises a package (1006) having a plurality of pins, each pin being electrically coupled to at least one input / output, at least one group of pins being electrically coupled together, the ESD protection device (100) coupled to the or each group of pins being configured to withstand an electrostatic discharge voltage having a value equal to a target ESD protection value of the package together.

[0073] At least one pin of the package is not electrically coupled to another pin, the ESD protection device (100) coupled to the at least one pin being configured to withstand an electrostatic discharge voltage having a value equal to a target ESD protection value of the package alone.

[0074] Embodiments of the present utility model provide ESD protection that overcomes at least some of the disadvantages of previous solutions.

[0075] In one embodiment, the ESD protection device comprises at least one semiconductor electronic switch electrically coupled in parallel with a diode, wherein the semiconductor electronic switch and the diode each comprise at least one finger extending substantially parallel to a first direction, the fingers of the semiconductor electronic switch and the diode being aligned with each other along the first direction.

[0076] According to a particular embodiment, the semiconductor electronic switch and the diode each comprise a plurality of fingers, each finger of the semiconductor electronic switch being aligned with one of the fingers of the diode along a first direction, thereby together forming a pair of fingers, the pair of fingers being aligned with each other along a second direction substantially perpendicular to the first direction.

[0077] According to a particular embodiment, the ESD protection device comprises at least one resistor having a larger dimension substantially parallel to the first direction.

[0078] According to a particular embodiment, the semiconductor electronic switch comprises a GGNMOS or GCPMOS or BiCMOS type transistor, or a thyristor.

[0079] According to a particular embodiment, the ESD protection device further comprises two connection terminals having electrodes of the semiconductor electronic switch and of the diode coupled thereto.

[0080] According to a particular embodiment, the semiconductor electronic switch and the diode, or each pair of fingers of the semiconductor electronic switch and of the diode when the semiconductor electronic switch and the diode each comprise a plurality of fingers, are configured to withstand an electrostatic discharge voltage having a value equal to a target ESD protection value of the substrate.

[0081] Another particular embodiment provides an integrated circuit comprising a plurality of inputs / outputs, each electrically coupled to at least one ESD protection device, such as described above.

[0082] According to a particular embodiment, the ESD protection device forms part of an input / output (I / O) circuit arranged peripherally to a core area of the integrated circuit.

[0083] According to a particular embodiment, the integrated circuit further comprises a package having a plurality of pins, each pin being electrically coupled to at least one of the inputs / outputs, at least one group of pins being electrically coupled together, the ESD protection device coupled to the group of pins or to each pin of the group of pins being configured to withstand an electrostatic discharge voltage having a value equal to a target ESD protection value of the package together.

[0084] According to a particular embodiment, at least one pin of the package is not electrically coupled to another pin, the ESD coupled to the at least one pin, the ESD protection device coupled to the at least one of the pins being configured to withstand an electrostatic discharge voltage having a value equal to a target ESD protection value of the package alone.

[0085] In one embodiment, the ESD protection device comprises a diode comprising at least one first finger and at least one semiconductor electronic switch electrically coupled in parallel to the diode and comprising at least one second finger. The at least one first finger and the at least one second finger extend substantially parallel to a first direction and are aligned to each other along the first direction.

[0086] In one embodiment, an integrated circuit includes an ESD protection device, the device including a plurality of diodes and a plurality of switches, each diode including a first finger extending in a first direction, each switch including a second finger extending in the first direction and aligned with a respective first finger in the first direction. The integrated circuit includes a plurality of input / output (I / O) terminals electrically coupled to the ESD protection device.

[0087] In one embodiment, an integrated circuit includes an ESD protection device. The ESD protection device includes a plurality of pairs of fingers, each pair of fingers including a first finger and a second finger, the first and second fingers each extending in a first direction and aligned with each other in the first direction. The ESD protection device includes a plurality of diodes, each diode including a respective first finger and a plurality of switches, each switch including a respective second finger.

[0088] These and other changes can be made to the embodiments in light of the above Detailed Description. The terms used in the following claims should not be construed to limit the claims to the specific embodiments disclosed in the Specification and the claims. Such terms are intended to cover all construction coming within the scope of the claims and equivalent of all the claims as are fairly included within the scope of the specification and the equivalents thereof. Therefore, the claims are not to be limited by the disclosure.

Claims

1. An electrostatic discharge protection device, characterized by, comprises at least one first finger; and at least one semiconductor electronic switch electrically coupled in parallel to the diode and comprising at least one second finger, wherein the at least one first finger and the at least one second finger extend substantially parallel to a first direction and are aligned with each other along the first direction. The semiconductor electronic switch comprises a plurality of second fingers and the diode comprises a plurality of first fingers, each second finger of the semiconductor electronic switch being aligned with one of the first fingers of the diode along the first direction, thereby forming together a finger pair, the finger pair being aligned with each other along a second direction substantially perpendicular to the first direction.

2. The electrostatic discharge protection device of claim 1, wherein comprises at least one resistor having a larger dimension substantially parallel to the first direction.

3. The electrostatic discharge protection device of claim 2, wherein, The semiconductor electronic switch comprises a GGNMOS or a GCPMOS or a BiCMOS type transistor or thyristor.

4. The electrostatic discharge protection device of claim 1, wherein, further comprises:

5. The electrostatic discharge protection device of claim 1, wherein, two connection terminals coupled to an electrode of the semiconductor electronic switch and to an electrode of the diode. The semiconductor electronic switch and the diode are configured to withstand an electrostatic discharge voltage having a value equal to a target electrostatic discharge protection value of a substrate.

6. The electrostatic discharge protection device of claim 1, wherein, The at least one first finger of the diode comprises a lateral side parallel to the first direction and aligned with a lateral side of the at least one second finger of the semiconductor electronic switch, wherein the lateral side of the at least one second finger is parallel to the first direction.

7. The electrostatic discharge protection device of claim 1, wherein comprises:

8. An integrated circuit, characterized by an electrostatic discharge protection device comprising: a plurality of diodes each comprising a first finger extending in a first direction; and a plurality of switches each comprising a second finger extending in the first direction and aligned with a respective first finger in the first direction; and a plurality of input / output, I / O, terminals electrically coupling the electrostatic discharge protection device. further comprises:

9. The integrated circuit of claim 8, wherein, a core area; and I / O circuitry arranged at a periphery of the core area of the integrated circuit and comprising the electrostatic discharge protection device. further comprises a package comprising a plurality of pins, each pin being electrically coupled to at least one of the I / O terminals, at least one group of pins being electrically coupled together, the electrostatic discharge protection device coupled to the group of pins or to each pin of the group of pins being configured to withstand together an electrostatic discharge voltage having a value equal to a target electrostatic discharge protection value of the package. at least one of the pins of the package is not electrically coupled to any of the other pins, the electrostatic discharge protection device coupled to the at least one of the pins being configured to withstand individually an electrostatic discharge voltage having a value equal to the target electrostatic discharge protection value of the package.

10. The integrated circuit of claim 8, wherein, The core area comprises one or more of a memory circuit and a controller.

11. The integrated circuit of claim 10, wherein, Each switch is electrically coupled in parallel to a respective diode.

12. The integrated circuit of claim 9, wherein, The electrostatic discharge protection device comprises a resistor coupled to a control terminal of at least one of the switches.

13. The integrated circuit of claim 8, wherein, ​ 14. The integrated circuit of claim 8, wherein, ​ 15. The integrated circuit of claim 8, wherein, The switches include GGNMOS or GCPMOS or BiCMOS type transistors or thyristors.

16. An integrated circuit, comprising: The electrostatic discharge protection device includes: a plurality of pairs of fingers, each pair of fingers including a first finger and a second finger, the first and second fingers each extending in a first direction and aligned with one another along the first direction; a plurality of diodes, each diode including a respective first finger; and a plurality of switches, each switch including a respective second finger.

17. The integrated circuit of claim 16, wherein, Each first finger is a strip of a first semiconductor material, wherein each second finger is a strip of a second semiconductor material.

18. The integrated circuit of claim 16, wherein, Each pair of fingers corresponds to one of the diodes and one of the switches that are electrically coupled in parallel.

19. The integrated circuit of claim 16, wherein, The electrostatic discharge protection device includes a resistor extending in the first direction and wider than the first and second fingers in a second direction.

20. The integrated circuit of claim 16, wherein, Each switch includes a transistor having a gate terminal and a body terminal coupled together.

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