Signal generator circuit with multiple residual current waveform generation capabilities

Abstract

The utility model discloses a signal generator circuit with multiple residual current waveform generation capabilities, a microcontroller and an external crystal oscillator circuit comprise a microcontroller U7, the microcontroller U7 generates a B-type residual current waveform through a residual current waveform generation program specified by a running command, and the B-type residual current waveform is converted into a B-type residual current waveform. And the waveform meeting the detection requirement of the new national standard GB / T18487.1-2023 on the residual current sensor can be generated. Secondly, a high-performance digital-to-analog converter (DAC) is built in the microcontroller U7, and high-sampling-rate conversion is supported; in the circuit, the 20KHz high-sampling-rate DAC can ensure high smoothness of output waveforms, and the DAC can output sine waves or other waveforms close to an ideal state by accurately controlling conversion of digital signals into analog voltage signals, so that various application requirements are met.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of residual current signal generator, more particularly to a signal generator circuit with multiple residual current waveform generation capabilities. BACKGROUND

[0002] Residual current refers to the current vector and current not being zero in low-voltage distribution line, which is usually called as leakage current. Residual current exists in different types such as sinusoidal alternating current, pulsating direct current, and smooth direct current. Among them, smooth direct current leakage is particularly common in electric vehicle charging process, mainly due to the discontinuity of protective ground wire, cable insulation layer damage and other reasons.

[0003] In order to monitor residual current and realize alarm triggering and other functions, residual current sensor is needed. Residual current sensor is a sensor for measuring the change of residual current value in the protected line. When the residual current, temperature, current and other data indicators of electrical equipment appear abnormal, the sensor of electrical fire monitoring system will collect the information of indicator change through electromagnetic induction principle and temperature change effect, and deliver it to the "signal processing unit" in the electrical fire monitoring system. After filtering, amplifying, A / D converting, analyzing, judging, comparing and other steps, once the key data indicators exceed the preset value, the alarm signal will be sent immediately, and at the same time transmitted to the monitoring equipment of electrical fire monitoring system.

[0004] At present, most of the domestic charging piles use A-type residual current sensor, and there is no protection requirement for smooth direct current residual current. Correspondingly, most of the existing signal generators for generating analog residual current can only generate A-type or AC-type residual current.

[0005] Secondly, the existing A / AC type residual current generator generally uses a sinusoidal oscillation circuit to generate signals, and the frequency selection part is composed of resistance and capacitance, which is easily affected by external factors, and is prone to cause unstable oscillation frequency. INVENTION CONTENTS

[0006] In order to overcome the shortcomings of the prior art, the utility model provides a signal generator circuit with multiple residual current waveform generation capabilities, which not only has multiple residual current waveform generation capabilities, but also can ensure stable oscillation frequency.

[0007] The utility model discloses technical scheme as follows: A signal generator circuit with multiple residual current waveform generating capabilities, comprising a DC-DC power supply circuit, a microcontroller and an external crystal oscillator circuit, and a signal amplification and driving circuit, the DC-DC power supply circuit converts input voltage into 3.3V DC output voltage, and supplies power to the microcontroller and the external crystal oscillator circuit, the microcontroller and the external crystal oscillator circuit are used for converting the high 12 bits of waveform digital quantity into analog voltage signals to output voltage to the signal amplification and driving circuit, and the signal amplification and driving circuit processes the input voltage to drive the external resistance H10 to generate corresponding residual current signals on the loop.

[0008] The microcontroller and the external crystal oscillator circuit include a microcontroller U7, a pin PB15 of the microcontroller U7 is used for receiving a command, the microcontroller U7 runs a residual current waveform generation program specified by the command, converts and outputs the input 12-bit digital analog signals to expand to 16 bits, converts the high 12 bits of waveform digital quantity into analog voltage signals to output through the pin PA4 of the microcontroller U7, and outputs the low 4 bits of waveform digital quantity through the pin PA0, the pin PA1, the pin PA2 and the pin PA3 of the microcontroller U7 respectively.

[0009] Further, the DC-DC power supply circuit includes a DC-DC conversion module U2, a first capacitor group and a second capacitor group, the ADJ pin of the DC-DC conversion module U2 is grounded, the VOUT pin of the DC-DC conversion module U2 and the TAB pin of the DC-DC conversion module U2 are connected to output +3.3V power voltage; the TAB pin of the DC-DC conversion module U2 is grounded through the second capacitor group; the VIN pin of the DC-DC conversion module U2 is connected with a +5V voltage end, and the VIN pin of the DC-DC conversion module U2 is grounded through the first capacitor group.

[0010] Further, the first capacitor group includes a capacitor C1 and a capacitor C2, one end of the capacitor C1 and one end of the capacitor C2 are respectively connected to the VIN pin of the DC-DC conversion module U2, and the other end of the capacitor C1 and the other end of the capacitor C2 are grounded.

[0011] Further, the second capacitor group includes a capacitor C36 and a capacitor C37, one end of the capacitor C36 and one end of the capacitor C37 are respectively connected to the TAB pin of the DC-DC conversion module U2, and the other end of the capacitor C36 and the other end of the capacitor C37 are grounded.

[0012] Further, the microcontroller and external crystal circuit further comprises an external crystal oscillator X2, a GND pin of the external crystal oscillator X2 is grounded, a VDD pin of the external crystal oscillator X2 and a VDD pin of the microcontroller U7 are connected to a +3.3V power voltage terminal, and an OUTPUT pin of the external crystal oscillator X2 and a PH0-OSC_IN pin of the microcontroller U7 are connected.

[0013] Further, the signal amplification and driving circuit comprises an output voltage buffer unit, a voltage amplification unit, an operational amplifier buffer unit and a current driving unit, the output voltage buffer unit is used for buffering an output voltage of a pin PA4 of the microcontroller U7, the voltage amplification unit is used for amplifying the output voltage by two times, the operational amplifier buffer unit is used for performing two-stage operational amplifier buffering on a voltage signal output by the voltage amplification unit, and the current driving unit is used for increasing current driving capability to drive an external resistance H10 to generate a residual current signal on a loop.

[0014] Further, the output voltage buffer unit comprises an operational amplifier U8.1, resistances R17, R18, R20, R28, R29, R34, R35, R36, R37, R38 and R39, a non-inverting input end of the operational amplifier U8.1 is connected to the pin PA4 of the microcontroller U7, an inverting input end of the operational amplifier U8.1 and an output end of the operational amplifier U8.1 are both connected to the voltage amplification unit through the resistance R17, a +Vcc end of the operational amplifier U8.1 is connected to a +5V power voltage terminal, and the +Vcc end of the operational amplifier U8.1 is grounded through a capacitor C50; a -Vcc end of the operational amplifier U8.1 is connected to a -5V power voltage terminal, and the -Vcc end of the operational amplifier U8.1 is grounded through a capacitor C51, the resistance R18 is connected to a pin PA0 of the microcontroller U7, the resistance R20 is connected to a pin PA1 of the microcontroller U7, the resistance R28 is connected to a pin PA2 of the microcontroller U7, the resistance R29 is connected to a pin PA3 of the microcontroller U7, the resistance R18 is grounded through the resistance R34, one end of the resistance R35 is connected to the resistance R18, the other end of the resistance R35 is connected to the resistance R20, one end of the resistance R36 is connected to the resistance R20, the other end of the resistance R36 is connected to the resistance R28, one end of the resistance R37 is connected to the resistance R28, the other end of the resistance R37 is connected to the resistance R29 and the resistance R38, and the resistance R38 is connected to the voltage amplification unit through the resistance R39.

[0015] Further, the voltage amplification unit comprises an operational amplifier U8.2, a resistor R46 and a capacitor C58, the non-inverting input terminal of the operational amplifier U8.2 is connected with the output terminal of the operational amplifier U8.1 through the resistor R17, the non-inverting input terminal of the operational amplifier U8.2 is connected with the resistor R38 through the resistor R39, the inverting input terminal of the operational amplifier U8.2 is connected through the resistor R45, one end of the resistor R46 is connected with the inverting input terminal of the operational amplifier U8.2, the other end of the resistor R46 is connected with the output terminal of the operational amplifier U8.2, one end of the capacitor C58 is connected with the inverting input terminal of the operational amplifier U8.2, the other end of the capacitor C58 is connected with the output terminal of the operational amplifier U8.2, and the output terminal of the operational amplifier U8.2 is connected with the operational amplifier buffer unit through the resistor R44.

[0016] Further, the operational amplifier buffer unit comprises an operational amplifier U9.1 and an operational amplifier U9.2, the non-inverting input terminal of the operational amplifier U9.1 is connected with the resistor R44 through the resistor R40, the inverting input terminal and the output terminal of the operational amplifier U9.1 are both connected with the non-inverting input terminal of the operational amplifier U9.2 through the resistor R42, and the output terminal of the operational amplifier U9.1 is connected with the resistor R44 through the capacitor C55; the inverting input terminal of the operational amplifier U9.2 is connected with the output terminal of the operational amplifier U9.2 through the capacitor C53, and the output terminal of the operational amplifier U9.2 is connected with the current driving unit.

[0017] Further, the current driving unit comprises a transistor Q3, a transistor Q4, a capacitor C54 and a current output module H8, the base of the transistor Q3 is connected with the output terminal of the operational amplifier U9.2, the emitter of the transistor Q3 is connected with the emitter of the transistor Q4, the collector of the transistor Q3 is connected with a-5V power supply voltage terminal, one end of the capacitor C54 is connected with the base of the transistor Q3 and the base of the transistor Q4 respectively, the other end of the capacitor C54 is connected with the emitter of the transistor Q3 and the emitter of the transistor Q4 respectively, the collector of the transistor Q4 is connected with a+5V power supply voltage terminal, the first pin of the current output module H8 is connected with the emitter of the transistor Q3 and the emitter of the transistor Q4 respectively, the second pin of the current output module H8 is connected with the first pin of an external resistor H10, and the second pin of the external resistor H10 is grounded.

[0018] According to the scheme, the utility model has the advantages that:

[0019] (1) This utility model provides a signal generator circuit capable of generating multiple residual current waveforms, including a DC-DC power supply circuit, a microcontroller and external crystal oscillator circuit, and a signal amplification and driving circuit. The microcontroller and external crystal oscillator circuit includes a microcontroller U7. Pin PB15 of the microcontroller U7 is used to receive commands. The microcontroller U7 runs the residual current waveform generation program specified by the command, converting the input 12-bit digital analog signal into a 16-bit output. The high 12 bits of the waveform digital value are converted into an analog voltage signal and output through pin PA4 of the microcontroller U7. The low 4 bits of the waveform digital value are output through pins PA0, PA1, PA2, and PA3 of the microcontroller U7, respectively. The microcontroller generates a type B residual current waveform by running the residual current waveform generation program specified by the command. In addition to the type A residual current waveform, it also includes typical type B current waveforms, such as type F composite wave, pulsating DC waveform of double-pulse bridge rectification, pulsating DC waveform of 6-pulse bridge rectification, and smooth DC waveform. Therefore, it can generate waveforms that meet the requirements of the new national standard GB / T18487.1-2023 for residual current sensor detection.

[0020] (2) This utility model provides a signal generator circuit capable of generating multiple residual current waveforms. The microcontroller is an STM32H750VBT6ARM microcontroller with a built-in high-performance digital-to-analog converter (DAC) that supports high sampling rate conversion. In this circuit, the 20kHz high sampling rate DAC ensures high smoothness of the output waveform. By precisely controlling the conversion of digital signals into analog voltage signals, the DAC can output sine waves or other waveforms that are close to ideal, thereby meeting various application requirements.

[0021] (3) This utility model provides a signal generator circuit capable of generating multiple residual current waveforms. The microcontroller and external crystal oscillator circuit also include an external crystal oscillator X2. The GND pin of the external crystal oscillator X2 is grounded, and the VDD pin of the external crystal oscillator X2 and the VDD pin of the microcontroller U7 are connected to the +3.3V power supply voltage terminal. The OUTPUT pin of the external crystal oscillator X2 is connected to the PH0-OSC_IN pin of the microcontroller U7. The OUTPUT pin of the external crystal oscillator X2 outputs a stable clock signal, which is input to the microcontroller through the PH0-OSC_IN pin as the clock source of the microcontroller, ensuring that the microcontroller can operate at a stable frequency. The external crystal oscillator X2 generates a stable clock pulse, so that the frequency of the output signal is almost unaffected by environmental changes. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a structural block diagram of a signal generator circuit that combines the ability to generate multiple residual current waveforms in an embodiment of this utility model.

[0024] Figure 2 This is a connection block diagram of a signal generator circuit capable of generating multiple residual current waveforms in an embodiment of this utility model.

[0025] Figure 3 This is a circuit diagram of the DC-DC power supply circuit in an embodiment of this utility model;

[0026] Figure 4 This is a circuit diagram of the microcontroller and external crystal oscillator circuit in an embodiment of this utility model;

[0027] Figure 5 This is a circuit diagram of the signal amplification and driving circuit in an embodiment of this utility model.

[0028] In the diagram, 100 is the output voltage buffer unit; 101 is the voltage amplification unit; 102 is the operational amplifier buffer unit; and 103 is the current drive unit. Detailed Implementation

[0029] The embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present invention by way of example, but should not be used to limit the scope of the present invention, that is, the present invention is not limited to the described embodiments.

[0030] To better understand this utility model, the following description, in conjunction with the accompanying drawings and embodiments, will further illustrate the present utility model:

[0031] See Figures 1-2 and Figure 4As shown, this embodiment provides a signal generator circuit capable of generating multiple residual current waveforms, including a DC-DC power supply circuit, a microcontroller and external crystal oscillator circuit, and a signal amplification and driving circuit. The DC-DC power supply circuit converts the input voltage into a 3.3V DC output voltage to power the microcontroller and external crystal oscillator circuit. The microcontroller and external crystal oscillator circuit convert the high 12 bits of the waveform digital quantity into an analog voltage signal to output voltage to the signal amplification and driving circuit. The signal amplification and driving circuit processes the input voltage to drive the external resistor H10 to generate the corresponding residual current signal in the loop.

[0032] In this embodiment, the DC-DC power supply circuit converts the input +5V voltage into a +3.3V DC output voltage to power the microcontroller and the external crystal oscillator circuit.

[0033] Specifically, the microcontroller and external crystal oscillator circuit include microcontroller U7. Pin PB15 of microcontroller U7 is used to receive commands. Microcontroller U7 runs the residual current waveform generation program specified in the command, converting the input 12-bit digital-to-analog signal to a 16-bit output. The high 12 bits of the waveform's digital value are converted into an analog voltage signal and output through pin PA4 of microcontroller U7. The low 4 bits of the waveform's digital value are output through pins PA0, PA1, PA2, and PA3 of microcontroller U7, respectively. By running the residual current waveform generation program specified in the command, the microcontroller generates a type B residual current waveform, which includes not only type A residual current waveforms but also typical type B current waveforms, such as type F composite waves, pulsating DC waveforms from dual-pulse bridge rectification, pulsating DC waveforms from six-pulse bridge rectification, and smooth DC waveforms. Therefore, it can generate waveforms that meet the detection requirements of the new national standard GB / T18487.1-2023 for residual current sensors.

[0034] In this embodiment, the microcontroller used is an STM32H750VBT6ARM microcontroller, which has a built-in high-performance digital-to-analog converter (DAC) that supports high sampling rate conversion. In this circuit, the 20kHz high sampling rate DAC ensures high smoothness of the output waveform. By precisely controlling the conversion of digital signals into analog voltage signals, the DAC can output near-ideal sine waves or other waveforms, thereby meeting various application requirements.

[0035] See Figure 3As shown, the DC-DC power supply circuit includes a DC-DC converter module U2, a first capacitor bank, and a second capacitor bank. The ADJ pin of the DC-DC converter module U2 is grounded, and the VOUT pin and TAB pin of the DC-DC converter module U2 are connected to output a +3.3V power supply voltage. The TAB pin of the DC-DC converter module U2 is grounded through the second capacitor bank. The VIN pin of the DC-DC converter module U2 is connected to the +5V voltage terminal, and the VIN pin of the DC-DC converter module U2 is grounded through the first capacitor bank.

[0036] In this embodiment, the first capacitor group includes capacitor C1 and capacitor C2. One end of capacitor C1 and one end of capacitor C2 are respectively connected to the VIN pin of DC-DC conversion module U2, and the other ends of capacitor C1 and capacitor C2 are grounded.

[0037] In this embodiment, the second capacitor group includes capacitor C36 and capacitor C37. One end of capacitor C36 and one end of capacitor C37 are respectively connected to the TAB pin of DC-DC conversion module U2, and the other ends of capacitor C36 and capacitor C37 are grounded.

[0038] Specifically, capacitors C1 and C2 are used to smooth the input voltage, reduce voltage fluctuations, and improve power supply stability. When the +5V DC voltage is input to the DC-DC power supply circuit through the input port, it first passes through components such as capacitors C1 and C2 for filtering and smoothing to reduce voltage fluctuations and noise. The filtered +5V voltage is then input to the "VIN" pin of the DC-DC conversion module U2, which converts the input +5V voltage into a stable +3.3V output voltage.

[0039] The conversion process involves complex circuit design and algorithms such as switching power supply technology and PWM control. This embodiment does not involve the internal circuit design of the DC-DC conversion module U2 or the corresponding algorithm improvements. Therefore, this embodiment will not elaborate on these aspects.

[0040] The converted +3.3V output voltage is output to the microcontroller and external crystal oscillator circuit through the "VOUT(TAB)" pin of the DC-DC converter module U2. Simultaneously, it undergoes filtering and smoothing by capacitors C36 and C37 to ensure the stability of the output voltage.

[0041] See Figure 4As shown, the microcontroller and external crystal oscillator circuit also includes an external crystal oscillator X2. The GND pin of the external crystal oscillator X2 is grounded, and the VDD pin of the external crystal oscillator X2 and the VDD pin of the microcontroller U7 are connected to the +3.3V power supply. The OUTPUT pin of the external crystal oscillator X2 is connected to the PH0-OSC_IN pin of the microcontroller U7. The OUTPUT pin of the external crystal oscillator X2 outputs a stable clock signal, which is input to the microcontroller through the PH0-OSC_IN pin as the clock source for the microcontroller, ensuring that the microcontroller can operate at a stable frequency. The external crystal oscillator X2 generates a stable clock pulse, making the frequency of the output signal almost unaffected by environmental changes.

[0042] See Figure 5 As shown, the signal amplification and driving circuit includes an output voltage buffer unit 100, a voltage amplification unit 101, an operational amplifier buffer unit 102, and a current driving unit 103. The output voltage buffer unit 100 is used to buffer the output voltage of pin PA4 of the microcontroller U7. The voltage amplification unit 101 is used to amplify the output voltage by two times. The operational amplifier buffer unit 102 is used to perform two-stage operational amplifier buffering on the voltage signal output by the voltage amplification unit 101. The current driving unit 103 is used to increase the current driving capability so as to drive the external resistor H10 to generate a residual current signal in the circuit.

[0043] Specifically, the output voltage buffer unit 100 includes an operational amplifier U8.1, resistors R17, R18, R20, R28, R29, R34, R35, R36, R37, R38, and R39. The non-inverting input of operational amplifier U8.1 is connected to pin PA4 of microcontroller U7. The inverting input and output of operational amplifier U8.1 are both connected to voltage amplification unit 101 through resistor R17. The +Vcc terminal of operational amplifier U8.1 is connected to the +5V power supply voltage terminal, and the +Vcc terminal of operational amplifier U8.1 is grounded through capacitor C50. The -Vcc terminal of operational amplifier U8.1 is connected to the -5V power supply voltage terminal, and... The -Vcc terminal of operational amplifier U8.1 is grounded through capacitor C51. Resistor R18 is connected to pin PA0 of microcontroller U7, resistor R20 is connected to pin PA1 of microcontroller U7, resistor R28 is connected to pin PA2 of microcontroller U7, resistor R29 is connected to pin PA3 of microcontroller U7, resistor R18 is grounded through resistor R34, one end of resistor R35 is connected to resistor R18, and the other end of resistor R35 is connected to resistor R20, one end of resistor R36 is connected to resistor R20, and the other end of resistor R36 is connected to resistor R28, one end of resistor R37 is connected to resistor R28, and the other end of resistor R37 is connected to resistors R29 and R38. Resistor R38 is connected to voltage amplification unit 101 through resistor R39.

[0044] In this embodiment, the voltage amplification unit 101 includes an operational amplifier U8.2, a resistor R46, and a capacitor C58. The non-inverting input terminal of the operational amplifier U8.2 is connected to the output terminal of the operational amplifier U8.1 through a resistor R17. The non-inverting input terminal of the operational amplifier U8.2 is connected to a resistor R39 through a resistor R38. The inverting input terminal of the operational amplifier U8.2 is connected through a resistor R45. One end of the resistor R46 is connected to the inverting input terminal of the operational amplifier U8.2, and the other end of the resistor R46 is connected to the output terminal of the operational amplifier U8.2. One end of the capacitor C58 is connected to the inverting input terminal of the operational amplifier U8.2, and the other end of the capacitor C58 is connected to the output terminal of the operational amplifier U8.2. The output terminal of the operational amplifier U8.2 is connected to the operational amplifier buffer unit 102 through a resistor R44.

[0045] In this embodiment, the operational amplifier buffer unit 102 includes operational amplifier U9.1 and operational amplifier U9.2. The non-inverting input terminal of operational amplifier U9.1 is connected through resistors R40 and R44. The inverting input terminal and the output terminal of operational amplifier U9.1 are both connected to the non-inverting input terminal of operational amplifier U9.2 through resistor R42. The output terminal of operational amplifier U9.1 is connected through capacitor C55 and resistor R44. The inverting input terminal of operational amplifier U9.2 is connected to the output terminal of operational amplifier U9.2 through capacitor C53. The output terminal of operational amplifier U9.2 is connected to the current drive unit 103.

[0046] In this embodiment, the current driving unit 103 includes transistors Q3 and Q4, capacitor C54, and current output module H8. The base of transistor Q3 is connected to the output terminal of operational amplifier U9.2. The emitter of transistor Q3 is connected to the emitter of transistor Q4. The collector of transistor Q3 is connected to the -5V power supply voltage terminal. One end of capacitor C54 is connected to the base of transistor Q3 and the base of transistor Q4, and the other end of capacitor C54 is connected to the emitter of transistor Q3 and the emitter of transistor Q4, respectively. The collector of transistor Q4 is connected to the +5V power supply voltage terminal. The first pin of current output module H8 is connected to the emitter of transistor Q3 and the emitter of transistor Q4, respectively. The second pin of current output module H8 is connected to the first pin of external resistor H10, and the second pin of external resistor H10 is grounded.

[0047] In this embodiment, operational amplifiers U8.1, U8.2, U9.1, and U9.2 are all TL082IDR operational amplifiers, which have characteristics such as low offset voltage, low offset voltage drift, and low noise, thereby accurately and stably amplifying voltage signals and improving the signal-to-noise ratio of the residual current output signal.

[0048] In this embodiment, transistors Q3 and Q4 are both NSS60601MZ4T1G transistors with a maximum collector current of 6A, which can drive a wide range of residual current signals.

[0049] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

[0050] The present utility model patent has been described above with reference to the accompanying drawings. Obviously, the implementation of the present utility model patent is not limited to the above-described manner. Any improvements made by adopting the inventive concept and technical solution of the present utility model patent, or the direct application of the inventive concept and technical solution of the present utility model patent to other occasions without modification, are all within the protection scope of the present utility model.

Claims

1. A signal generator circuit capable of generating multiple residual current waveforms, comprising a DC-DC power supply circuit, a microcontroller and external crystal oscillator circuit, and a signal amplification and driving circuit, characterized in that, The DC-DC power supply circuit converts the input voltage into a 3.3V DC output voltage to power the microcontroller and the external crystal oscillator circuit. The microcontroller and the external crystal oscillator circuit are used to convert the high 12 bits of the waveform digital quantity into an analog voltage signal to output voltage to the signal amplification and driving circuit. The signal amplification and driving circuit processes the input voltage to drive the external resistor H10 to generate a corresponding residual current signal in the loop. The microcontroller and external crystal oscillator circuit include a microcontroller U7 of model STM32H750VBT6ARM. Pin PB15 of the microcontroller U7 is used to receive commands. The microcontroller U7 runs the residual current waveform generation program specified by the command, converts the input 12-bit digital analog signal into a 16-bit output, converts the high 12 bits of the waveform digital value into an analog voltage signal and outputs it through pin PA4 of the microcontroller U7, and outputs the low 4 bits of the waveform digital value through pins PA0, PA1, PA2 and PA3 of the microcontroller U7 respectively.

2. The signal generator circuit with multiple residual current waveform generation capabilities as described in claim 1, characterized in that: The DC-DC power supply circuit includes a DC-DC conversion module U2, a first capacitor bank, and a second capacitor bank. The ADJ pin of the DC-DC conversion module U2 is grounded. The VOUT pin and TAB pin of the DC-DC conversion module U2 are connected to output a +3.3V power supply voltage. The TAB pin of the DC-DC conversion module U2 is grounded through the second capacitor bank. The VIN pin of the DC-DC conversion module U2 is connected to a +5V voltage terminal. The VIN pin of the DC-DC conversion module U2 is grounded through the first capacitor bank.

3. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 2, characterized in that: The first capacitor group includes capacitor C1 and capacitor C2. One end of capacitor C1 and one end of capacitor C2 are respectively connected to the VIN pin of the DC-DC conversion module U2, and the other end of capacitor C1 and the other end of capacitor C2 are grounded.

4. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 2, characterized in that: The second capacitor bank includes capacitor C36 and capacitor C37. One end of capacitor C36 and one end of capacitor C37 are respectively connected to the TAB pin of the DC-DC conversion module U2, and the other ends of capacitor C36 and capacitor C37 are grounded.

5. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 4, characterized in that: The microcontroller and external crystal oscillator circuit also includes an external crystal oscillator X2. The GND pin of the external crystal oscillator X2 is grounded, and the VDD pin of the external crystal oscillator X2 and the VDD pin of the microcontroller U7 are connected to the +3.3V power supply voltage terminal. The OUTPUT pin of the external crystal oscillator X2 is connected to the PH0-OSC_IN pin of the microcontroller U7.

6. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 5, characterized in that: The signal amplification and driving circuit includes an output voltage buffer unit, a voltage amplification unit, an operational amplifier buffer unit, and a current driving unit. The output voltage buffer unit is used to buffer the output voltage of pin PA4 of the microcontroller U7. The voltage amplification unit is used to amplify the output voltage by two times. The operational amplifier buffer unit is used to perform two-stage operational amplifier buffering on the voltage signal output by the voltage amplification unit. The current driving unit is used to increase the current driving capability to drive the external resistor H10 to generate a residual current signal in the circuit.

7. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 6, characterized in that: The output voltage buffer unit includes an operational amplifier U8.1, resistors R17, R18, R20, R28, R29, R34, R35, R36, R37, R38, and R39. The non-inverting input of operational amplifier U8.1 is connected to pin PA4 of the microcontroller U7. The inverting input and output of operational amplifier U8.1 are both connected to the voltage amplification unit through resistor R17. The +Vcc terminal of operational amplifier U8.1 is connected to the +5V power supply voltage terminal, and the +Vcc terminal of operational amplifier U8.1 is grounded through capacitor C50. The -Vcc terminal of operational amplifier U8.1 is connected to the -5V power supply voltage terminal, and the -Vcc terminal of operational amplifier U8.1 is grounded through capacitor C50. C51 is grounded. Resistor R18 is connected to pin PA0 of microcontroller U7. Resistor R20 is connected to pin PA1 of microcontroller U7. Resistor R28 is connected to pin PA2 of microcontroller U7. Resistor R29 is connected to pin PA3 of microcontroller U7. Resistor R18 is grounded through resistor R34. One end of resistor R35 is connected to resistor R18, and the other end of resistor R35 is connected to resistor R20. One end of resistor R36 is connected to resistor R20, and the other end of resistor R36 is connected to resistor R28. One end of resistor R37 is connected to resistor R28, and the other end of resistor R37 is connected to resistors R29 and R38. Resistor R38 is connected to the voltage amplification unit through resistor R39.

8. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 7, characterized in that: The voltage amplification unit includes an operational amplifier U8.2, a resistor R46, and a capacitor C58. The non-inverting input of operational amplifier U8.2 is connected to the output of operational amplifier U8.1 through resistor R17. The non-inverting input of operational amplifier U8.2 is connected to resistor R38 through resistor R39. The inverting input of operational amplifier U8.2 is connected through resistor R45. One end of resistor R46 is connected to the inverting input of operational amplifier U8.2, and the other end of resistor R46 is connected to the output of operational amplifier U8.

2. One end of capacitor C58 is connected to the inverting input of operational amplifier U8.2, and the other end of capacitor C58 is connected to the output of operational amplifier U8.

2. The output of operational amplifier U8.2 is connected to the operational amplifier buffer unit through resistor R44.

9. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 8, characterized in that: The operational amplifier buffer unit includes operational amplifier U9.1 and operational amplifier U9.

2. The non-inverting input terminal of operational amplifier U9.1 is connected through resistors R40 and R44. The inverting input terminal and the output terminal of operational amplifier U9.1 are both connected to the non-inverting input terminal of operational amplifier U9.2 through resistor R42. The output terminal of operational amplifier U9.1 is connected through capacitor C55 and resistor R44. The inverting input terminal of operational amplifier U9.2 is connected to the output terminal of operational amplifier U9.2 through capacitor C53. The output terminal of operational amplifier U9.2 is connected to the current drive unit.

10. A signal generator circuit with multiple residual current waveform generation capabilities as described in claim 9, characterized in that: The current drive unit includes transistors Q3 and Q4, capacitor C54, and current output module H8. The base of transistor Q3 is connected to the output terminal of operational amplifier U9.2, the emitter of transistor Q3 is connected to the emitter of transistor Q4, and the collector of transistor Q3 is connected to a -5V power supply. One end of capacitor C54 is connected to the bases of transistors Q3 and Q4, and the other end of capacitor C54 is connected to the emitters of transistors Q3 and Q4. The collector of transistor Q4 is connected to a +5V power supply. The first pin of current output module H8 is connected to the emitters of transistors Q3 and Q4, and the second pin of current output module H8 is connected to the first pin of external resistor H10. The second pin of external resistor H10 is grounded.

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