Low-power-consumption aviation domestic graphic processing system based on MIPS

Abstract

The utility model provides a low-power-consumption aviation and domestic graphics processing system based on MIPS, the low-power-consumption aviation and domestic graphics processing system based on the MIPS is greatly improved, an embedded MIPS architecture processor (integrated GPU) is used as a main processing circuit, a hardware circuit is optimally designed, and on the basis of realizing the previous functions, the design of the system is optimized. The function and the performance of display products are improved, meanwhile, the number of chips is greatly reduced, the occupied area is reduced, the development difficulty is lowered, and the project development period is shortened. And meanwhile, the product reliability is improved, and the cost is reduced.

Description

Technical Field

[0001] This utility model relates to the field of aviation graphics processing system technology, specifically to a low-power domestic aviation graphics processing system based on MIPS. Background Technology

[0002] The existing aviation graphics processing systems, which mainly use a CPU+GPU architecture, have the following drawbacks:

[0003] 1. High power consumption, exceeding 10W;

[0004] 2. External video overlay functions, etc., require the configuration of external FPGA circuits, which result in high component costs and high power consumption.

[0005] 3. The hardware circuits are numerous, requiring high space for clock and power chips and wiring. The typical circuit space requirement is approximately 160×180mm. Utility Model Content

[0006] This invention provides a low-power domestically produced aviation graphics processing system based on MIPS, which improves upon current domestic aviation graphics processing systems, reduces power consumption, size, and cost, and achieves good economic and social benefits.

[0007] This utility model provides a low-power domestically produced aviation graphics processing system based on MIPS, including: a microprocessor circuit, an eMMC storage circuit, a Flash storage circuit, a DDR4 storage circuit, an RS422 communication circuit, an RS232 communication circuit, an ARINC429 communication circuit, and a clock circuit.

[0008] The microprocessor circuit communicates with the outside world through RS422 communication circuit, RS232 communication circuit, and Ethernet interface, processes the acquired data, and generates graphics to be displayed as LVDS video signals.

[0009] The clock circuit is used to provide clock signals to the microprocessor circuit;

[0010] The microprocessor is a multi-core processor based on a MIPS dual-core CPU+GPU architecture and is equipped with an OpenGLES graphics operation interface; a domestically developed embedded operating system runs on the microprocessor.

[0011] The microprocessor operates at a clock speed of 1.4GHz; it has 1GB of RAM, expandable to 2GB; its host interfaces support UART, PCIe x4, USB, SPI, IIC, PWM, SATA, and SD interfaces; it integrates a 3D GPU with one DMA channel and an MMU, supporting 4xMSAA; it supports standard VESA timing display with a maximum resolution of 1920×1080; it supports one independent LVDS video signal output and one RGB video signal output; and it uses an FC-BGA package.

[0012] eMMC, NOR Flash, and DDR4 memory circuits are used to store the software, data, and generated image information running in the microprocessor.

[0013] Optionally, the microprocessor integrates two 64-bit processor cores, each containing a 64KB data cache and a 64KB instruction cache.

[0014] Optionally, the microprocessor also supports HDMI video signal output and / or MIPI video interface output.

[0015] Optionally, the microprocessor connects to a temperature sensor via an AD conversion circuit to acquire the temperature and perform temperature self-monitoring.

[0016] Optionally, the low-power domestically produced aviation graphics processing system based on MIPS also includes: a power management circuit;

[0017] The power management circuit is used to supply power to the microprocessor, eMMC storage circuit, NOR Flash storage circuit, DDR4 storage circuit, RS422 communication circuit, RS232 communication circuit, ARINC429 communication circuit, and clock circuit.

[0018] Optionally, the microprocessor also performs voltage self-monitoring of the various voltages provided by the power management circuit through an AD conversion circuit.

[0019] This invention provides a low-power domestically produced aviation graphics processing system based on MIPS. This MIPS-based system represents a significant improvement, employing an embedded MIPS architecture processor (integrated GPU) as the main processing circuit. The hardware circuitry has been optimized, enhancing the functionality and performance of display products while significantly reducing the number of chips and power consumption to only 6W. It is equipped with a high-reliability domestic real-time operating system, with a ported operating system BSP and modified graphics driver code. It supports the high-reliability domestic real-time operating system + OpenGLES 2.0 graphics programming interface and the new OpenGLES 2.0 graphics programming interface. Graphics processing efficiency is improved: the standard 1920*1080 resolution PFD screen refresh rate is greater than 30FPS. Graphics software development is achieved using graphical visualization development tools (Scade, XapsXT), shortening graphical interface development time and improving software quality. It supports multi-channel, multi-format video output to meet various application scenarios. The overall size is reduced to 100×80. This invention reduces the footprint, simplifies development, and shortens the project development cycle. It also improves product reliability and reduces costs. Attached Figure Description

[0020] Figure 1 This is a block diagram of the domestically produced aviation graphics processing system based on the MIPS architecture described in this patent;

[0021] Figure 2 This is a software logic architecture diagram. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0023] like Figure 1 and Figure 2 As shown, this utility model provides a low-power domestically produced aviation graphics processing system based on MIPS, including: a microprocessor circuit, an eMMC storage circuit, a Flash storage circuit, a DDR4 storage circuit, an RS422 communication circuit, an RS232 communication circuit, an ARINC429 communication circuit, and a clock circuit.

[0024] The microprocessor circuit communicates with the outside world through RS422 communication circuit, RS232 communication circuit, and Ethernet interface, processes the acquired data, and generates graphics to be displayed as LVDS video signals.

[0025] The clock circuit is used to provide clock signals to the microprocessor circuit;

[0026] The microprocessor is a multi-core processor based on a MIPS dual-core CPU+GPU architecture and is equipped with an OpenGLES graphics operation interface; a domestically developed embedded operating system runs on the microprocessor.

[0027] The microprocessor operates at a clock speed of 1.4GHz; it has 1GB of RAM, expandable to 2GB; its host interfaces support UART, PCIe x4, USB, SPI, IIC, PWM, SATA, and SD interfaces; it integrates a 3D GPU with one DMA channel and an MMU, supporting 4xMSAA; it supports standard VESA timing display with a maximum resolution of 1920×1080; it supports one independent LVDS video signal output and one RGB video signal output; and it uses an FC-BGA package.

[0028] eMMC, NOR Flash, and DDR4 memory circuits are used to store the software, data, and generated image information running in the microprocessor.

[0029] Optionally, the microprocessor integrates two 64-bit processor cores, each containing a 64KB data cache and a 64KB instruction cache.

[0030] Optionally, the microprocessor also supports HDMI video signal output and / or MIPI video interface output.

[0031] Optionally, the microprocessor connects to a temperature sensor via an AD conversion circuit to acquire the temperature and perform temperature self-monitoring.

[0032] Optionally, the low-power domestically produced aviation graphics processing system based on MIPS also includes: a power management circuit;

[0033] The power management circuit is used to supply power to the microprocessor, eMMC storage circuit, NOR Flash storage circuit, DDR4 storage circuit, RS422 communication circuit, RS232 communication circuit, ARINC429 communication circuit, and clock circuit.

[0034] Optionally, the microprocessor also performs voltage self-monitoring of the various voltages provided by the power management circuit through an AD conversion circuit.

[0035] For example, the circuit connection relationship and composition of the domestic graphics processing system provided by this utility model are as follows:

[0036] like Figure 1As shown, the graphics processing system consists of a microprocessor circuit, an eMMC storage circuit, a NOR Flash storage circuit (Flash), a DDR4 storage circuit, an RS422 communication circuit, an RS232 communication circuit, an ARINC429 communication circuit, an AD conversion circuit (AD transceiver), a power management circuit (PMIC), and a clock circuit (Oscillator).

[0037] The microprocessor circuit communicates with external devices via RS422, RS232, and Ethernet interfaces to acquire, process, and generate graphics for display as LVDS video signals. The microprocessor employs a high-performance, low-power multi-core processor with a dual-core CPU + GPU architecture and includes an OpenGLES graphics interface. Key features are as follows:

[0038] a) Operating frequency: The chip integrates two 64-bit processor cores with a clock frequency of up to 1.4GHz. Each processor contains 64KB of data cache and 64KB of instruction cache.

[0039] b) 1GB RAM, expandable to 2GB;

[0040] c) Host Interface: Supports interfaces such as UART, PCIEX4, USB, SPI, IIC, PWM, SATA, and SD;

[0041] d) Rendering capabilities: The chip integrates a 3D GPU, which includes one DMA channel, an MMU, supports 4xMSAA, memory compression, and dynamic power management.

[0042] e) Supported maximum resolution: Supports standard VESA timing display, with a maximum resolution of 1920×1080;

[0043] f) Display output: Supports 1 independent LVDS video signal output, supports 1 RGB video signal output, and can be customized with HDMI video signal output and MIPI video interface output.

[0044] g) Power consumption: The power consumption of the core functional circuit for embedded full-function testing is less than 6W;

[0045] h) Operating temperature range: -45℃~105℃;

[0046] i) Package type: FC-BGA package.

[0047] Software solution:

[0048] The operating environment includes both software and hardware environments.

[0049] a) Software environment

[0050] Programming language: Standard C language;

[0051] Operating System: Modify the BSP to port a domestically developed embedded operating system;

[0052] Graphics programming interface: Modify the driver to support the OpenGLES 2.0 graphics programming interface;

[0053] Development environment: LambdaAE;

[0054] Graphics development tools: SCADE Display R19, VAPS XT4.2.

[0055] Software logical structure

[0056] The product's software architecture is built upon an operating system, such as Figure 2 As shown, the software architecture consists of four layers: PMON, msl, osl, and APP. It primarily handles serial port driver, network port driver, DDR configuration, QSPI Flash driver, eMMC driver, SPI driver, I2C driver, RS422 function, RS232 function, BIT function, video output function, GPU driver, and other functions. Developers can develop their own programs at the upper application layer according to user requirements. The main control board software is developed at the upper application layer. The software development tools used are SCADE Display R19 and VAPS XT4.2.

[0057] This invention improves upon current domestic aviation graphics processing systems. It reduces power consumption, size, and cost, achieving significant economic and social benefits. It has the following characteristics:

[0058] 1. Reduced power consumption, with a power consumption of only 6W;

[0059] 2. Equipped with a highly reliable domestically developed real-time operating system.

[0060] 3. Port the operating system BSP, modify the graphics driver code, support the highly reliable domestic real-time operating system + OpenGLES2.0 graphics programming interface, and support the new graphics programming interface OpenGLES2.0;

[0061] 4. Improved graphics processing efficiency: The standard 1920*1080 resolution PFD screen refresh rate is greater than 30 FPS;

[0062] 5. Use graphical visualization development tools (Scade, Xaps XT) for graphical software development to shorten graphical interface development time and improve software quality;

[0063] 6. Supports multi-channel and multi-format video output to meet various application scenarios;

[0064] 7. The external dimensions have been reduced to 100×80.

[0065] The above description is merely a specific embodiment of this utility model, providing a detailed description of the utility model. Parts not covered in detail are conventional techniques. However, the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this utility model should be included within the protection scope of this utility model. The protection scope of this utility model should be determined by the scope of the claims.

Claims

1. A low-power domestically produced aviation graphics processing system based on MIPS, characterized in that, include: Microprocessor circuit, eMMC storage circuit, Flash storage circuit, DDR4 storage circuit, RS422 communication circuit, RS232 communication circuit, ARINC429 communication circuit, clock circuit; The microprocessor circuit communicates with the outside world through RS422 communication circuit, RS232 communication circuit, and Ethernet interface, processes the acquired data, and generates graphics to be displayed as LVDS video signals. The clock circuit is used to provide clock signals to the microprocessor circuit; The microprocessor is a multi-core processor based on a MIPS dual-core CPU+GPU architecture and is equipped with an OpenGLES graphics operation interface; a domestically developed embedded operating system runs on the microprocessor. The microprocessor operates at a clock speed of 1.4GHz; it has 1GB of RAM, expandable to 2GB; its host interfaces support UART, PCIe x4, USB, SPI, IIC, PWM, SATA, and SD interfaces; it integrates a 3D GPU with one DMA channel and an MMU, supporting 4xMSAA; it supports standard VESA timing display with a maximum resolution of 1920×1080; and it supports one independent LVDS video signal output and one RGB video signal output. The microprocessor uses an FC-BGA package; eMMC, NOR Flash, and DDR4 memory circuits are used to store the software, data, and generated image information running in the microprocessor.

2. The low-power domestically produced aviation graphics processing system based on MIPS according to claim 1, characterized in that, The microprocessor integrates two 64-bit processor cores, each containing a 64KB data cache and a 64KB instruction cache.

3. The low-power domestically produced aviation graphics processing system based on MIPS according to claim 1, characterized in that, The microprocessor also supports HDMI video signal output and / or MIPI video interface output.

4. The low-power domestically produced aviation graphics processing system based on MIPS according to claim 1, characterized in that, The microprocessor connects to a temperature sensor via an AD conversion circuit to acquire the temperature and perform temperature self-monitoring.

5. The low-power domestically produced aviation graphics processing system based on MIPS according to claim 4, characterized in that, Also includes: Power management circuit; The power management circuit is used to supply power to the microprocessor, eMMC storage circuit, NOR Flash storage circuit, DDR4 storage circuit, RS422 communication circuit, RS232 communication circuit, ARINC429 communication circuit, and clock circuit.

6. The low-power domestically produced aviation graphics processing system based on MIPS according to claim 5, characterized in that, The microprocessor also performs voltage self-monitoring of the various voltages provided by the power management circuit through the AD conversion circuit.

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