Controller for linear motor

Abstract

The utility model discloses a controller for a linear motor, which relates to the technical field of linear motor control and comprises a control chip, the control chip can receive multi-bit binary input signals and output the multi-bit binary input signals to corresponding output pins, and meanwhile, enable and disable the output pins through the control of an enable end, so that the control of the linear motor is realized. The control chip is connected with a direct-current three-phase switch circuit, the direct-current three-phase switch circuit comprises a first field-effect tube Q1, a second field-effect tube Q2, a third field-effect tube Q3, a fourth field-effect tube Q4, a fifth field-effect tube Q5 and a sixth field-effect tube Q6, and the first field-effect tube Q1 and the third field-effect tube Q3 are connected with a first gate driving chip. The second field effect transistor Q2 and the fourth field effect transistor Q4 are connected with a second gate driving chip; the fifth field effect transistor Q5 and the sixth field effect transistor Q6 are connected with a third gate driving chip; hIN pins and LIN pins of the first gate driving chip, the second gate driving chip and the third gate driving chip are all connected with the control chip.

Description

Technical Field

[0001] This utility model relates to the field of linear motor control technology, and in particular to a controller for linear motors. Background Technology

[0002] In modern industry and automation control, linear motors are widely used in various precision positioning, material handling, and automated production lines due to their high precision, high speed, and low noise characteristics. The performance and efficiency of linear motors largely depend on the design of their controllers. Traditional linear motor controllers mostly use analog circuits or simple digital circuits to implement control logic. These solutions have limitations in terms of complexity and flexibility, making it difficult to meet the demands of modern industry for high precision, high efficiency, and multifunctionality.

[0003] With the rapid development of microelectronics technology and semiconductor processes, digital linear motor controllers based on control chips have gradually become mainstream. These controllers receive external commands or sensor signals, process them internally, and then output control signals to the drive circuit, thereby achieving precise control of the linear motor. However, the drive circuit of a linear motor typically needs to handle complex operating conditions such as high voltage and high current, which places extremely high demands on the stability and reliability of the controller.

[0004] In existing digital linear motor controller designs, effectively managing the states of output pins (such as enable and disable) and efficiently driving the DC three-phase switching circuit are key to achieving high-performance control. Traditional solutions often use discrete components to build complex drive circuits, which not only increases system complexity and cost but may also introduce additional noise and power consumption, affecting the overall performance of the controller.

[0005] Therefore, developing a linear motor controller that can efficiently receive and process multi-bit binary input signals, intelligently control the output pin states, and optimize the DC three-phase switching circuit drive is of great significance for improving the control accuracy, efficiency, and reliability of linear motors. Utility Model Content

[0006] The purpose of this invention is to overcome the problems existing in the prior art and provide a controller for linear motors that meets the needs of modern industry for high performance, low cost and easy maintenance of linear motor controllers.

[0007] This utility model is achieved through the following technical solution: a controller for a linear motor, including a control chip, which can receive multi-bit binary input signals and output them to corresponding output pins. At the same time, by controlling the enable terminal, the output pins can be enabled and disabled.

[0008] The control chip is connected to a DC three-phase switching circuit, which includes a first field-effect transistor Q1, a second field-effect transistor Q2, a third field-effect transistor Q3, a fourth field-effect transistor Q4, a fifth field-effect transistor Q5, and a sixth field-effect transistor Q6. The first field-effect transistor Q1 and the third field-effect transistor Q3 are connected to a first gate driver chip, the second field-effect transistor Q2 and the fourth field-effect transistor Q4 are connected to a second gate driver chip, and the fifth field-effect transistor Q5 and the sixth field-effect transistor Q6 are connected to a third gate driver chip.

[0009] The HIN and LIN pins of the first, second, and third gate driver chips are all connected to the control chip.

[0010] To further optimize this utility model, the following technical solutions may be preferred:

[0011] Preferably, the control chip is an 8-bit buffer / line driver, model number SN74HC244PWR. The first, second, third, fourth, fifth, and sixth field-effect transistors are all of the same model, NCE6050A. The first, second, and third gate driver chips are all U2106.

[0012] Preferably, the HO pin and LO pin of the first gate driver chip are connected to the gates of the first field-effect transistor Q1 and the third field-effect transistor Q3, respectively; the VS pin of the first gate driver chip is connected to the source of the first field-effect transistor Q1 and the drain of the third field-effect transistor Q3.

[0013] Preferably, the HO pin and LO pin of the second gate driver chip are connected to the gates of the second field-effect transistor Q2 and the fourth field-effect transistor Q4, respectively; the VS pin of the second gate driver chip is connected to the source of the second field-effect transistor Q2 and the drain of the fourth field-effect transistor Q4, and the source of the fourth field-effect transistor Q4 is connected to an operational amplifier circuit.

[0014] Preferably, the HO pin and LO pin of the third gate driver chip are connected to the gates of the fifth field-effect transistor Q5 and the sixth field-effect transistor Q6, respectively; the VS pin of the third gate driver chip is connected to the source of the fifth field-effect transistor Q5 and the drain of the sixth field-effect transistor Q6, and the source of the sixth field-effect transistor Q6 is connected to an operational amplifier circuit.

[0015] Preferably, the lower source arms of the fourth field-effect transistor Q4 and the sixth field-effect transistor Q6 are both connected to sampling resistors, and the operational amplifier circuit includes an LM358 dual operational amplifier.

[0016] Compared with the prior art, the linear motor controller of this utility model has the following advantages:

[0017] 1. Improved Control Precision and Flexibility: A controller for linear motors receives multi-bit binary input signals through a control chip and precisely outputs these signals to the corresponding output pins, achieving fine-tuning of linear motor control. Simultaneously, the enable function allows the output pins to be flexibly enabled or disabled, further enhancing control flexibility and precision, and meeting diverse needs in different application scenarios.

[0018] 2. An Optimized Drive Circuit Design and Efficiency for a Linear Motor Controller: A controller for linear motors employs gate driver chips to drive three sets of field-effect transistors (Q1 / Q3, Q2 / Q4, Q5 / Q6) respectively. This not only simplifies the circuit structure and reduces system complexity but also improves the reliability and stability of the drive circuit. The use of gate driver chips also effectively reduces the switching losses of the field-effect transistors, improving the overall circuit efficiency, which is of great significance for reducing energy consumption and extending equipment lifespan.

[0019] 3. A controller for linear motors enhances system reliability and safety. This controller for linear motors, through reasonable circuit layout and component selection, exhibits more stable electrical performance, effectively resisting external interference and reducing the probability of failure. Simultaneously, the control function of the enable pin provides additional safety protection for the system; when an emergency shutdown or maintenance is required, the output pin can be quickly disabled to ensure the safety of personnel and equipment.

[0020] 4. A controller for linear motors is easy to maintain and expand. The modular design of this linear motor controller makes maintenance and upgrades more convenient. For example, when it is necessary to add control functions or adjust the control strategy, only the software program of the control chip needs to be modified accordingly, without large-scale changes to the hardware circuit. Furthermore, the standardized interface of the gate driver chip facilitates integration with other external devices or systems, improving the system's scalability.

[0021] In summary, the linear motor controller of this invention exhibits significant advantages in terms of control accuracy, efficiency, reliability, safety, and maintainability and expandability, providing a more efficient and reliable solution for the application of linear motors. Attached Figure Description

[0022] Figure 1 This is a wiring diagram of the control chip in this embodiment;

[0023] Figure 2This is a wiring diagram of the first field-effect transistor Q1, the third field-effect transistor Q3, and the first gate driver chip in this embodiment;

[0024] Figure 3 This is a wiring diagram of the second field-effect transistor Q2, the fourth field-effect transistor Q4, and the second gate driver chip in this embodiment;

[0025] Figure 4 This is the wiring diagram for the fifth field-effect transistor Q5, the sixth field-effect transistor Q6, and the third gate driver chip in this embodiment;

[0026] Figure 5 This is the wiring diagram for an operational amplifier circuit. Detailed Implementation

[0027] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0028] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present utility model.

[0029] Example 1

[0030] like Figure 1-5 As shown, a controller for a linear motor includes a control chip. The control chip can receive multi-bit binary input signals and output them to corresponding output pins. At the same time, by controlling the enable terminal, the output pins can be enabled and disabled.

[0031] The control chip is connected to a DC three-phase switching circuit, which includes a first field-effect transistor Q1, a second field-effect transistor Q2, a third field-effect transistor Q3, a fourth field-effect transistor Q4, a fifth field-effect transistor Q5, and a sixth field-effect transistor Q6. The first field-effect transistor Q1 and the third field-effect transistor Q3 are connected to a first gate driver chip, the second field-effect transistor Q2 and the fourth field-effect transistor Q4 are connected to a second gate driver chip, and the fifth field-effect transistor Q5 and the sixth field-effect transistor Q6 are connected to a third gate driver chip.

[0032] The HIN and LIN pins of the first, second, and third gate driver chips are all connected to the control chip.

[0033] Preferably, the control chip is an 8-bit buffer / line driver, model number SN74HC244PWR. The first, second, third, fourth, fifth, and sixth field-effect transistors are all of the same model, NCE6050A. The first, second, and third gate driver chips are all U2106.

[0034] The circuit or device using the above-mentioned preferred component configuration (control chip is SN74HC244PWR, field-effect transistor is NCE6050A, gate driver chip is U2106) has the following beneficial effects: (1) High performance and stability: SN74HC244PWR control chip: As an 8-bit buffer / line driver, SN74HC244PWR has high speed, low power consumption and excellent anti-interference capability. It can effectively transmit and amplify signals, ensure accurate data transmission in the circuit, and improve the stability and reliability of the entire system. NCE6050A field-effect transistor: NCE6050A field-effect transistor has low internal resistance, high switching speed and high withstand voltage. These characteristics enable the field-effect transistor to efficiently control the current in the circuit, reduce energy loss, and improve the response speed and stability of the circuit. U2106 gate driver chip: U2106 gate driver chip is designed specifically for driving field-effect transistors, with strong driving capability and good protection mechanism. It can effectively control the switching state of the field-effect transistor, improve the efficiency and safety of the circuit. (2) Energy saving and environmental protection: Due to the low power consumption characteristics of both SN74HC244PWR and NCE6050A, the entire circuit can significantly reduce energy consumption and lower operating costs during operation. At the same time, the environmentally friendly design of these components aligns with the green development trend of modern electronic products. (3) Easy integration and maintenance: Components such as SN74HC244PWR and U2106 adopt standard packaging forms, facilitating integration and connection with other electronic components. This reduces the complexity and cost of circuit design while improving circuit reliability and maintainability. The high reliability and long lifespan of the NCE6050A MOSFET also reduce the frequency and cost of circuit maintenance.

[0035] The first gate driver chip has its HO and LO pins connected to the gates of the first field-effect transistor Q1 and the third field-effect transistor Q3, respectively; its VS pin is connected to the source of the first field-effect transistor Q1 and the drain of the third field-effect transistor Q3. The second gate driver chip has its HO and LO pins connected to the gates of the second field-effect transistor Q2 and the fourth field-effect transistor Q4, respectively; its VS pin is connected to the source of the second field-effect transistor Q2 and the drain of the fourth field-effect transistor Q4, with the source of the fourth field-effect transistor Q4 connected to an operational amplifier circuit. The third gate driver chip has its HO and LO pins connected to the gates of the fifth field-effect transistor Q5 and the sixth field-effect transistor Q6, respectively; its VS pin is connected to the source of the fifth field-effect transistor Q5 and the drain of the sixth field-effect transistor Q6, with the source of the sixth field-effect transistor Q6 connected to an operational amplifier circuit.

[0036] The combination of the first, second, and third gate driver chips with the corresponding field-effect transistors (Q1 to Q6) and operational amplifier circuits configured with the above preferred connection method has the following beneficial effects: (1) Efficient gate driving and control, precise control: The HO (high-level output) and LO (low-level output) pins of the gate driver chip are directly connected to the gate of the field-effect transistor, ensuring precise control of the gate voltage. This direct connection reduces the delay and attenuation of signal transmission, and improves the response speed and stability of the circuit. Flexible configuration: Each gate driver chip independently controls a pair of field-effect transistors (such as Q1 and Q3, Q2 and Q4, Q5 and Q6). This configuration provides greater flexibility, and the operating state of each field-effect transistor can be adjusted independently as needed to achieve more complex circuit functions. (2) Optimized Power Management: VS Pin Connection: The VS (voltage source) pin of the gate driver chip is connected to the source (for Q1, Q2, Q5) or drain of the MOSFET (for Q3, Q4, Q6, VS is connected to its drain, but attention should be paid to the correctness of the circuit logic; usually, VS should be connected to a low potential to provide a drive voltage reference). This connection method helps optimize power management and reduce unnecessary power consumption. Energy Saving and Efficiency: By precisely controlling the switching state of the MOSFET, the gate driver chip helps to achieve higher power conversion efficiency, reduce energy loss, and meet the energy-saving and environmental protection requirements of modern electronic equipment.

[0037] (3) Enhanced circuit stability and reliability: Operational amplifier circuit integration: The sources of the fourth field-effect transistor Q4 and the sixth field-effect transistor Q6 are connected to the operational amplifier circuit. This configuration enhances the amplification capability and stability of the circuit. The operational amplifier circuit can further process the signals from the field-effect transistors, improving signal accuracy and anti-interference capability. Fault protection: Gate driver chips typically have overcurrent and overvoltage protection functions. When abnormal conditions occur in the circuit, the gate driver chip can respond quickly to protect the field-effect transistors and other circuit components from damage. (4) Simplified circuit design and maintenance, modular design: The modular design of gate driver chips and field-effect transistors simplifies the overall circuit structure and reduces design complexity. This design makes the circuit easier to debug and maintain, improving product reliability and maintainability. Standardized components: Using standardized gate driver chips and field-effect transistor components helps reduce procurement costs, improve production efficiency, and facilitates integration and connection with other electronic components.

[0038] Preferably, the lower source arms of the fourth field-effect transistor Q4 and the sixth field-effect transistor Q6 are both connected to sampling resistors. Under heavy loads, these can be replaced with high-power resistors to prevent excessive current from burning out the resistors. The operational amplifier circuit includes an LM358 dual operational amplifier.

[0039] The control chip is an 8-bit buffer / line driver, model number SN74HC244PWR, with the following pin configuration:

[0040] 1. Pin 1 (G1, 1G, 10E): Output enable pin 1. When G1 is low, the output pin is in a high-impedance state (High-z) and cannot output a valid logic level.

[0041] 2. Pin 2 (A1, 1A): Input pin 1, used to receive the first input signal.

[0042] 3. Pin 3 (A2, 2A): Input pin 2, used to receive the second input signal.

[0043] 4. Pin 4 (A3, 3A): Input pin 3, used to receive a third input signal.

[0044] 5. Pin 5 (A4, 4A): Input pin 4, used to receive the fourth input signal.

[0045] 6. Pin 6 (A5, 5A): Input pin 5 is used to receive the fifth input signal.

[0046] 7. Pin 7 (A6, 6A): Input pin 6 is used to receive the sixth input signal.

[0047] 8. Pin 8 (A7, 7A): Input pin 7, used to receive the seventh input signal.

[0048] 9. Pin 9 (Vcc): Power supply terminal. Connect to the positive power supply (usually 5V).

[0049] 10. Pin 10 (GND): Ground terminal. Connect to the negative power supply.

[0050] 11. Pin 11 (B1, 1Y): Output pin 1, outputs the first input signal.

[0051] 12. Pin 12 (B2, 2Y): Output pin 2, outputs the second input signal.

[0052] 13. Pin 13 (B3, 3Y): Output pin 3, outputs the third input signal.

[0053] 14. Pin 14 (B4, 4Y): Output pin 4, outputs the fourth input signal.

[0054] 15. Pin 15 (B5, 5Y): Output pin 5, outputs the fifth input signal.

[0055] 16. Pin 16 (B6, 6Y): Output pin 6, outputs the sixth input signal.

[0056] 17. Pin 17 (B7, 7Y): Output pin 7, outputs the seventh input signal.

[0057] 18. Pin 18 (GND): Ground terminal. Connect to the negative power supply.

[0058] 19. Pin 19 (B8, 8Y): Output pin 8, outputs the eighth input signal.

[0059] 20. Pin 20 (G2, 2G, 20E): Output enable pin 2. When G2 is low, the output pin is in a high-impedance state (High-z) and cannot output a valid logic level.

[0060] Finally, it should be noted that the above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model. Although the present utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A controller for a linear motor, characterized in that: It includes a control chip, which can receive multi-bit binary input signals and output them to corresponding output pins. At the same time, by controlling the enable terminal, the output pins can be enabled and disabled. The control chip is connected to a DC three-phase switching circuit, which includes a first field-effect transistor Q1, a second field-effect transistor Q2, a third field-effect transistor Q3, a fourth field-effect transistor Q4, a fifth field-effect transistor Q5, and a sixth field-effect transistor Q6. The first field-effect transistor Q1 and the third field-effect transistor Q3 are connected to a first gate driver chip, the second field-effect transistor Q2 and the fourth field-effect transistor Q4 are connected to a second gate driver chip, and the fifth field-effect transistor Q5 and the sixth field-effect transistor Q6 are connected to a third gate driver chip. The HIN and LIN pins of the first, second, and third gate driver chips are all connected to the control chip.

2. A controller for a linear motor according to claim 1, characterized in that: The control chip is an 8-bit buffer / line driver, model number SN74HC244PWR. The first, second, third, fourth, fifth, and sixth field-effect transistors are all of the same model, NCE6050A. The first, second, and third gate driver chips are all U2106.

3. A controller for a linear motor according to claim 1, characterized in that: The HO and LO pins of the first gate driver chip are connected to the gates of the first field-effect transistor Q1 and the third field-effect transistor Q3, respectively; the VS pin of the first gate driver chip is connected to the source of the first field-effect transistor Q1 and the drain of the third field-effect transistor Q3.

4. A controller for a linear motor according to claim 3, characterized in that: The HO and LO pins of the second gate driver chip are connected to the gates of the second field-effect transistor Q2 and the fourth field-effect transistor Q4, respectively; the VS pin of the second gate driver chip is connected to the source of the second field-effect transistor Q2 and the drain of the fourth field-effect transistor Q4, and the source of the fourth field-effect transistor Q4 is connected to an operational amplifier circuit.

5. A controller for a linear motor according to claim 3, characterized in that: The HO and LO pins of the third gate driver chip are connected to the gates of the fifth field-effect transistor Q5 and the sixth field-effect transistor Q6, respectively; the VS pin of the third gate driver chip is connected to the source of the fifth field-effect transistor Q5 and the drain of the sixth field-effect transistor Q6, and the source of the sixth field-effect transistor Q6 is connected to an operational amplifier circuit.

6. A controller for a linear motor according to any one of claims 4 or 5, characterized in that: The lower source arms of the fourth field-effect transistor Q4 and the sixth field-effect transistor Q6 are both connected to sampling resistors, and the operational amplifier circuit includes an LM358 dual operational amplifier.

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