Temperature sampling circuit and battery system
By combining the thermistor sampling circuit, differential processing circuit, and bias voltage superposition circuit, the problems of high output impedance and ADC blind zone in the temperature sampling circuit are solved, achieving higher temperature acquisition accuracy and anti-interference capability.
Patent Information
- Application Number
- CN202520013157.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-03
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2035-01-03
AI Technical Summary
In the existing technology, the temperature sampling circuit composed of NTC resistors and resistor Roffset has the problems of high output impedance and blind zone in the ADC acquisition area, resulting in low temperature acquisition accuracy.
The method employs a thermistor sampling circuit, a differential processing circuit, and a bias voltage superposition circuit. The differential processing circuit achieves impedance isolation between the sampling voltage and the ADC, while the bias voltage superposition circuit avoids the blind zone of the ADC, thereby improving the acquisition accuracy.
It improves the acquisition accuracy within the temperature acquisition range, reduces the impact of output impedance on the ADC, enhances anti-interference capability, and expands the accuracy of the temperature acquisition range.
Smart Images

Figure CN223678658U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to battery management technical field, especially relate to a temperature sampling circuit and battery system. BACKGROUND
[0002] Temperature is an important parameter for the stable, safe and reliable work of battery system, and the battery system needs to detect the temperature range of about [-40 DEG C, 125 DEG C], and needs to have relatively high detection accuracy in the full range.
[0003] At present, the industry battery system detection circuit roughly principle is that NTC resistance and a bias resistance are connected in series, the power supply VCC of MCU supplies power to the circuit, the voltage at the connection of NTC resistance and bias resistance is collected through the built-in ADC of MCU, the resistance value of NTC at this time is calculated, and then the corresponding temperature value is obtained through the resistance value.
[0004] The circuit structure is simple, and the price is low, but also has obvious shortcomings: the output impedance of the temperature sampling circuit composed of NTC resistance and bias resistance is large, which reduces the linearity of its output signal and affects the temperature collection accuracy; the inherent offset error and gain error characteristics of ADC make there be a 'blind area' at both ends of the ADC collection area, which affects the collection accuracy of the high and low voltage signals of the circuit, thereby affecting the collection accuracy of the temperature area at both ends of the temperature collection range. UTILITY MODEL CONTENTS
[0005] The utility model discloses a temperature sampling circuit and battery system, which aims at solving the problem of low collection accuracy caused by large output impedance and 'blind area' at both ends of the ADC collection area of the temperature detection circuit.
[0006] In view of the above problems, the utility model provides a temperature sampling circuit, which comprises:
[0007] A thermistor sampling circuit, the thermistor sampling circuit comprises a sampling resistor, the thermistor sampling circuit is used for collecting the temperature of a target object and converting it into a corresponding sampling voltage;
[0008] A differential processing circuit, the differential processing circuit has two input ends, and the two input ends of the differential processing circuit are connected with both ends of the sampling resistor;The differential processing circuit is used for converting the sampling voltage into a first voltage output through differential processing;
[0009] A bias voltage superposition circuit, the input end of the bias voltage superposition circuit is connected with the output end of the differential processing circuit, and the input end of the bias voltage superposition circuit is also used for connecting a bias voltage;The bias voltage superposition circuit is used for superimposing the bias voltage and the first voltage to generate a second voltage output.
[0010] Optionally, the thermistor sampling circuit further comprises a first bias resistor and a second bias resistor, one end of the first bias resistor is connected with the power voltage, the other end is connected with one end of the sampling resistor, one end of the second bias resistor is connected with the other end of the sampling resistor, and the other end is grounded.
[0011] The potential difference between the two ends of the sampling resistor is the sampling voltage.
[0012] Optionally, the differential processing circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor and a first operational amplifier, one end of the first resistor is connected with one end of the sampling resistor, the other end is connected with the non-inverting input terminal of the first operational amplifier, one end of the third resistor is connected with the other end of the sampling resistor, the other end is connected with the inverting input terminal of the first operational amplifier, one end of the second resistor is connected with the non-inverting input terminal of the first operational amplifier, and the other end is grounded, one end of the fourth resistor is connected with the output terminal of the first operational amplifier, and the other end is connected with the inverting input terminal of the first operational amplifier, and the output terminal of the first operational amplifier is the output terminal of the differential processing circuit.
[0013] Optionally, the bias voltage superposition circuit comprises:
[0014] a voltage dividing circuit, an input of the voltage dividing circuit is connected with the power voltage, and the voltage dividing circuit is used for voltage dividing processing on the power voltage to obtain the bias voltage and output;
[0015] a non-inverting adder circuit, a non-inverting input terminal of the non-inverting adder circuit is connected with the output terminal of the voltage dividing circuit and the output terminal of the differential processing circuit, and the non-inverting adder circuit is used for superimposing the bias voltage and the first voltage to generate the second voltage output.
[0016] Optionally, the voltage dividing circuit comprises a sixth resistor and a seventh resistor, one end of the sixth resistor is connected with the power voltage, the other end is connected with one end of the seventh resistor, and the other end of the seventh resistor is grounded.
[0017] The potential difference between the two ends of the seventh resistor is the bias voltage.
[0018] Optionally, the non-inverting adder circuit comprises a fifth resistor, an eighth resistor, an eleventh resistor and a non-inverting adder, one end of the fifth resistor is connected with the output terminal of the differential processing circuit, the other end is connected with the non-inverting input terminal of the non-inverting adder, one end of the eighth resistor is connected with one end of the seventh resistor, the other end is connected with the non-inverting input terminal of the non-inverting adder, one end of the eleventh resistor is connected with the non-inverting input terminal of the non-inverting adder, and the other end is grounded, and the output terminal of the non-inverting adder is the output terminal of the bias voltage superposition circuit.
[0019] Optionally, the non-inverting adder comprises a second operational amplifier.
[0020] Optionally, the first operational amplifier and the second operational amplifier are high input impedance operational amplifiers.
[0021] The utility model discloses a battery system, including battery, main control circuit and the temperature sampling circuit as above.
[0022] Optionally, the main control circuit includes an analog-to-digital conversion circuit and a controller, the input end of the analog-to-digital conversion circuit is connected with the output end of the temperature sampling circuit, and the output end of the analog-to-digital conversion circuit is connected with the controller.
[0023] The temperature sampling circuit is used for collecting the temperature of the battery and converting the temperature into a second voltage output.
[0024] The analog-to-digital conversion circuit is used for collecting the voltage signal of the second voltage output by the temperature sampling circuit and converting the voltage signal into a digital signal output to the controller.
[0025] The utility model discloses a thermistor sampling circuit, differential processing circuit and bias voltage superposition circuit constitute, wherein, differential processing circuit obtains the sampling voltage of thermistor sampling circuit through differential processing and converts into first voltage output, realizes the impedance isolation between sampling voltage and ADC, reduces the output impedance of input circuit, reduces the influence to ADC, improves sampling accuracy;Bias voltage superposition circuit superimposes the bias voltage with first voltage to produce second voltage output, avoids the " blind area " of ADC top, bottom " blind area " increases the collection accuracy of the collection range two end regions of temperature. BRIEF DESCRIPTION OF DRAWINGS
[0026] In order to more clearly illustrate the technical scheme in the embodiment of the utility model or prior art, the following will be briefly introduced to the drawing needed to be used in the embodiment or prior art description, obviously, the drawing in the following description only some embodiments of the utility model, for ordinary skilled person in the art, under the premise of not paying the creative labor, still can obtain other drawings according to the structure shown in these drawings.
[0027] Figure 1 It is a circuit frame diagram of the temperature sampling circuit of the utility model.
[0028] Figure 2 It is an embodiment circuit diagram of the temperature sampling circuit of the utility model.
[0029] Figure 3 It is a battery system detection circuit diagram of prior art.
[0030] Figure reference: thermistor sampling circuit 01, differential processing circuit 02, bias voltage superposition circuit 03, voltage dividing circuit 31, same phase addition circuit 32.
[0031] The purposes, functional features and advantages of the utility model will be further explained in combination with embodiments with reference to the drawings. DETAILED DESCRIPTION
[0032] The technical solutions in the embodiments of the utility model will be clearly and completely described below in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.
[0033] It should be noted that if the embodiments of the utility model involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative positional relationship, movement condition, etc. between components in a certain specific posture (as shown in the drawings), and if the specific posture changes, the directional indications also change accordingly.
[0034] In addition, if the embodiments of the utility model involve descriptions such as "first", "second", etc., the descriptions of "first", "second", etc. are only for description purposes, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include at least one feature. In addition, the meaning of "and / or" appearing throughout the text is that it includes three parallel schemes. Taking "A and / or B" as an example, it includes A scheme, or B scheme, or A and B schemes. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of ordinary skilled persons in the art, and when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope required by the utility model.
[0035] The utility model provides a kind of temperature sampling circuit, as shown in Figure 1 It includes:
[0036] Thermistor sampling circuit 01, thermistor sampling circuit 01 includes sampling resistance, thermistor sampling circuit 01, for collecting the temperature of target object and converting into corresponding sampling voltage;
[0037] Difference processing circuit 02, difference processing circuit 02 has two input ends, and the two input ends of difference processing circuit 02 are connected with the two ends of sampling resistance;Difference processing circuit 02, for converting first voltage output after sampling voltage is processed by difference;
[0038] A bias voltage superposition circuit 03, an input end of the bias voltage superposition circuit 03 is connected with an output end of the differential processing circuit 02, and the input end of the bias voltage superposition circuit 03 is also used for accessing a bias voltage; the bias voltage superposition circuit 03 is used for superimposing the bias voltage and the first voltage to generate a second voltage output.
[0039] More specifically, temperature is an important parameter for the stable, safe and reliable operation of a battery system, and the battery system needs to detect a temperature range of approximately [-40℃, 125℃] and needs to have relatively high detection accuracy in the full range.
[0040] At present, the general principle of the battery system detection circuit in the industry is that, as shown in the figure, Figure 3 an NTC resistor Rt (Negative Temperature Coefficient, temperature coefficient thermistor) is connected in series with a bias resistor Roffset, a power supply VCC of an MCU (controller) supplies power to the circuit, and the voltage at the connection between the NTC resistor and the bias resistor is collected by the built-in ADC (Analog-to-Digital Converter, analog-to-digital converter) of the MCU, and the resistance value of the NTC at this time is calculated, and then the corresponding temperature value is obtained through the resistance value.
[0041] This circuit structure is simple and low in price, but also has obvious shortcomings:
[0042] (1) The temperature sampling circuit composed of the NTC resistor Rt and the bias resistor Roffset has a large output impedance, which reduces the linearity of the output signal and affects the temperature collection accuracy; when the output impedance is large, the signal is easily affected by the line resistance, capacitance and inductance of the circuit in the transmission process, resulting in signal attenuation. Signal attenuation will cause deviation between the output signal of the sampling circuit and the original temperature signal, thereby affecting the linearity. At the same time, the circuit with large output impedance is more easily disturbed by external noise, and the noise signal will be superimposed on the output signal of the sampling circuit, resulting in inaccurate temperature collection results.
[0043] (2) The inherent offset error and gain error characteristics of the ADC cause a "blind area" at both ends of the ADC collection region, which affects the collection accuracy of the high and low voltage signals of the circuit, thereby affecting the collection accuracy of the temperature regions at both ends of the temperature collection range.
[0044] The offset error of the ADC is caused by the constant difference between the actual and ideal transfer curves of the ADC, and the offset error will cause a fixed deviation, i.e. a blind area, in the collection region of the ADC near zero. When the input signal is close to the least significant bit (LSB) of the ADC, this deviation will cause inaccurate collected data.
[0045] The gain error of the ADC is caused by the difference between the actual and ideal slopes of the ADC output, and the gain error causes the acquisition region of the ADC to deviate from the maximum value and the minimum value, i.e., a blind area. When the input signal is close to the full-scale value of the ADC, the deviation causes the acquired data to be inaccurate.
[0046] The resistance of the NTC resistor changes with temperature, and when the temperature is low, the resistance of the NTC resistor is large, and the corresponding voltage signal is also small. Due to the offset error of the ADC, the acquired voltage signal may be lower than the least significant bit of the ADC, resulting in inaccurate temperature acquisition. When the temperature is high, the resistance of the NTC resistor is small, and the corresponding voltage signal is also large. Due to the gain error of the ADC, the acquired voltage signal may exceed the maximum value of the ADC, resulting in inaccurate temperature acquisition.
[0047] Therefore, the utility model provides a kind of temperature sampling circuit, including thermistor sampling circuit 01, difference processing circuit 02 and bias voltage superposition circuit 03. Among them, thermistor sampling circuit 01, thermistor sampling circuit 01 includes sampling resistance, thermistor sampling circuit 01, for the temperature of target object and conversion into corresponding sampling voltage;
[0048] Sampling resistance is thermistor, when temperature changes, the resistance of thermistor will change, so that the sampling voltage between the two ends of thermistor also changes. The size of sampling voltage reflects the resistance of thermistor, and then reflects the temperature of target object, thermistor is very sensitive to temperature change, so sampling circuit can quickly respond to temperature change.
[0049] Difference processing circuit 02 is to use the difference of two input signals to process signal, so difference processing circuit 02 has two input ends, and the two input ends of difference processing circuit 02 are connected with the two ends of sampling resistance;Difference processing circuit 02 is used for converting sampling voltage into first voltage output by difference processing.
[0050] Difference processing circuit 02 processes the difference between two input signals and outputs a voltage or current signal related to the difference. In this application, difference processing circuit 02 receives the voltage signal between the two ends of sampling resistance and differentially processes it to output first voltage. Difference processing can effectively suppress common mode signals (i.e., the part common to both input signals), thereby improving the signal-to-noise ratio and anti-interference ability of the signal. At the same time, difference processing circuit 02 includes an operational amplifier, and if the operational amplifier uses a high input impedance operational amplifier, impedance isolation between the sampling voltage and the ADC is achieved, the output impedance of the input circuit is reduced, the influence of high signal output impedance on ADC acquisition accuracy is reduced, and the acquisition accuracy of the full temperature acquisition range is improved.
[0051] The bias voltage superposition circuit 03 is connected with the output end of the differential processing circuit 02, and the input end of the bias voltage superposition circuit 03 is also used for connecting the bias voltage; the bias voltage superposition circuit 03 is used for superimposing the bias voltage and the first voltage to generate the second voltage output.
[0052] It is worth noting that the bias voltage superposition circuit 03 avoids the 'blind area' of the ADC, as shown above, the offset error causes the collection area of the ADC to have a fixed deviation near the zero value, so the bias voltage cannot be an integer that exists in the zero value, and the gain error causes the collection area of the ADC to have a deviation near the maximum value and the minimum value, and the bias voltage must not be near the maximum value and the minimum value of the collection area of the ADC after being superimposed with the first voltage.
[0053] The utility model discloses a thermistor sampling circuit 01, differential processing circuit 02 and bias voltage superposition circuit 03 constitute, wherein, differential processing circuit 02 converts the sampling voltage obtained by thermistor sampling circuit 01 into the first voltage output through differential processing, realizes the impedance isolation between sampling voltage and ADC, reduces the output impedance of input circuit, reduces the influence to ADC, improves sampling precision;Bias voltage superposition circuit 03 superimposes the bias voltage and the first voltage to generate the second voltage output, avoids the 'blind area' at the top and the 'blind area' at the bottom of ADC, and increases the collection precision of the two end regions of temperature collection range.
[0054] In an embodiment, as shown in Figure 2 The thermistor sampling circuit 01 further includes a first bias resistor and a second bias resistor, one end of the first bias resistor is connected with the power voltage, the other end is connected with one end of the sampling resistor, one end of the second bias resistor is connected with the other end of the sampling resistor, and the other end is grounded; the potential difference between the two ends of the sampling resistor is the sampling voltage.
[0055] The power voltage supplies power for the thermistor sampling circuit 01, the first bias resistor, the second bias resistor and the sampling resistor are connected in series to form a voltage division, the first bias resistor and the second bias resistor are fixed resistors, and the resistance of the sampling resistor changes with temperature, so that the obtained sampling voltage changes with temperature. Assuming that the bias resistor Rup, the bias resistor Rdw and the sampling resistor Rt are connected in series and connected with the power voltage VCC. The formula of the sampling voltage Vt of the sampling resistor is: .
[0056] In an embodiment, the differential processing circuit 02 comprises a first resistor, a second resistor, a third resistor, a fourth resistor and a first operational amplifier. One end of the first resistor is connected to one end of the sampling resistor, and the other end is connected to the non-inverting input terminal of the first operational amplifier. One end of the third resistor is connected to the other end of the sampling resistor, and the other end is connected to the inverting input terminal of the first operational amplifier. One end of the second resistor is connected to the non-inverting input terminal of the first operational amplifier, and the other end is connected to ground. One end of the fourth resistor is connected to the output terminal of the first operational amplifier, and the other end is connected to the inverting input terminal of the first operational amplifier. The output terminal of the first operational amplifier is the output terminal of the differential processing circuit 02.
[0057] In the present embodiment, the differential processing circuit 02 is a differential amplification circuit, which has high amplification capability for differential mode signals and good suppression capability for common mode signals. That is, when the difference between the two input signals changes, the output signal will amplify this difference accordingly; when the two input signals change at the same time (common mode signal), the output signal remains unchanged. Assuming that the differential amplification circuit composed of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the operational amplifier U1 has an amplification factor of R1 / R2, the formula for the output voltage Vdiff of the differential amplification circuit is: .
[0058] In an embodiment, the bias voltage superposition circuit 03 comprises:
[0059] A voltage dividing circuit 31, the input of the voltage dividing circuit 31 is connected to the power supply voltage; the voltage dividing circuit 31 is used for voltage dividing processing of the power supply voltage to obtain a bias voltage and output; the voltage dividing circuit 31 performs voltage dividing processing on the power supply voltage to obtain a bias voltage for the non-inverting adder circuit 32.
[0060] A non-inverting adder circuit 32, the non-inverting input terminal of the non-inverting adder circuit 32 is connected to the output terminal of the voltage dividing circuit 31 and the output terminal of the differential processing circuit 02; the non-inverting adder circuit 32 is used for superimposing the bias voltage and the first voltage to generate a second voltage output. The working principle of the non-inverting adder circuit 32 is based on the virtual short and virtual open characteristics of the operational amplifier. Virtual short means that the voltages at the two input terminals of the operational amplifier are approximately equal, i.e. the input voltage difference is close to zero; virtual open means that the input current of the operational amplifier is approximately zero, i.e. the input terminal is equivalent to an open circuit.
[0061] In the non-inverting adder circuit 32, due to the virtual short characteristic of the operational amplifier, all input signals are summed at the non-inverting input terminal of the operational amplifier after passing through their respective input resistors. Then, this summed signal is amplified by the operational amplifier and output through the output resistor. Due to the virtual open characteristic of the operational amplifier, the current on the input resistor has no effect on the output voltage, so the output voltage is only related to the input voltage and the resistance value.
[0062] In an embodiment, the voltage dividing circuit 31 comprises a sixth resistor and a seventh resistor, one end of the sixth resistor is connected to the power supply voltage, the other end is connected to one end of the seventh resistor, the other end of the seventh resistor is grounded; the potential difference between the two ends of the seventh resistor is the bias voltage. The in-phase input end of the in-phase adder circuit 32 is connected to the voltage at the connection between the sixth resistor and the seventh resistor, and the bias voltage is the potential difference between the two ends of the seventh resistor, which can be determined by the ratio of the sixth resistor and the seventh resistor.
[0063] Suppose the sixth resistor R6 and the seventh resistor R7 are connected to the power supply voltage VCC, then the bias voltage Voft formula is: .
[0064] In an embodiment, the in-phase adder circuit 32 comprises a fifth resistor, an eighth resistor, an eleventh resistor and an in-phase adder, one end of the fifth resistor is connected to the output end of the differential processing circuit 02, the other end is connected to the in-phase input end of the in-phase adder, one end of the eighth resistor is connected to one end of the seventh resistor, the other end is connected to the in-phase input end of the in-phase adder, one end of the eleventh resistor is connected to the in-phase input end of the in-phase adder, the other end is grounded, and the output end of the in-phase adder is the output end of the bias voltage superposition circuit 03.
[0065] Suppose the operational amplifier U2, resistor R9 and resistor R10 constitute an in-phase adder, in this embodiment, the difference between the in-phase adder circuit 32 and the in-phase adder is that the in-phase input end of the in-phase adder, so the part of the in-phase adder is not described one by one. The adder and the fifth resistor R5, the eighth resistor R8, and the eleventh resistor R11 together constitute an in-phase adder circuit 32, and the output, the input-output conduction formula is: .
[0066] In an embodiment, the in-phase adder comprises a second operational amplifier. The in-phase adder uses the characteristics of the operational amplifier to superimpose multiple input signals in phase. Its basic components include an operational amplifier, multiple input resistors, a feedback resistor, and possibly a bias circuit. The working principle is based on the virtual short and virtual open characteristics of the operational amplifier, which ensures that the input signals are superimposed at the in-phase input end and output after amplification by the operational amplifier.
[0067] In an embodiment, the first operational amplifier and the second operational amplifier are high input impedance operational amplifiers. The first operational amplifier is arranged in the thermistor resistance sampling circuit, and the second operational amplifier is arranged in the bias voltage superposition circuit 03. Both the thermistor resistance sampling circuit and the bias voltage superposition circuit 03 use high input impedance operational amplifiers, which realizes impedance isolation between the NTC voltage signal Vt and the ADC, greatly reduces the output impedance of the input circuit, reduces the influence on the ADC, and improves the linearity of the acquisition circuit.
[0068] The above embodiments and drawings are combined Figure 2 The implementation principle of the scheme is described with the power supply of the 100KΩ3950 type NTC, ADC, and Vref as 3.3V as an example.
[0069] The thermal resistance sampling circuit is composed of the bias resistor Rup, the bias resistor Rdw, and the 3950 NTC sampling resistor Rt in series, and is powered by VCC. The voltage at both ends of Rt is Vt. The sampling voltage Vt formula is: .
[0070] The resistance of Rt is about 3.186KΩ at 125℃, and about 3376.08KΩ at-40℃. Considering the individual error and design margin, it is assumed that the resistance of Rt is located in the interval [2KΩ, 3500KΩ], and the resistance of Rup and Rdw is 330KΩ.
[0071] The first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 form a differential amplifier circuit with the operational amplifier U1, and the amplification factor is R1 / R2 The output voltage Vdiff formula is: . Wherein R1=R2=R3=R4 , the resistance is 200KΩ, and the amplification factor of the circuit is 1, so Vdiff = Vt .
[0072] The sixth resistor R6 and the seventh resistor R7 form a voltage divider circuit 31. The sixth resistor R6 is connected to the power supply voltage VCC and the seventh resistor R7, and the bias voltage Voft formula is: . Wherein R6=22KΩ, K7=2.2KΩ, and the voltage Voft after VCC is divided by R6 and R7 is about 0.3V.
[0073] The operational amplifier U2, the resistor R9, and the resistor R10 form a same-phase adder. The adder and the fifth resistor R5, the eighth resistor R8, and the eleventh resistor R11 form a same-phase adder circuit 32, and the output, the input and output transfer formula is: .
[0074] The resistance of R5, R8, and R11 is 200KΩ, and the resistance of R9=2R10, R9=200KΩ, and R10=100KΩ, so Vout = Vdiff + Voft.
[0075] According to the above, the formula is derived as Vout = Voft + VtThe circuit can superimpose a direct current bias voltage Voft, about 0.3V, when the temperature is high and Rt is small, the bottom "blind area" of the ADC can be avoided, and appropriate Rup and Rdw are selected to avoid the ADC entering the top "blind area" when the temperature is low and Rt is large.
[0076] When Rt is 2KΩ, the temperature is higher than 125℃, Vout = *Vcc+Voft At this time, Vout is about equal to 0.31V;
[0077] When Rt is 3500KΩ, the temperature is lower than -40℃, Vout = *Vcc+Voft At this time, Vout is about equal to 3.076V;
[0078] In summary, in the whole temperature range, the voltage signal acquisition interval of the ADC is located in [3.076V, 0.31V], the top "blind area" and the bottom "blind area" of the ADC are avoided, and the acquisition accuracy of the two end regions of the temperature acquisition range is increased; since the NTC resistance sampling circuit and the bias voltage superposition circuit 03 both adopt the high-input-impedance operational amplifier processing circuit, the impedance isolation between the NTC voltage signal Vt and the ADC is realized, the output impedance of the input circuit is greatly reduced, the influence on the ADC is reduced, and the linearity of the acquisition circuit is improved.
[0079] The utility model also proposes a kind of battery system, including battery, main control circuit and temperature sampling circuit as above described.The temperature sampling circuit is composed of thermistor sampling circuit 01, difference processing circuit 02 and bias voltage superposition circuit 03, wherein, the sampling voltage obtained by thermistor sampling circuit 01 is converted into first voltage output after difference processing by difference processing circuit 02, the impedance isolation between the sampling voltage and the ADC is realized, the output impedance of the input circuit is reduced, the influence on the ADC is reduced, and sampling accuracy is improved;Bias voltage superposition circuit 03 superimposes the bias voltage and first voltage to generate second voltage output, to avoid the top "blind area" and the bottom "blind area" of the ADC, and increase the acquisition accuracy of the two end regions of the temperature acquisition range.
[0080] The temperature sampling circuit detects the temperature of the battery and outputs a signal to the main control circuit to monitor the temperature change of the battery in real time. When the battery temperature is too high or too low, the main control circuit will trigger corresponding alarm or protection measures according to the preset algorithm and threshold value to ensure the safe operation of the battery.
[0081] In an embodiment, the main control circuit includes an analog-to-digital conversion circuit and a controller, the input end of the analog-to-digital conversion circuit is connected with the output end of the temperature sampling circuit, and the output end of the analog-to-digital conversion circuit is connected with the controller.
[0082] The temperature sampling circuit is used for collecting the temperature of the battery and converting it into a second voltage output.
[0083] Analog-to-digital conversion circuit for collecting and converting the voltage signal of the second voltage output by the temperature sampling circuit into a digital signal output to the controller, the controller receives the digital temperature signal output by the analog-to-digital conversion circuit, and performs temperature monitoring and alarm processing according to the preset algorithm and threshold. The analog-to-digital conversion circuit (ADC) converts the continuous analog voltage signal into a discrete digital signal through sampling, quantization, encoding and other steps, so as to be processed by the subsequent digital circuit.
[0084] More specifically, in the present embodiment, the analog-to-digital conversion circuit and the controller are integrated in the same chip. The controller integrated with the ADC reduces the need for external ADC components, simplifying circuit design and layout, and by integrating the ADC and the controller on the same chip, the overall system cost can be reduced, as the additional component procurement and assembly costs are reduced. The controller integrated with the ADC can be used to monitor key parameters such as battery voltage, current and temperature, thereby ensuring safe operation of the battery and extending its service life.
[0085] The above embodiments are only preferred embodiments of the present application, and do not limit the patent scope of the present application, and any equivalent structure or equivalent process transformation, or direct or indirect application in other related technical fields, which are based on the content of the present application specification and drawings, are also included in the patent protection scope of the present application.
Claims
1. A temperature sampling circuit, characterized by, The application relates to a temperature sensor circuit. The temperature sensor circuit comprises: a thermistor sampling circuit, which comprises a sampling resistor, and is used for collecting the temperature of a target object and converting the temperature into a corresponding sampling voltage; a differential processing circuit, which has two input ends connected with two ends of the sampling resistor, and is used for converting the sampling voltage into a first voltage output through differential processing; 2. The temperature sampling circuit of claim 1, wherein, a bias voltage superposition circuit, which has an input end connected with an output end of the differential processing circuit and is also used for inputting a bias voltage, and is used for superimposing the bias voltage and the first voltage to generate a second voltage output. The thermistor sampling circuit further comprises a first bias resistor and a second bias resistor, one end of the first bias resistor is connected with a power supply voltage, the other end is connected with one end of the sampling resistor, one end of the second bias resistor is connected with the other end of the sampling resistor, and the other end is grounded; 3. The temperature sampling circuit of claim 2, wherein, a potential difference between the two ends of the sampling resistor is the sampling voltage.
4. The temperature sampling circuit of claim 1, wherein, The differential processing circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor and a first operational amplifier, one end of the first resistor is connected with one end of the sampling resistor, the other end is connected with a non-inverting input end of the first operational amplifier, one end of the third resistor is connected with the other end of the sampling resistor, the other end is connected with an inverting input end of the first operational amplifier, one end of the second resistor is connected with the non-inverting input end of the first operational amplifier, the other end is grounded, one end of the fourth resistor is connected with an output end of the first operational amplifier, the other end is connected with the inverting input end of the first operational amplifier, and the output end of the first operational amplifier is an output end of the differential processing circuit. The bias voltage superposition circuit comprises: a voltage dividing circuit, which is connected with the power supply voltage, and is used for dividing the power supply voltage to obtain the bias voltage and output the bias voltage; 5. The temperature sampling circuit of claim 4, wherein, a non-inverting adder circuit, which is connected with the output end of the voltage dividing circuit and the output end of the differential processing circuit, and is used for superimposing the bias voltage and the first voltage to generate the second voltage output. The voltage dividing circuit comprises a sixth resistor and a seventh resistor, one end of the sixth resistor is connected with the power supply voltage, the other end is connected with one end of the seventh resistor, and the other end of the seventh resistor is grounded; 6. The temperature sampling circuit of claim 4, wherein, a potential difference between the two ends of the seventh resistor is the bias voltage.
7. The temperature sampling circuit of claim 6, wherein, The non-inverting adder circuit comprises a fifth resistor, an eighth resistor, an eleventh resistor and a non-inverting adder, one end of the fifth resistor is connected with the output end of the differential processing circuit, the other end is connected with a non-inverting input end of the non-inverting adder, one end of the eighth resistor is connected with one end of the seventh resistor, the other end is connected with the non-inverting input end of the non-inverting adder, one end of the eleventh resistor is connected with the non-inverting input end of the non-inverting adder, the other end is grounded, and an output end of the non-inverting adder is an output end of the bias voltage superposition circuit. The non-inverting adder comprises a second operational amplifier.
8. The temperature sampling circuit of claim 3, wherein, The first operational amplifier and the second operational amplifier are high input impedance operational amplifiers.
9. A battery system characterized by, The temperature sampling circuit comprises a battery, a main control circuit and a temperature sampling circuit according to any one of claims 1-8.
10. The battery system of claim 9, wherein, The main control circuit comprises an analog-to-digital conversion circuit and a controller, an input end of the analog-to-digital conversion circuit is connected with an output end of the temperature sampling circuit, and the controller is connected with an output end of the analog-to-digital conversion circuit. The temperature sampling circuit is used for collecting the temperature of the battery and converting the temperature into a second voltage output. The analog-to-digital conversion circuit is used for collecting and converting a voltage signal of the second voltage output by the temperature sampling circuit into a digital signal and outputting the digital signal to the controller.