Phase-locked loop circuit

Abstract

The utility model provides a phase-locked loop circuit, which relates to the technical field of phase-locked loops and comprises a reference frequency multiplication filtering unit, an auxiliary mixing frequency-locked phase loop unit and a main mixing frequency-locked phase loop unit. The reference frequency multiplication filtering unit is used for receiving the first reference signal, performing frequency division processing on the first reference signal, performing frequency multiplication filtering on one path of signal after frequency division processing, and outputting a low-phase noise signal; the auxiliary frequency-mixing phase-locked loop unit is used for receiving the low-phase noise signal output by the reference frequency-doubling filtering unit and the other path of signal obtained by frequency division of the reference frequency-doubling filtering unit, and outputting an LO reference signal after frequency mixing and phase discrimination; and the main frequency mixing phase-locked loop unit is used for receiving the second reference signal and the LO reference signal output by the auxiliary frequency mixing phase-locked loop unit, and outputting a coherent signal after frequency mixing and phase discrimination. According to the utility model, the LMX2820 is used as the phase discriminator, the phase detection range is small, the locking detection can be easier, and the practicability is strong.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of phase-locked loop, and particularly to a phase-locked loop circuit. BACKGROUND

[0002] The phase-locked loop technology has a wide application in the communication field, and its core is a feedback circuit which adjusts the frequency of the output signal by constantly comparing the phase difference between the input signal and the feedback signal, so that the output signal is synchronized with the input signal. The most basic phase-locked loop system mainly includes three basic modules: phase detector, loop filter and voltage-controlled oscillator; wherein, the phase detector is a kind of phase comparison device, which compares the phase of the input signal and the output signal of the phase-locked loop, generates an error potential corresponding to the phase difference of the two signals, and makes the phase-locked loop system stable output. In the microwave radio frequency, HMC3716 is often used as a phase detector (detection frequency: 10~1300MHz), which can provide a wide loop bandwidth and low frequency division number as a phase detector, so as to realize fast switching and extremely low phase noise. LMX2820 is a PLL with high phase detector frequency, and its phase detection frequency (300MHz fractional mode, 400MHz integer mode) range is narrower than that of HMC3716, which is easy to lock detection. In practical application, the detection frequency is relatively low, and how to narrow the phase detection range to more easily lock detection is one of the main purposes of the design of the phase-locked loop circuit. CONTENT OF THE UTILITY MODEL

[0003] In order to solve the defects of the above-mentioned related prior art, the present application provides a phase-locked loop circuit with a smaller phase detection range, which can more easily lock detection and has strong practicability.

[0004] In order to achieve the above-mentioned purpose, the present application adopts the following technology:

[0005] A phase-locked loop circuit, comprising a reference frequency multiplication filtering unit, a secondary frequency mixing phase-locked loop unit and a main frequency mixing phase-locked loop unit.

[0006] The reference frequency multiplication filtering unit is used for receiving a first reference signal and performing power division processing thereon, multiplying and filtering one signal after power division processing, and outputting a low phase noise signal.

[0007] The secondary frequency mixing phase-locked loop unit is used for receiving the low phase noise signal output by the reference frequency multiplication filtering unit and another signal obtained by power division of the reference frequency multiplication filtering unit, and outputting an LO reference signal after frequency mixing and phase detection.

[0008] The main frequency mixing phase-locked loop unit is used for receiving a second reference signal and the LO reference signal output by the secondary frequency mixing phase-locked loop unit, and outputting a phase reference signal after frequency mixing and phase detection.

[0009] Further, the reference frequency multiplication filter unit comprises a first power divider, a first amplifier, a second amplifier, a third amplifier, three first frequency multipliers, three second frequency multipliers, a first filter, and a second filter.

[0010] The input end of the first power divider is configured to receive a first reference signal, one of the output ends of the first power divider is connected to the input end of the first amplifier, the output end of the first amplifier is connected to the input end of the first filter, the three first frequency multipliers are connected in series, the two ends of the three first frequency multipliers are connected to the output end of the first filter and the input end of the second filter respectively, the output end of the second filter is connected to the input end of the second amplifier, the three second frequency multipliers are connected in series, the two ends of the three second frequency multipliers are connected to the output end of the second amplifier and the input end of the third amplifier respectively.

[0011] Further, the reference frequency multiplication filter unit comprises a first power divider, a first amplifier, a second amplifier, a third amplifier, three first frequency multipliers, three second frequency multipliers, a first filter, and a second filter.

[0012] The input end of the first power divider is configured to receive a first reference signal, one of the output ends of the first power divider is connected to the input end of the first amplifier, the output end of the first amplifier is connected to the input end of the first filter, the three first frequency multipliers are connected in series, the two ends of the three first frequency multipliers are connected to the output end of the first filter and the input end of the second filter respectively, the output end of the second filter is connected to the input end of the second amplifier, the three second frequency multipliers are connected in series, the two ends of the three second frequency multipliers are connected to the output end of the second amplifier and the input end of the third amplifier respectively.

[0013] Further, the reference frequency multiplication filter unit comprises a first power divider, a first amplifier, a second amplifier, a third amplifier, three first frequency multipliers, three second frequency multipliers, a first filter, and a second filter.

[0014] The reference signal input end of the second phase detector is used for receiving a second reference signal, the difference signal output end of the second phase detector is connected with the input end of the second LPF loop filter, the output end of the second LPF loop filter is connected with the control voltage input end of the second VCO, the radio frequency output end of the second VCO is connected with the input end of the third power divider, one of the output ends of the third power divider is used for outputting a phase reference signal, the other output end of the third power divider is connected with the input end of the eighth amplifier, the input end of the eighth amplifier is connected with the input end of the seventh filter, and the output end of the seventh filter is connected with the first switch;

[0015] The first switch is connected with the input end of the ninth amplifier, the output end of the ninth amplifier is connected with the input end of the eighth filter, the output end of the eighth filter is connected with the radio frequency input end of the second mixer, the local oscillator input end of the second mixer is used for receiving the LO reference signal output by the sub-mixing phase-locked loop unit, the intermediate frequency output end of the second mixer is connected with the input end of the ninth filter, the output end of the ninth filter is connected with the input end of the tenth amplifier, the output end of the tenth amplifier is connected with the input end of the tenth filter, and the output end of the tenth filter is connected with the second switch.

[0016] The first switch is also connected with the input end of the second frequency divider, the output end of the second frequency divider is connected with the input end of the eleventh filter, and the output end of the eleventh filter is connected with the DDS.

[0017] The second switch is also connected with the input end of the twelfth filter, and the output end of the twelfth filter is connected with the feedback signal input end of the second phase detector.

[0018] Further, the first phase detector adopts an HMC3716 phase detector.

[0019] Further, the second phase detector adopts an LMX2820 phase detector.

[0020] Further, the frequency of the first reference signal is 1GHz.

[0021] The utility model discloses the beneficial effect lies in:

[0022] The phase-locked loop circuit composed of the reference frequency multiplication filter unit, the sub-mixing phase-locked loop unit and the main mixing phase-locked loop unit has a narrow phase detection frequency range, is easier to lock detection, and can identify signals, quickly switch and generate qualified signals, has low phase noise, and has excellent FOM value and phase detection stray level. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 It is the schematic diagram of the phase-locked loop circuit of the embodiment of the application. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the embodiments of the utility model will be described in detail below with reference to the drawings, but the embodiments described by the utility model are part of the embodiments of the utility model, not all the embodiments.

[0025] As shown in Figure 1 The utility model provides a phase-locked loop circuit, including reference frequency multiplication filter unit, vice mixed frequency phase-locked loop unit, main mixed frequency phase-locked loop unit, reference frequency multiplication filter unit is used to receive first reference signal and carries out power division processing, and one way signal is frequency multiplication filtered after power division processing, and low phase noise signal is output, vice mixed frequency phase-locked loop unit is used to receive the low phase noise signal of reference frequency multiplication filter unit output and another way signal obtained by reference frequency multiplication filter unit power division, and after mixing and phase discrimination, LO reference signal is output, main mixed frequency phase-locked loop unit is used to receive second reference signal and the LO reference signal of vice mixed frequency phase-locked loop unit output, and after mixing and phase discrimination, phase reference signal is output.

[0026] As shown in Figure 1 Reference frequency multiplication filter unit includes first power divider, first amplifier, second amplifier, third amplifier, three first frequency multipliers, three second frequency multipliers, first filter, second filter.

[0027] The input end of first power divider is used to receive first reference signal, one output end of first power divider is connected the input end of first amplifier, the output end of first amplifier is connected the input end of first filter, three first frequency multipliers are connected in series, two ends of three first frequency multipliers are connected the output end of first filter and the input end of second filter respectively, the output end of second filter is connected the input end of second amplifier, three second frequency multipliers are connected in series, two ends of three second frequency multipliers are connected the output end of second amplifier and the input end of third amplifier respectively.

[0028] First power divider is used to divide first reference signal into two, one way signal is used as frequency multiplication reference, and another way is used as the reference signal of vice mixed frequency phase-locked loop unit phase discriminator, first amplifier and second amplifier are used to amplify signal power, so that they drive first frequency multiplier and second frequency multiplier respectively, and third amplifier is used to amplify signal power, so that it drives first frequency multiplier, first frequency multiplier and second frequency multiplier are used to frequency multiplication, and low phase noise signal of higher frequency is obtained, first filter and second filter are used to filter the signal after frequency multiplication and amplification, and MINI filter can be used to filter out interference and stray signals to obtain clean signals.

[0029] As shown in Figure 1The auxiliary frequency mixing phase-locked loop unit includes a first frequency divider, a first phase discriminator, a first LPF loop filter, a first VCO, a fourth amplifier, a fifth amplifier, a sixth amplifier, a seventh amplifier, a second power divider, a third filter, a fourth filter, a fifth filter, a sixth filter, and a first frequency mixer.

[0030] An input end of the first frequency divider is connected to another output end of the first power divider, an output end of the first frequency divider is connected to a reference signal input end of the first phase discriminator, a difference signal output end of the first phase discriminator is connected to an input end of the first LPF loop filter, an output end of the first LPF loop filter is connected to a control voltage input end of the first VCO, a radio frequency output end of the first VCO is connected to an input end of the fourth amplifier, an output end of the fourth amplifier is connected to an input end of the second power divider, two output ends of the second power divider are respectively connected to input ends of the third filter and the fourth filter, an input end of the fifth amplifier is connected to an output end of the third filter, a radio frequency input end of the first frequency mixer is connected to an input end of the fifth amplifier, an oscillator input end of the first frequency mixer is connected to an output end of the third amplifier, an intermediate frequency output end of the first frequency mixer is connected to an input end of the fifth filter, an output end of the fifth filter is connected to an input end of the sixth amplifier, an output end of the sixth amplifier is connected to an input end of the sixth filter, an output end of the sixth filter is connected to an input end of the seventh amplifier, and an output end of the seventh amplifier is connected to a feedback signal input end of the first phase discriminator.

[0031] The first frequency divider is used for frequency division of the signal from the first power divider to a certain range, and provides a signal with a suitable frequency to the HMC3716 phase detector; the HMC3716 phase detector is used for phase detection of the frequency-divided signal and the low-frequency signal obtained by the first mixer, and outputs the obtained signal to the first LPF loop filter; the first LPF loop filter is used for filtering the signal from the HMC3716 phase detector to obtain a direct current signal and loading the direct current signal to the control voltage input end of the first VCO to adjust the output signal of the first VCO; the first VCO is used for generating a high-frequency phase reference signal; the second power divider is used for dividing the high-frequency phase reference signal generated by the first VCO into two paths, one path is output to the main mixer phase-locked loop unit mixer as a LO reference signal, and the other path is used as the local oscillator signal of the first mixer; the fourth amplifier is used for amplifying the phase reference signal output by the VCO, and the fifth amplifier is used for amplifying the high-frequency signal generated by the first VCO as the local oscillator signal of the first mixer, while optimizing the output signal spur, preferably, the isolation degree of the first mixer to the loop output end can be further improved by connecting a plurality of amplifiers and attenuators in series, thereby further optimizing the output signal spur index; the sixth amplifier and the seventh amplifier are used for power amplification of the low-frequency signal entering the HMC3716 phase detector; the first mixer is used for mixing the high-frequency signal generated by the first VCO with the low-phase noise signal from the reference frequency multiplication filter unit, and feeding back the obtained intermediate frequency signal to the HMC3716 phase detector as a feedback signal for phase detection, preferably, by using a mixer instead of a frequency divider in the loop, the phase-locked loop N value can be reduced, thereby optimizing the output signal phase noise; the third filter, the fourth filter, the fifth filter and the sixth filter are all used for filtering signals, and MINI filters can be used to filter out interference spur to obtain a clean signal.

[0032] As shown in Figure 1 The main mixer phase-locked loop unit includes a second phase detector, a second LPF loop filter, a second VCO, a third power divider, an eighth amplifier, a ninth amplifier, a tenth amplifier, a seventh filter, an eighth filter, a ninth filter, a tenth filter, an eleventh filter, a twelfth filter, a first switch, a second switch, a second mixer, a second frequency divider and a DDS.

[0033] The reference signal input end of the second phase detector is used for receiving a second reference signal, the difference signal output end of the second phase detector is connected to the input end of the second LPF loop filter, the output end of the second LPF loop filter is connected to the control voltage input end of the second VCO, the radio frequency output end of the second VCO is connected to the input end of the third power divider, one of the output ends of the third power divider is used for outputting a phase reference signal, the other output end of the third power divider is connected to the input end of the eighth amplifier, the input end of the eighth amplifier is connected to the input end of the seventh filter, and the output end of the seventh filter is connected to the first switch.

[0034] The first switch is connected to the input end of the ninth amplifier, the output end of the ninth amplifier is connected to the input end of the eighth filter, the output end of the eighth filter is connected to the radio frequency input end of the second mixer, the local oscillator input end of the second mixer is connected to the output end of the fourth filter, the intermediate frequency output end of the second mixer is connected to the input end of the ninth filter, the output end of the ninth filter is connected to the input end of the tenth amplifier, the output end of the tenth amplifier is connected to the input end of the tenth filter, and the output end of the tenth filter is connected to the second switch.

[0035] The first switch is also connected to the input end of the second frequency divider, the output end of the second frequency divider is connected to the input end of the eleventh filter, and the output end of the eleventh filter is connected to the DDS.

[0036] The second switch is also connected to the input end of the twelfth filter, and the output end of the twelfth filter is connected to the feedback signal input end of the second phase detector.

[0037] The second phase detector is used for phase detection of the second reference signal and the low frequency signal obtained by the second mixer, and outputs the obtained difference signal to the second LPF loop filter; the second LPF loop filter is used for filtering the difference signal output by the LMX phase detector to obtain a direct current signal and loading the direct current signal to the control voltage input end of the second VCO, so as to adjust the output signal of the VCO; the second VCO is used for generating a high frequency phase reference signal; the third power divider is used for dividing the high frequency phase reference signal generated by the second VCO into two paths, one path is output, and the other path is frequency divided or mixed; the eighth amplifier is used for amplifying the high frequency phase reference signal output by the second VCO, the ninth amplifier is used for amplifying the high frequency phase reference signal generated by the second VCO as the local oscillator signal of the second mixer, at the same time, the isolation degree from the output end of the loop to the second mixer is improved, and the output signal spur is optimized; the tenth amplifier is used for power amplifying the low frequency signal entering the LMX2820 phase detector; the first switch and the second switch are used for controlling whether the high frequency phase reference signal generated by the second VCO is frequency divided or mixed; the second frequency divider is used for frequency dividing the high frequency phase reference signal generated by the second VCO multiple times to obtain a low frequency signal, and the low frequency signal and the reference signal are phase detected by the LMX2820 phase detector; the seventh filter, the eighth filter, the ninth filter, the tenth filter, the eleventh filter and the twelfth filter are all used for filtering signals, and MINI filters can be used to filter out interference spur to obtain a clean signal.

[0038] Specifically, the first phase detector adopts an HMC3716 phase detector, the second phase detector adopts an LMX2820 phase detector, and the frequency of the first reference signal is 1GHz.

[0039] The above descriptions are only the preferred embodiment of the present application, and are not intended to limit the present application. Obviously, a person skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application.

Claims

1. A phase-locked loop circuit, characterized by comprising: The reference frequency multiplication filter unit, the auxiliary frequency mixing phase-locked loop unit, and the main frequency mixing phase-locked loop unit are comprised. The reference frequency multiplication filter unit is used for receiving a first reference signal and power dividing the first reference signal, frequency multiplying and filtering one of the power divided signals to output a low phase noise signal. The auxiliary frequency mixing phase-locked loop unit is used for receiving the low phase noise signal output by the reference frequency multiplication filter unit and another power divided signal, mixing and phase discriminating the received signals to output an LO reference signal. The main frequency mixing phase-locked loop unit is used for receiving a second reference signal and the LO reference signal output by the auxiliary frequency mixing phase-locked loop unit, mixing and phase discriminating the received signals to output a phase reference signal.

2. The phase-locked loop circuit of claim 1, wherein, The reference frequency multiplication filter unit comprises a first power divider, a first amplifier, a second amplifier, a third amplifier, three first frequency multipliers, three second frequency multipliers, a first filter, and a second filter. The input end of the first power divider is used for receiving the first reference signal, one of the output ends of the first power divider is connected to the input end of the first amplifier, the output end of the first amplifier is connected to the input end of the first filter, the three first frequency multipliers are connected in series, the two ends of the three first frequency multipliers are connected to the output end of the first filter and the input end of the second filter respectively, the output end of the second filter is connected to the input end of the second amplifier, the three second frequency multipliers are connected in series, the two ends of the three second frequency multipliers are connected to the output end of the second amplifier and the input end of the third amplifier respectively.

3. The phase-locked loop circuit of claim 1, wherein, The auxiliary frequency mixing phase-locked loop unit comprises a first frequency divider, a first phase discriminator, a first LPF loop filter, a first VCO, a fourth amplifier, a fifth amplifier, a sixth amplifier, a seventh amplifier, a second power divider, a third filter, a fourth filter, a fifth filter, a sixth filter, and a first frequency mixer. The input end of the first frequency divider is used for receiving another power divided signal obtained by the reference frequency multiplication filter unit, the output end of the first frequency divider is connected to the reference signal input end of the first phase discriminator, the difference signal output end of the first phase discriminator is connected to the input end of the first LPF loop filter, the output end of the first LPF loop filter is connected to the control voltage input end of the first VCO, the radio frequency output end of the first VCO is connected to the input end of the fourth amplifier, the output end of the fourth amplifier is connected to the input end of the second power divider, the two output ends of the second power divider are connected to the input ends of the third filter and the fourth filter respectively, the output end of the third filter is connected to the input end of the fifth amplifier, the input end of the fifth amplifier is connected to the radio frequency input end of the first frequency mixer, the local oscillator input end of the first frequency mixer is used for receiving the low phase noise signal output by the reference frequency multiplication filter unit, the intermediate frequency output end of the first frequency mixer is connected to the input end of the fifth filter, the output end of the fifth filter is connected to the input end of the sixth amplifier, the output end of the sixth amplifier is connected to the input end of the sixth filter, the output end of the sixth filter is connected to the input end of the seventh amplifier, and the output end of the seventh amplifier is connected to the feedback signal input end of the first phase discriminator.

4. The phase-locked loop circuit of claim 1, wherein, The main frequency mixing phase-locked loop unit comprises a second phase discriminator, a second LPF loop filter, a second VCO, a third power divider, an eighth amplifier, a ninth amplifier, a tenth amplifier, a seventh filter, an eighth filter, a ninth filter, a tenth filter, an eleventh filter, a twelfth filter, a first switch, a second switch, a second frequency mixer, a second frequency divider, and a DDS. The reference signal input end of the second phase discriminator is configured to receive a second reference signal, the difference signal output end of the second phase discriminator is connected to the input end of the second LPF loop filter, the output end of the second LPF loop filter is connected to the control voltage input end of the second VCO, the radio frequency output end of the second VCO is connected to the input end of the third power divider, one of the output ends of the third power divider is configured to output a phase reference signal, the other output end of the third power divider is connected to the input end of the eighth amplifier, the input end of the eighth amplifier is connected to the input end of the seventh filter, and the output end of the seventh filter is connected to the first switch. The first switch is connected to the input end of the ninth amplifier, the output end of the ninth amplifier is connected to the input end of the eighth filter, the output end of the eighth filter is connected to the radio frequency input end of the second frequency mixer, the local oscillator input end of the second frequency mixer is configured to receive an LO reference signal output by the sub frequency mixing phase-locked loop unit, the intermediate frequency output end of the second frequency mixer is connected to the input end of the ninth filter, the output end of the ninth filter is connected to the input end of the tenth amplifier, the output end of the tenth amplifier is connected to the input end of the tenth filter, the output end of the tenth filter is connected to the second switch, and the second switch is further connected to the input end of the second frequency divider. The output end of the second frequency divider is connected to the input end of the eleventh filter, the output end of the eleventh filter is connected to the DDS, and the DDS is connected to the second switch. The second switch is further connected to the input end of the twelfth filter, and the output end of the twelfth filter is connected to the feedback signal input end of the second phase discriminator.

5. The phase-locked loop circuit of claim 3, wherein, The first phase discriminator is an HMC3716 phase discriminator.

6. The phase-locked loop circuit of claim 4, wherein, The second phase discriminator is an LMX2820 phase discriminator.

7. The phase-locked loop circuit of claim 1, wherein, The frequency of the first reference signal is 1 GHz.

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