Design device for surface-mounted LC multiplexer on PCB

Abstract

The utility model provides an LC multiplexer design device for surface mounting on a PCB. The LC multiplexer design device comprises a computing device, a memory, a display, an input device and a communication device, the LC multiplexer is formed by pasting an SMT element on a PCB (Printed Circuit Board) with preset wiring; the computing device is used for circuit design simulation; the memory is used for storing a circuit design simulation program and SMT element parameter data, and the display is used for displaying a principle circuit diagram or a PCB diagram of the multiplexer; the input device is used for inputting LC multiplexer design data; the number of branches of the LC multiplexer, the working frequency, the frequency band bandwidth, the insertion loss of the multiplexer and the out-of-band rejection of the multiplexer are determined; the communication device is used for establishing a two-way communication channel with an upper computer, and the two-way communication channel transmits a principle circuit diagram or a PCB diagram of the multiplexer; and simulation parameters can be manually modified. The LC multiplexer does not need to be debugged, so that the cost of related equipment can be greatly reduced.

Description

TECHNICAL FIELD

[0001] The utility model belongs to communication electronic circuit technical field especially relates to a kind of LC multiplexer design device for PCB board top surface mounting. BACKGROUND

[0002] With the application of wireless transmission technology more and more widely, the application of LC multiplexer is also more and more widely, and many occasions need to match the LC multiplexer of wireless communication equipment. The traditional LC multiplexer adopts independent cavity design, and has many problems such as large storage size, low compatibility, high cost, inflexible design, high installation requirements and the like. An LC multiplexer design device based on PCB board top surface mounting is urgently needed. INVENTION CONTENTS

[0003] To solve the above technical problems, the utility model provides an LC multiplexer design device for PCB board top surface mounting, which comprises a computing device, a memory, a display, an input device and a communication device.

[0004] The LC multiplexer is made by pasting SMT components on a PCB board with pre-set wiring.

[0005] The computing device is used for circuit design simulation.

[0006] The memory is used for storing circuit design simulation programs and SMT component parameter data, and the data includes component model, component capacity, component size and component pad size.

[0007] The display is used for displaying the principle circuit diagram of the multiplexer or the PCB board diagram.

[0008] The input device is used for inputting LC multiplexer design data, and the design data includes the number of branches of the LC multiplexer, working frequency, frequency band bandwidth, insertion loss of the multiplexer and out-of-band suppression of the multiplexer.

[0009] The communication device is used for establishing a bidirectional communication channel with an upper computer, and the bidirectional communication channel transmits the principle circuit diagram of the multiplexer or the PCB board diagram.

[0010] The circuit design simulation includes automatic simulation and manual modification simulation.

[0011] Further, the LC multiplexer comprises N LC capacitive coupling filters and a common branch. One end of each LC capacitive coupling filter serves as an input terminal or an output terminal, the other end of the LC capacitive coupling filter is connected to one end of the common branch, and the other end of the common branch serves as an output terminal or an input terminal.

[0012] Each LC capacitive coupling filter constitutes one branch of the LC multiplexer, and 4≥N≥1.

[0013] Further, the LC capacitive coupling filter comprises M parallel resonant circuits and M+1 coupling capacitors connected in series.

[0014] Each parallel resonant circuit is composed of one resonant inductor and one resonant capacitor connected in parallel, one end of each parallel resonant circuit is connected to the connection end of two coupling capacitors, and the other end of each parallel resonant circuit is connected to the ground end.

[0015] Further, the circuit design simulation comprises: calculating the parasitic capacitance capacity value generated by the element pad and the PCB pad, and adjusting the capacity of the resonant capacitor in the LC capacitive coupling filter to offset the parasitic capacitance capacity.

[0016] Further, the adjusting of the capacity of the resonant capacitor to offset the parasitic capacitance capacity comprises: reducing the capacity value of the resonant capacitor in each parallel resonant circuit.

[0017] Further, the common branch comprises K+1 series inductors and K parallel capacitors, one end of each parallel capacitor is connected to the connection end of two series inductors, and the other end of the capacitor is connected to the ground end.

[0018] Further, the connection terminals of the N LC capacitive coupling filters and the common branch constitute a common pad; the common pad adopts a ring-shaped configuration.

[0019] Further, the circuit design simulation comprises: calculating the parasitic capacitance capacity value of the common pad, and reducing the capacity of each parallel capacitor in the common branch to offset the parasitic capacitance capacity of the common pad.

[0020] Further, the manual modification simulation comprises adjusting the capacity of the coupling capacitor through an input device.

[0021] The utility model discloses a printed circuit board directly surface mount inductor capacitor element is made into multiplexer, and provides a kind of design device, for design directly surface mount (Surface Mounted Technology, SMT) inductor, capacitor is welded on PCB board once forming using reflow soldering mode, this LC multiplexer basically does not need debugging, solve the size, cost, design flexibility, debugging, installation of traditional LC multiplexer etc., can greatly reduce the cost of related equipment. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 It is the structural diagram of the utility model.

[0023] Figure 2 It is the circuit topology diagram of general LC multiplexer.

[0024] Wherein, F1~F4 are optional terminals; F0 is a common terminal; cn1 is a first branch first coupling capacitor; cm1 is a first branch first resonance capacitor; cm1 is a first branch first resonance inductor; L02 is a second inductor of a common branch, and c02 is a second capacitor of the common branch; K is a common terminal DETAILED DESCRIPTION

[0025] In view of the deficiencies of the prior art, the utility model provides a multiworker which uses surface mount technology (SMT) inductors and capacitors on a printed circuit board (PCB), and provides a design device for designing an LC multiworker which is integrally formed by welding SMT inductors and capacitors on a PCB by using a reflow soldering method. The LC multiworker basically does not need to be debugged, and solves the problems of size, cost, design flexibility, debugging, installation and the like of a traditional LC multiworker, so that the cost of related equipment can be greatly reduced.

[0026] The specific embodiments of the utility model will be described in detail below with reference to the drawings.

[0027] Embodiment 1

[0028] Appendix Figure 1 The utility model structural diagram.

[0029] The utility model provides an LC multiworker design device which is surface mounted on a PCB, and the design device comprises a computing device, a memory, a display, an input device and a communication device.

[0030] The LC multiworker is made by pasting SMT components on a PCB with pre-set wiring.

[0031] The computing device is used for circuit design simulation.

[0032] The memory is used for storing a circuit design simulation program and SMT component parameter data, and the data comprises component model, component capacity, component size and component pad size.

[0033] The display is used for displaying a principle circuit diagram or a PCB diagram of the multiworker.

[0034] The input device is used for inputting LC multiworker design data, and the design data comprises the number of branches of the LC multiworker, working frequency, frequency band bandwidth, multiworker insertion loss and multiworker out-of-band rejection.

[0035] The communication device is used for establishing a bidirectional communication channel with an upper computer, and the bidirectional communication channel transmits a principle circuit diagram or a PCB diagram of the multiworker.

[0036] The circuit design simulation includes automatic simulation and manual modification simulation.

[0037] The utility model discloses a simulation design multiplexer of LC capacitive coupling filter by the calculation device using the circuit design simulation software stored in, the calculation device of the utility model is limited to the super small computing function system of singlechip or microprocessor composition, using this calculation device matches small -size touch display screen constitutes a kind of special design device, it is convenient to carry, also can communicate and contact with host computer by wireless communication device, carry out the mutual transmission of electrical schematic diagram and printed circuit board (PCB) diagram, or update the circuit design simulation software version of this calculation device.Small -size touch display screen is both input device and display.

[0038] As shown in the accompanying Figure 2 Figure, it is a 4 branch multiplexer, this circuit board and circuit principle diagram have been stored in memory, can be controlled by calculation device adjustment branch number and the parameter of resonant inductance resonant capacitor, to constitute the LC multiplexer of specified frequency band bandwidth and frequency, also can specify parameter to select branch number, the utility model discloses the LC multiplexer given in the accompanying Figure 2 Figure includes four LC capacitive coupling filters and a common branch;LC capacitive coupling filter is multisection band-pass filter, common branch is low-pass filter, one end of LC capacitive coupling filter is as multiplexer input terminal or output terminal, the other end of the LC capacitive coupling filter is connected to one end of common branch, when one end of LC capacitive coupling filter is input terminal, the other end of common branch is output terminal. Conversely, when one end of LC capacitive coupling filter is output terminal, the other end of common branch is input terminal.

[0039] Each LC capacitive coupling filter as a branch, it includes multiple parallel resonant circuits and multiple coupling capacitors in series with each other;

[0040] Each parallel resonant circuit is composed of 1 resonant inductance and 1 resonant capacitor in parallel, one end of each parallel resonant circuit is connected to the interconnected end of two coupling capacitors, the other end of each parallel resonant circuit is connected to the ground terminal.

[0041] The circuit design simulation includes; The parasitic capacitance capacity value generated by the calculation element pad and the PCB pad is adjusted to offset the parasitic capacitance capacity by adjusting the capacity of the resonant capacitor in the LC capacitive coupling filter. Usually, the capacity value of the resonant capacitor is reduced.

[0042] The common branch includes multiple series inductors and multiple parallel capacitors, one end of each parallel capacitor is connected to the interconnected end of two series inductors, and the other end of the capacitor is connected to the ground terminal.

[0043] Different filters will interfere with each other, and the K of the combined end of the multi-path LC capacitive coupling filter needs to be matched with the common end designed by circuit design simulation; the method is to reduce the size of the solder pad by matching when the multi-path LC filter converges to form a larger solder pad and the common solder pad is designed in a ring shape to reduce the common end plate capacitance.

[0044] LC multiplexer PCB parasitic capacitance calculation: calculate the parasitic capacitance caused by the component solder pad. After completing the PCB parasitic capacitance calculation, put the corresponding parameters into the multiplexer circuit, and use the cancellation method to correct the resonance capacitance capacity of the multiplexer resonance circuit, to eliminate the influence of the solder pad parasitic capacitance;

[0045] Calculate the parasitic capacitance capacity value generated by the component solder pad and the PCB solder pad, and adjust the capacity of the resonance capacitor in the LC capacitive coupling filter to offset the parasitic capacitance capacity.

[0046] Further, the method for adjusting the capacity of the capacitor to offset the parasitic capacitance capacity includes reducing the capacity value of the resonance capacitor in each parallel resonance circuit.

[0047] 4 LC capacitive coupling filters and the interconnection terminals of the common branch constitute a common solder pad; the common solder pad adopts a ring configuration. Calculate the parasitic capacitance capacity value of the common solder pad, and reduce the capacity of each parallel capacitor in the common branch to offset the parasitic capacitance capacity of the common solder pad.

[0048] Further, the manual modification simulation includes adjusting the capacity of the coupling capacitor by an input device to adapt to the input and output matching requirements of the multiplexer.

[0049] The above only describes the preferred embodiments of the patent and does not limit the patent, and any modifications, equivalent replacements and improvements made within the spirit and principles of the patent should be included in the protection scope of the patent.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the utility model embodiments and not to limit them, although the utility model embodiments have been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that the technical solutions of the utility model embodiments can be modified or replaced without departing from the spirit and scope of the utility model embodiments.

Claims

1. A device for designing LC multiplexer on surface mount on PCB board, characterized by: The design device comprises a computing device, a memory, a display, an input device and a communication device; The LC multiplexer is made by pasting SMT components on a PCB board with preset wiring; The computing device is used for circuit design simulation; The memory is used for storing circuit design simulation program and SMT component parameter data, and the data comprises component model, component capacity, component size and component pad size; The display is used for displaying principle circuit diagram or PCB board diagram of the multiplexer; The input device is used for inputting LC multiplexer design data, and the design data comprises branch number, working frequency, frequency band bandwidth, insertion loss and out-of-band rejection of the multiplexer; The communication device is used for establishing a bidirectional communication channel with a host computer, and the bidirectional communication channel transmits principle circuit diagram or PCB board diagram of the multiplexer; The circuit design simulation comprises automatic simulation and manual modification simulation.

2. The design apparatus of claim 1, wherein The LC multiplexer comprises N LC capacitive coupling filters and a common branch; one end of each LC capacitive coupling filter serves as an input terminal or an output terminal, and the other end of the LC capacitive coupling filter is connected to one end of the common branch, and the other end of the common branch serves as an output terminal or an input terminal. Each LC capacitive coupling filter constitutes one branch of the LC multiplexer; 4≥N≥1.

3. The design apparatus of claim 2, wherein The LC capacitive coupling filter comprises M parallel resonance circuits and M+1 coupling capacitors in series with each other. Each parallel resonance circuit is composed of one resonance inductor and one resonance capacitor in parallel, one end of each parallel resonance circuit is connected to the interconnection end of two coupling capacitors, and the other end of each parallel resonance circuit is connected to the ground end. The common branch comprises K+1 series inductors and K parallel capacitors, one end of each parallel capacitor is connected to the interconnection end of two series inductors, and the other end of each parallel capacitor is connected to the ground end; M and K are positive integers greater than or equal to 1.

4. The design apparatus of claim 3, wherein The circuit design simulation comprises calculating the parasitic capacitance capacity value generated by the component pad and the PCB pad, and adjusting the capacity of the resonance capacitor in the LC capacitive coupling filter to offset the parasitic capacitance capacity.

5. The design apparatus of claim 4, wherein The adjustment of the capacity of the resonance capacitor to offset the parasitic capacitance capacity comprises reducing the capacity value of the resonance capacitor in each parallel resonance circuit.

6. The design apparatus of claim 2, wherein The common branch comprises K+1 series inductors and K parallel capacitors, one end of each parallel capacitor is connected to the interconnection end of two series inductors, and the other end of each parallel capacitor is connected to the ground end.

7. The design apparatus of Claim 6, wherein The interconnection terminals of the N LC capacitive coupling filters and the common branch constitute a common pad; the common pad adopts a ring configuration.

8. The design apparatus of Claim 7, wherein The circuit design simulation comprises calculating the parasitic capacitance capacity value of the common pad, and reducing the capacity of each parallel capacitor in the common branch to offset the parasitic capacitance capacity of the common pad.

9. The design apparatus of claim 1, wherein The manual modification simulation comprises adjusting the capacity of the coupling capacitor through the input device.

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