Detection circuit, controller and electronic equipment

Abstract

The utility model discloses a detection circuit, a controller and electronic equipment. The detection circuit comprises a current detection circuit, a comparison circuit and a latch circuit. The current detection circuit is connected with the latch circuit through the comparison circuit. The current detection circuit monitors current information in the circuit in real time, amplifies the current information and sends the amplified current information to the comparison circuit, and the latch circuit latches output information of the comparison circuit. According to an exemplary embodiment, connection abnormality between plug connectors can be detected.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of motor control, and in particular to a detection circuit, a controller and an electronic device. BACKGROUND

[0002] The circuit board in the motor controller is often designed into several parts, connected through connectors and wiring harnesses. The connectors themselves prevent the wiring harnesses from falling off to cause poor connection through locking devices, and a layer of other metal such as tin, silver, gold, etc. is plated on the surface of the connector to ensure that the contact resistance of the connection is stable and meets the requirements.

[0003] In the related art, the reliability of the connection on the circuit board of the motor controller is ensured by the design of the connector itself, and there is no real-time detection of the state of the connector. If the contact impedance changes instantaneously during use, it is difficult to determine whether the circuit failure is caused by the connection problem of the connector.

[0004] It should be noted that the statements herein only provide background information related to the present application and do not necessarily constitute the prior art. CONTENT OF THE UTILITY MODEL

[0005] In view of the above problems, the present application proposes a detection circuit, a controller and an electronic device which overcome the above problems or at least partially solve the above problems.

[0006] The embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, the embodiments of the present application provide a detection circuit, which comprises a current detection circuit, a comparison circuit and a latch circuit, the current detection circuit being connected with the comparison circuit and the latch circuit; the current detection circuit monitors the current information in the circuit in real time, amplifies and processes the current information and sends it to the comparison circuit, and the latch circuit latches the output information of the comparison circuit; during detection, the controller injects a voltage to the connector, detects the current value of the connector on the mating connector through the current detection circuit to detect the resistance change between the connectors, and when the current value is less than a preset threshold, the output of the comparison circuit is set, the output is latched through the latch circuit, and the controller receives the output and performs abnormal processing.

[0008] Preferably, the current detection circuit comprises a current detection chip, a current detection resistor, a first current limiting resistor and a second current limiting resistor, the current detection resistor, the first current limiting resistor and the second current limiting resistor are connected in series in the input loop of the current detection circuit, and the current detection chip is connected with the mating connector in the circuit through the current detection resistor, the first current limiting resistor and the second current limiting resistor.

[0009] Preferably, the comparison circuit comprises a comparator, a first voltage regulating resistor, a second voltage regulating resistor and a pull-up resistor, the first voltage regulating resistor and the second voltage regulating resistor are connected in series and grounded, the pull-up resistor is connected in the output loop of the comparator, and the input end of the comparator is connected with the output end of the current detection chip.

[0010] Preferably, the latch circuit comprises a NAND gate, and the input end of the NAND gate is connected with the output end of the comparator.

[0011] Preferably, the detection circuit further comprises a connector and a mating connector, the connector and the mating connector are connected through a wire harness and then connected into the circuit, and the detection circuit further comprises a trigger circuit, the trigger circuit comprises a triode, and the output end of the triode is connected with the input end of the connector.

[0012] Preferably, the detection circuit further comprises a controller, the voltage injection end of the controller is connected with the input end of the triode, the fault detection port of the controller is connected with the first output end of the NAND gate, and the reset port of the controller is connected with the second output end of the NAND gate.

[0013] In the second aspect, the embodiments of the present application further provide a controller comprising the detection circuit according to any one of the first aspect.

[0014] In the third aspect, the embodiments of the present application further provide an electronic device comprising the controller according to the third aspect.

[0015] The above at least one technical scheme adopted by the embodiments of the present application can achieve the following beneficial effects:

[0016] The detection circuit comprising the current detection circuit, the comparison circuit and the latch circuit can monitor the impedance between the connectors in real time, latch information when the impedance value is abnormal, detect transient faults in the circuit, and thus check the occasional faults of the motor controller caused by the connectors in use, thereby improving the reliability of the motor controller.

[0017] The above description of the technical scheme of the present application is only a summary of the technical scheme of the present application, in order to more clearly understand the technical means of the present application, the specific embodiments of the present application can be implemented according to the content of the specification, and in order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the following specific embodiments of the present application are described. BRIEF DESCRIPTION OF DRAWINGS

[0018] Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments with reference made to the accompanying drawings. The drawings are for purposes of illustration only and are not intended to be limiting in

[0019] Figure 1 The schematic diagram of the detection circuit in the embodiment of the application is shown in Figure 1.

[0020] Figure 2 The circuit diagram of the detection circuit in the embodiment of the application is shown in Figure 2.

[0021] Figure 3 The schematic diagram of an electronic device in the embodiment of the application is shown in Figure 3.

[0022] In the application, 100 is a detection circuit, 110 is a current detection circuit, 120 is a comparison circuit, 130 is a latch circuit, 140 is a connector, 150 is a controller, 1101 is a current detection chip, 1102 is a current detection resistor, 1103 is a first current limiting resistor, 1104 is a second current limiting resistor, 1105 is a first filter capacitor, 1106 is a second filter capacitor, 1107 is a third filter capacitor, 1201 is a comparator, 1202 is a first voltage regulating resistor, 1203 is a second voltage regulating resistor, 1204 is a pull-up resistor, 1205 is a third filter capacitor, 1206 is a fourth filter capacitor, 1207 is a fifth filter capacitor, 1301 is a latch, 1401 is a connector, 1402 is a mating connector, 1501 is a processor, and 1502 is a triode. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solutions and advantages of the application clearer, the technical solutions of the application will be described clearly and completely below in combination with the specific embodiments of the application and corresponding drawings. Obviously, the described embodiments are only some of the embodiments of the application, but not all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the application.

[0024] In the related art, connector impedance detection is static or dynamic detection of the connector itself, i.e. detection when the connector is not installed or when the faulty connector is removed for separate detection. However, in actual application, the connector may produce occasional malfunctions during operation, which will recover in a short time. Therefore, when a fault occurs, the motor controller produces a related fault, but when troubleshooting, the fault has disappeared, at which time the static impedance of the connector is normal, and it is difficult to determine whether the connector is faulty, resulting in the inability to troubleshoot the real fault cause of the motor controller.

[0025] The concept of the present application is that, in view of the fact that there is no connector stability detection circuit in the prior art, a detection circuit with strong universality is designed, which monitors the real-time impedance of the connector and wire harness during the working phase of the controller, latches the occasional faults, so that the controller can identify the faults between the connectors and perform abnormal processing.

[0026] The technical solutions provided by the embodiments of the present application are described in detail below with reference to the drawings.

[0027] The embodiments of the present application provide a detection circuit, a controller and an electronic device, as shown in Figure 1 The detection circuit 100 provided by the embodiments of the present application is shown in the schematic diagram, which comprises a current detection circuit 110, a comparison circuit 120 and a latch circuit 130, the current detection circuit 110 is connected with the comparison circuit 120 and the latch circuit 130, the current detection circuit 110 monitors the current information in the circuit in real time, and sends the amplified and processed current information to the comparison circuit 120, and the latch circuit 130 latches the output information of the comparison circuit 120; during detection, the controller 150 injects voltage to the connector 140, detects the current value of the connector on the mating connector through the current detection circuit 110, to detect the resistance change between the connectors, when the current value is less than a preset threshold, the output of the comparison circuit 120 is set, the output is latched through the latch circuit 130, and the controller 150 receives the output and performs abnormal processing.

[0028] It can be understood that the detection circuit in the present disclosure can latch the fault information and send it to the controller at the moment of connector abnormality, the controller performs abnormal recording and alarm,

[0029] In some embodiments, the current detection circuit includes a current detection chip 1101, a current detection resistor 1102, a first current limiting resistor 1103, and a second current limiting resistor 1104, the current detection resistor 1102, the first current limiting resistor 1103, and the second current limiting resistor 1104 are connected in series in the input loop of the current detection circuit, and the current detection chip 1101 is connected to the docking connector 1402 in the circuit through the current detection resistor 1102, the first current limiting resistor 1103, and the second current limiting resistor 1104. The comparison circuit 120 includes a comparator 1201, a first voltage regulating resistor 1202, a second voltage regulating resistor 1203, and a pull-up resistor 1204, the first voltage regulating resistor 1202 and the second voltage regulating resistor 1203 are connected in series and grounded, the pull-up resistor 1204 is connected in the output loop of the comparator 1201, and the input end of the comparator 1201 is connected to the output end of the current detection chip 1101. The latch circuit 130 includes a latch 1301 composed of an NAND gate, and the input end of the latch 1301 is connected to the output end of the comparator 1201.

[0030] As shown in Figure 2 , the input loop of the current detection circuit includes a current detection resistor 1102, a first current limiting resistor 1103, and a second current limiting resistor 1104, which are connected in series in the input loop of the current detection circuit. The current detection circuit further includes a first filter capacitor 1105, a second filter capacitor 1106, and a third filter capacitor 1107. The first filter capacitor 1105 and the third filter capacitor 1107 are respectively connected to ground; the second filter capacitor is connected in series between the first filter capacitor 1105 and the third filter capacitor 1107. By adjusting the resistance values of the current detection resistor 1102, the first current limiting resistor 1103, and the second current limiting resistor 1104, the current size in the input current detection chip can be adjusted. Among them, the current detection chip can amplify the input current to a preset value.

[0031] Continuing to refer to Figure 2 , in the comparison circuit 120, the first voltage regulating resistor 1202 and the second voltage regulating resistor 1203 are used to adjust the voltage value of the comparator 1201, and the first voltage regulating resistor 1202 and the second voltage regulating resistor 1203 are connected in series with one end connected to a 5V voltage and the other end grounded. The input end of the comparator is provided with a third filter capacitor 1205, one end of which is connected to the output end of the current detection chip and the other end is grounded. The output of the comparator is respectively provided with a fourth filter capacitor 1206 and a fifth filter capacitor 1207, one end of the fourth filter capacitor 1206 is connected to the comparator, the other end is connected to a 5V voltage, and one end of the fifth filter capacitor 1207 is connected to the output of the comparator, the other end is grounded.

[0032] Continuing to refer to Figure 2The latch circuit 130 includes a latch 1301 composed of NAND gates, which are composed of two NAND gates whose outputs are connected to the inputs of the other, forming a cross feedback structure. The output of the latch 1301 is connected to the fault signal terminal of the processor in the controller, and the other output of the latch is connected to the reset signal terminal of the processor.

[0033] The detection circuit further includes a plug-in connector 1401 and a mating plug-in connector 1402, which are connected through a wire harness and then connected to the circuit. The plug-in connector 1401 and the mating plug-in connector 1402 are respectively arranged on the respective circuit boards.

[0034] It can be understood that the present disclosure provides a circuit for detecting the dynamic impedance of a plug-in connector in real time. A voltage is injected at one end of the plug-in connector, and the current value is detected on the mating plug-in connector through a series current detection circuit. The dynamic impedance of the plug-in connector is determined by the current value in the loop. The output of the current detection circuit is compared with the threshold value set in advance by the comparator. When the output of the current detection circuit is greater than the threshold value set by the comparator, it indicates that the dynamic impedance of the plug-in connector has increased significantly. The output of the comparator is set, and the signal is latched through the NAND latch circuit. The fault signal after latching is sent to the processor for related detection and processing.

[0035] In some embodiments, the detection circuit further includes a trigger circuit, which includes a transistor 1502, the output of which is connected to the input of the plug-in connector 1401. The detection circuit further includes a controller 150, which includes a processor 1501, the voltage injection end of the controller is connected to the input of the transistor 1502, the fault detection port of the controller is connected to the first output of the latch 1301, and the reset port of the controller is connected to the second output of the latch 1301.

[0036] It can be understood that by setting the trigger circuit in the detection circuit, the enablement and shutdown of the detection circuit can be controlled, enhancing the controllability of the circuit.

[0037] The present disclosure also provides a detection method applied to the detection circuit as described above. The detection method includes: a current detection circuit detects current information in the circuit in real time; when the current information is greater than a preset threshold value, a comparison circuit outputs first information, which is sent to a controller through a latch circuit. The first information is used to represent the resistance value between the plug-in connectors in the circuit; when the current information is less than the preset threshold value, the comparison circuit outputs second information, which is set and latched by the latch circuit; and the controller performs abnormal processing after receiving the second information.

[0038] Reference Figure 2The controller controls a triode 1502 to inject a voltage value to a pin of the connector 1401 on the circuit board. The injected voltage signal is connected to the counter connector 1402 on the other circuit board through the connector 1401 and the wire harness. The injected signal enters the negative electrode of the power supply through the current detection resistor 1102. The current detection chip amplifies the detected current and outputs a corresponding voltage value. The voltage value is connected to the positive input terminal of the comparator 1201 and compared with the threshold value of the negative input terminal. Normally, the contact resistance of the connector or the wire harness is small, the output voltage of the current detection chip is greater than the threshold voltage, the comparator 1201 outputs 5V, and the output of the comparator 1201 is also 5V after being latched by the NAND gate latch 1301. When a fault occurs, the contact resistance of the connector or the wire harness becomes large, the current in the loop decreases, the current flowing through the current detection resistor 1102 decreases, and the output voltage of the current detection chip 1101 also decreases. When the output voltage is less than the set threshold value, the output of the comparator 1201 changes from 5V to 0V. At this time, the output of the NAND gate latch 1301 also changes to 0V. Because of the NAND gate latch, even if the contact resistance becomes large only for a short time and then returns to normal, the 0V output of the latch 1301 will continue to exist, thereby avoiding the problem that the controller cannot detect the abnormal connection of the connector due to the short fault time.

[0039] The present disclosure also provides a controller comprising the detection circuit as described above. For other parts of the controller, please refer to the prior art, which will not be described here.

[0040] Figure 3 FIG. 1 is a structural schematic diagram of an electronic device according to an embodiment of the present application. Please refer to Figure 3 At the hardware level, the electronic device comprises a processor and optionally further comprises an internal bus, a network interface, and a memory. The memory can include a memory such as a high-speed random access memory (RAM) and can also include a non-volatile memory such as at least one disk memory. Of course, the electronic device can also include other hardware required by the business.

[0041] The processor, the network interface and the memory can be connected with each other through an internal bus, which can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the convenience of representation, Figure 3 Only one bidirectional arrow is used to represent the bus, but it does not mean that there is only one bus or only one type of bus.

[0042] The memory is used to store programs. Specifically, the program can include program code, and the program code includes computer operation instructions. The memory can include an internal memory and a non-volatile memory, and provides instructions and data for the processor.

[0043] The processor reads the corresponding computer program from the non-volatile memory into the internal memory and then runs. The processor executes the program stored in the memory, and is specifically used for executing the following operations:

[0044] The current detection circuit detects the current information in the circuit in real time; when the current information is greater than a preset threshold, the comparison circuit outputs first information, and the first information is sent to the controller through the latch circuit, wherein the first information is used to represent the resistance value between the plug-in connectors in the circuit; when the current information is less than the preset threshold, the comparison circuit outputs second information, and the latch circuit latches the second information; after the controller receives the second information, the controller performs abnormal processing.

[0045] The method for detecting as described above can be applied in a processor or implemented by the processor. The processor can be an integrated circuit chip with a signal processing capability. In the implementation process, each step of the method described above can be completed by an integrated logic circuit of hardware in the processor or by instructions in the form of software. The processor described above can be a general processor, including a central processing unit (CPU), a network processor (NP), etc.; or can be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. Each method, step and logic block diagram disclosed in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as a hardware code processor for execution, or a combination of hardware and software circuit in the code processor for execution. The software circuit can be located in a random memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium in the memory is read by the processor, and the hardware thereof is combined to complete the steps of the method described above.

[0046] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROMs, optical storage devices, etc.) containing computer-usable program code.

[0047] The present application is described with reference to the flowcharts and / or block diagrams according to the methods, devices (systems), and computer program products of the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to produce a machine, so that the instructions executed by the computer or other programmable data processing devices produce a device that implements the flowcharts and / or block diagrams. Figure 1one or more processes and / or blocks Figure 1 an apparatus with the functionality to achieve the specified function of a block or blocks.

[0048] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a Figure 1 one or more processes and / or blocks Figure 1 an apparatus with the functionality to achieve the specified function of a block or blocks.

[0049] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the Figure 1 one or more processes and / or blocks Figure 1 an apparatus with the functionality to achieve the specified function of a block or blocks.

[0050] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.

[0051] The memory can include non-persistent memory and / or volatile memory, such as random access memory (RAM) and / or cache memory. The memory can also include non-volatile memory, such as read-only memory (ROM), electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, or non-volatile random access memory (NVRAM). The memory is an example of computer readable media.

[0052] Computer readable media includes permanent and non-permanent, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program circuits, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile discs (DVDs) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information accessible to a computing device. According to the definition herein, computer readable media does not include transitory media, such as modulated data signals and carrier waves.

[0053] It is also to be noted that the terms "comprising", "including", and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises a... " does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.

[0054] Those skilled in the art will appreciate that embodiments of the present application can be devised for a method, a system, or a computer program product. Accordingly, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product on one or more computer readable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage devices, etc.) embodying computer readable program code thereon.

[0055] The embodiments of the present application described above are intended to be merely exemplary and those skilled in the art shall understand that modifications and variations can be made to the embodiments without departing from the spirit and scope of the application. Accordingly, the application is not limited to the above described embodiments.

Claims

1. A detection circuit, characterized by, The detection circuit comprises a current detection circuit, a comparison circuit and a latch circuit, the current detection circuit is connected with the comparison circuit and the latch circuit through the comparison circuit; The current detection circuit monitors current information in the circuit in real time, amplifies and processes the current information and sends the current information to the comparison circuit, and the latch circuit latches output information of the comparison circuit; During detection, the controller injects a voltage to the connector, detects a current value of the connector through the current detection circuit on the mating connector, so as to detect resistance change between the connectors, When the current value is less than a preset threshold value, the output of the comparison circuit is set, the output is latched through the latch circuit, and the controller performs abnormal processing after receiving the output.

2. The detection circuit of claim 1, wherein, The current detection circuit comprises a current detection chip, a current detection resistor, a first current limiting resistor and a second current limiting resistor, The current detection resistor, the first current limiting resistor and the second current limiting resistor are connected in series in an input loop of the current detection circuit, and the current detection chip is connected with the mating connector in the circuit through the current detection resistor, the first current limiting resistor and the second current limiting resistor.

3. The detection circuit of claim 1, wherein, The comparison circuit comprises a comparator, a first voltage regulating resistor, a second voltage regulating resistor and a pull-up resistor, the first voltage regulating resistor and the second voltage regulating resistor are connected in series and grounded, the pull-up resistor is connected in an output loop of the comparator, and an input end of the comparator is connected with an output end of the current detection chip.

4. The detection circuit of claim 1, wherein, The latch circuit comprises a latch composed of NAND gates, and an input end of the latch is connected with an output end of the comparator.

5. The detection circuit of any one of claims 1-4, wherein, The detection circuit further comprises a connector and a mating connector, and the connector and the mating connector are connected through a wire harness and then connected into the circuit.

6. The detection circuit of claim 5, wherein, The detection circuit further comprises a trigger circuit, and the trigger circuit comprises a triode, an output end of the triode is connected with an input end of the connector.

7. The detection circuit of claim 6, wherein, The detection circuit further comprises a controller, a voltage injection end of the controller is connected with an input end of the triode, a fault detection port of the controller is connected with a first output end of the latch, and a reset port of the controller is connected with a second output end of the latch.

8. A controller characterized by comprising: The detection circuit comprises the detection circuit according to any one of claims 1-7.

9. An electronic device, comprising: The controller comprises the controller according to claim 8.

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