Charging pile CP detection circuit

Abstract

The utility model discloses a charging pile CP detection circuit comprising a wiring terminal J1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1, a first diode D1, a second diode D2, first to eighth resistors R1-R8, a first operational amplifier U1A and a second operational amplifier U1B. CP signals are subjected to voltage division through an R1 and an R4, then voltage following is carried out through a U1A double-precision operational amplifier to eliminate strong current interference, negative voltage is filtered through a D1, PWM waves are converted into direct current to be output through an R3 circuit and a C2 circuit, voltage following is carried out through a U1B double-precision operational amplifier, voltage division is carried out through an R2 circuit and an R6, and AD sampling is carried out through an MCU; pWM waves can be filtered into direct-current level through R3 and C2 in the graph, and the single-chip microcomputer resources do not need to be introduced through high-frequency sampling; strong current interference can be filtered through a double-precision operational amplifier, high resistance input is adopted, a CP output circuit is not affected, high impedance influence is eliminated through an operational amplifier, the high anti-interference capability is achieved, and the circuit cannot be damaged.

Description

TECHNICAL FIELD

[0001] The utility model relates to new energy technology field especially, and it relates to a charging pile CP detection circuit. BACKGROUND

[0002] According to the national standard, whether the vehicle is plugged in or not and whether the voltage is allowed can be determined by real-time high-frequency sampling voltage.

[0003] The prior art has high-speed capability for the single-chip microcomputer, and the structure is relatively complex, the requirement for the single-chip microcomputer is also high, and the cost is also relatively high; the prior art needs software for determination, because the PWM wave has high and low points, high level needs to be sampled, and it is unsafe; the prior art has weak anti-interference capability, because the CP signal is in the same cable as the AC alternating current, and is easily interfered by strong electricity. UTILITY MODEL CONTENTS

[0004] The utility model aims at providing a charging pile CP detection circuit, which is used to solve the problems of the prior art, such as relatively complex structure, high requirement for the single-chip microcomputer, high cost, unsafe high level sampling, weak anti-interference capability, and strong electricity interference of the CP signal in the same cable as the AC alternating current.

[0005] The utility model provides a charging pile CP detection circuit, which comprises a wiring terminal J1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1, a first diode D1, a second diode D2, first to eighth resistors R1-R8, a first operational amplifier U1A and a second operational amplifier U1B.

[0006] One end of the third capacitor C3 is connected to the first wiring terminal of the wiring terminal J1, and the other end is connected to the second wiring terminal of the wiring terminal J1; one end of the seventh resistor R7 and the first inductor L1 is connected to the first wiring terminal of the wiring terminal J1, and the other end is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the CP signal output circuit.

[0007] One end of the second diode D2 is connected to one end of the eighth resistor R8, and the other end is connected to the ground; one end of the first resistor R1 is connected to one end of the eighth resistor R8, and the other end is connected to the positive input end of the first operational amplifier U1A and one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the ground; the negative input end and the output end of the first operational amplifier U1A are connected, and then connected to the input end of the first diode D1, and the output end of the first diode D1 is connected to the positive input end of the second operational amplifier U1B; one end of the fifth resistor R5 is connected to the positive input end of the second operational amplifier U1B, and the other end is connected to the ground; one end of the third resistor R3 is connected to the positive input end of the second operational amplifier U1B, and the other end is connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is connected to the ground; the negative input end and the output end of the second operational amplifier U1B are connected, and then connected to one end of the second resistor R2, and the other end of the second resistor R2 is connected to an external processor; one end of the sixth resistor R6 and the first capacitor C1 are connected in parallel, and the other end is connected to the other end of the second resistor R2, and the other end is connected to the ground.

[0008] The charging pile CP detection circuit has the following advantages:

[0009] A general single-chip microcomputer can be used;

[0010] The prior art needs software to determine, because the PWM wave has high and low points, the high level needs to be sampled, and the application of the design does not need too much software processing, but only needs to convert whether it is 12V, 9V or 6V, and the software processing is simple;

[0011] The prior art has weak anti-interference ability, because the CP signal is in the same cable as the AC alternating current, and is easily interfered by strong electricity, the design is filtered through the operational amplifier isolation and RC charging and discharging principle, and is not easily interfered by strong electricity, and the single-chip microcomputer will not be burned out;

[0012] Strong electric interference can be filtered out through a double-precision operational amplifier device, the CP output circuit is not affected, a high-resistance input is adopted, and then the high-impedance influence is eliminated through the operational amplifier, so that the anti-interference ability is strong, and the circuit will not be damaged. BRIEF DESCRIPTION OF DRAWINGS

[0013] The drawings are used to provide a further understanding of the utility model, and constitute a part of the specification, and are used together with the embodiments of the utility model to explain the utility model, and do not constitute a limitation on the utility model. In the drawings:

[0014] Figure 1 The circuit structure schematic diagram of the charging pile CP detection circuit in the utility model is shown. DETAILED DESCRIPTION

[0015] With reference to the accompanying drawings, the technical solutions in the embodiments of the present application will be described clearly and completely. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments.

[0016] As Figure 1 shown, Figure 1The utility model discloses a charging pile CP detection circuit, including wiring terminal J1, first electric capacity C1, second electric capacity C2, third electric capacity C3, first inductance L1, first diode D1, second diode D2, first eighth resistance R1~R8, first operational amplifier U1A and second operational amplifier U1B, one end of third electric capacity C3 is connected in first wiring terminal of wiring terminal J1, and the other end is all grounded with second wiring terminal of wiring terminal J1, one end of seventh resistance R7 and first inductance L1 is connected after parallel, and the other end is connected one end of eighth resistance R8, and the other end of eighth resistance R8 is connected CP signal output circuit, one end of second diode D2 is connected one end of eighth resistance R8, and the other end is grounded, one end of first resistance R1 is connected one end of eighth resistance R8, and the other end is connected positive input of first operational amplifier U1A and one end of fourth resistance R4, and the other end of fourth resistance R4 is grounded, and the negative input and output of first operational amplifier U1A are connected, and the input of first diode D1 is connected, and the output of first diode D1 is connected the positive input of second operational amplifier U1B, one end of fifth resistance R5 is connected the positive input of second operational amplifier U1B, and the other end is grounded, one end of third resistance R3 is connected the positive input of second operational amplifier U1B, and the other end is connected one end of second electric capacity C2, and the other end of second electric capacity C2 is grounded, and the negative input and output of second operational amplifier U1B are connected, and one end of second resistance R2 is connected, and the other end of second resistance R2 is connected external processor, one end of sixth resistance R6 and first electric capacity C1 is connected after parallel, and the other end is connected the other end of second resistance R2, and the other end is grounded.

[0017] The charging pile CP detection circuit provided by the utility model can use a general single-chip microcomputer; the prior art needs to determine by software, because the PWM wave has high and low points, needs to sample high level, and the design does not need too much software processing, only needs to convert into whether 12V, 9V, 6V, and the software processing is simple; the prior art has weak anti-interference ability, because the CP signal is in the same cable as the AC alternating current, is easily interfered by strong electricity, the design is filtered by the operational amplifier isolation and RC charge and discharge principle, is not easily interfered by strong electricity, and a single-chip microcomputer is not burned out; strong electric interference can be filtered by the double-precision operational amplifier device, the CP output circuit is not affected, high resistance input is adopted, high impedance influence is eliminated through the operational amplifier, the anti-interference ability is strong, and the circuit is not damaged.

[0018] The above is only a preferred specific implementation manner of the utility model, but the protection scope of the utility model is not limited to this, any person skilled in the art can make equivalent replacement or change according to the technical scheme and the utility model concept of the utility model within the technical range disclosed by the utility model, and all should be covered in the protection scope of the utility model.

Claims

1. A charging pile (CP) detection circuit, characterized in that, The terminal J1, the first capacitor C1, the second capacitor C2, the third capacitor C3, the first inductor L1, the first diode D1, the second diode D2, the first to eighth resistors R1-R8, the first operational amplifier U1A and the second operational amplifier U1B are included. One end of the third capacitor C3 is connected to the first terminal of the terminal J1, and the other end is grounded. One end of the seventh resistor R7 and the first inductor L1 is connected to the first terminal of the terminal J1, and the other end is connected to one end of the eighth resistor R8. The other end of the eighth resistor R8 is connected to the CP signal output circuit. One end of the second diode D2 is connected to one end of the eighth resistor R8, and the other end is grounded. One end of the first resistor R1 is connected to one end of the eighth resistor R8, and the other end is connected to the positive input terminal of the first operational amplifier U1A and one end of the fourth resistor R4. The other end of the fourth resistor R4 is grounded. The negative input terminal and the output terminal of the first operational amplifier U1A are connected, and then connected to the input terminal of the first diode D1. The output terminal of the first diode D1 is connected to the positive input terminal of the second operational amplifier U1B. One end of the fifth resistor R5 is connected to the positive input terminal of the second operational amplifier U1B, and the other end is grounded. One end of the third resistor R3 is connected to the positive input terminal of the second operational amplifier U1B, and the other end is connected to one end of the second capacitor C2. The other end of the second capacitor C2 is grounded. The negative input terminal and the output terminal of the second operational amplifier U1B are connected, and then connected to one end of the second resistor R2. The other end of the second resistor R2 is connected to an external processor. One end of the sixth resistor R6 and the first capacitor C1 are connected in parallel, and the other end is connected to the other end of the second resistor R2. The other end is grounded.

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