Overvoltage protection circuit, chip and electronic equipment

Abstract

The utility model discloses an overvoltage protection circuit, a chip and electronic equipment, the overvoltage protection circuit is connected between a configuration channel CC pin of a C-type universal serial bus TypeC interface of the electronic equipment and a CC pin of a power transmission PD main control chip of the electronic equipment, the TypeC interface is provided with a first CC pin, a second CC pin and a VBUS pin, and the first CC pin is connected with the second CC pin. The overvoltage protection circuit comprises a power supply module and a protection unit, the protection unit comprises a first NMOS tube and a second NMOS tube, the power supply module is used for outputting a first voltage to a PD main control chip, and the first NMOS tube is used for controlling connection / disconnection between a first CC pin and the PD main control chip; the second NMOS tube is used for controlling connection / disconnection between the second CC pin and the PD main control chip; according to the embodiment of the invention, the burning of the electronic equipment caused by the short circuit between the VBUS pin and the first CC pin and the second CC pin can be effectively prevented, the cost can be effectively reduced, and the circuit can be applied to an electronic product without a power supply function.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power supply, in particular to an overvoltage protection circuit. BACKGROUND

[0002] TypeC interface is the most popular interface on notebook computers at present, and most of the notebook computers on the market (2024) have this TypeC interface, and a large number of smart phones with a price of more than 800 yuan also use TypeC interface. The power pin of TypeC interface is designed to support a voltage of 2.7V~20V from the beginning of the standard development of TypeC interface, and can support up to 48V in later versions. In TypeC interface, there are 24 pins in total, divided into A face and B face, each face has 12 pins, the 12 pins of A face are A1~A12, and the 12 pins of B face are B1~B12. Type-C port is too powerful, integrating charging, USB data, audio, and video functions, and is often plugged in and out during normal use. Smartphones, tablets, and notebook computers as mobile devices are often carried around and placed in backpacks and pockets, and some foreign matter, sweat, and bathroom water droplets may enter the TypeC interface, causing the A4 and A4 VBUS pins to leak electricity to the adjacent A5 and B5 CC pins. Once the leakage current between the VBUS pin and the CC pin reaches mA level, it is likely to damage the chip connected to the CC pin, causing the device to be damaged.

[0003] However, in order to solve the above problems, the market currently mainly uses TPD8S300 chips to protect the CC and Aux of Type-C from overvoltage, but the above method is relatively high in cost. Therefore, in some low-cost products with Type-C interface, such as docking stations, low-end mobile phones, toys, etc., the above solution is obviously too high in cost, so many Type-C products do not have overvoltage protection function for the CC pin, and once there is a leakage between the VBUS pin and the CC pin, the device may be damaged. Moreover, many products do not have a power supply, so the charger cannot charge the corresponding product through the PD protocol. Invention content

[0004] In order to solve the technical defects in the background art, the present application provides an overvoltage protection circuit, a chip and an electronic device, which can effectively prevent the short circuit between the VBUS pin and the first CC pin and the second CC pin from causing the electronic device to be burned out, and can effectively reduce the cost and be applied to electronic products without power supply function.

[0005] The utility model discloses the following technical scheme is adopted:

[0006] First, the application provides a kind of overvoltage protection circuit, and the overvoltage protection circuit is connected between the configuration channel CC pin of the C type universal serial bus TypeC interface of electronic equipment and the CC pin of the power transmission PD master chip of electronic equipment;Wherein, the TypeC interface has first CC pin, second CC pin and VBUS pin;

[0007] The overvoltage protection circuit includes power module and protection unit, and the protection unit includes first NMOS tube and second NMOS tube, the power module is used to output first voltage to the PD master chip, and the first NMOS tube is used to control the on / off between first CC pin and the PD master chip;Second NMOS tube is used to control the on / off between second CC pin and the PD master chip;

[0008] The input end of the power module is connected with the VBUS pin, and the first output end of the power module is electrically connected with the PD master chip;The gate of the first NMOS tube is connected with the first output end of power module, the source is electrically connected with first CC pin, and the drain is electrically connected with the PD master chip;The gate of the second NMOS tube is connected with the first output end of power module, the source is electrically connected with second CC pin, and the drain is electrically connected with the PD master chip.

[0009] Further, the overvoltage protection circuit further includes analog load module, and the analog load module is used to when PD master chip has no power supply, let external charger detect that power supply is needed, so that the power module outputs second voltage to the PD master chip through the first output end;

[0010] The input end of the analog load module is connected with the first CC pin and the second CC pin respectively, and the output end is grounded.

[0011] Further, the analog load module includes first diode, second diode and load unit, and the load unit is used to when PD master chip has no power supply, external charger outputs load detection signal to the load unit through first CC pin and second CC pin, so that the power module outputs second voltage to the PD master chip;

[0012] The anode of the first diode is electrically connected with second CC pin, and the cathode of the first diode is connected with the input end of the load unit, the anode of the second diode is electrically connected with first CC pin, and the cathode of the second diode is connected with the input end of the load unit.

[0013] Further, the load unit comprises a first resistor and a second resistor, input ends of the first resistor are connected with cathodes of the first diode and the second diode respectively, and an input end of the second resistor is electrically connected with an output end of the first resistor, and an output end is grounded.

[0014] Further, when the PD master chip is not powered, a voltage across the second resistor is less than a voltage across the first resistor.

[0015] Further, the first resistor and the second resistor are connected in series, and a first output end of the power module outputs a second voltage between the first resistor and the second resistor.

[0016] Alternatively, a second output end of the power module outputs a third voltage between the first resistor and the second resistor.

[0017] Further, when an external charger outputs the second voltage to the PD master chip, the second voltage and the third voltage have equal voltage values, so as to cut off a current between the first CC pin and the second CC pin and the analog load module.

[0018] Further, the power module comprises a first voltage reduction unit and a second voltage reduction unit, the first voltage reduction unit is used for outputting the second voltage, the second voltage reduction unit is used for outputting the third voltage, an input end of the first voltage reduction unit is connected with the VBUS pin and the external charger, the first output end of the first voltage reduction unit is electrically connected with the PD master chip, an input end of the second voltage reduction unit, a gate of the first NMOS tube and a gate of the second NMOS tube, and the second input end of the second voltage reduction unit is connected between the first resistor and the second resistor.

[0019] In a second aspect, an overvoltage protection chip is provided, comprising a circuit board and the overvoltage protection circuit.

[0020] In a third aspect, an overvoltage protection electronic device is provided, comprising a TypeC interface, an overvoltage protection circuit and a PD master chip, the overvoltage protection circuit is arranged between the TypeC interface and the PD master chip, and the overvoltage protection circuit is the overvoltage protection circuit.

[0021] In summary, the overvoltage protection circuit has the following beneficial effects:

[0022] 1、By setting the first NMOS tube and the second NMOS tube, the on / off between the first CC pin and the PD master control chip and the on / off between the second CC pin and the PD master control chip can be controlled, so that when the first CC pin and the second CC pin are short-circuited with the VBUS pin, the high voltage of the VBUS can be prevented from burning the PD master control chip and the subsequent circuit, thereby causing a safety accident, and by selecting the first NMOS tube and the second NMOS tube, the production cost of the utility model can be reduced because the cost of the NMOS tube is low.

[0023] 2、At the same time, by setting the analog load module, when the PD chip is not powered, the analog load module can charge a load Rd resistor, so that the protocol of the external charger can be adapted, the PD master control chip can be powered, and the electronic equipment can be powered. Further, the analog load module is set to be able to pull up different gears for the external charger, thereby improving the adaptability of the utility model. BRIEF DESCRIPTION OF DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0025] Figure 1 is a structure diagram of an overvoltage protection circuit provided by an embodiment of the utility model;

[0026] Figure 2 is a structure diagram of another overvoltage protection circuit provided by an embodiment of the utility model;

[0027] Figure 3 is a partial principle diagram of a power module of another overvoltage protection circuit provided by an embodiment of the utility model;

[0028] Figure 4 is a partial principle diagram of a power module of another overvoltage protection circuit provided by an embodiment of the utility model;

[0029] Figure 5 is a structure diagram of a TypeC interface provided by the utility model.

[0030] REFERENCE SIGNS:

[0031] 100, TypeC interface;

[0032] 200, power module; 210, first step-down unit; 220, first step-down unit; 221, first filter unit; 222, second filter unit;

[0033] 300, analog load module; 310, load unit; Rd1, first resistor; Rd2, second resistor;

[0034] 400, external charger;

[0035] 500, PD master chip;

[0036] 600, protection unit. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical scheme and advantages of the present application more clear, the present application is further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application and do not limit the present application.

[0038] Reference Figure 5 Since the standard of Type-C interface is designed to support a voltage of 2.7V~20V from the beginning of its standardization, and can support up to 48V in later versions.

[0039] There are 24 pins in the Type-C interface, divided into A face and B face, each face has 12 pins, so the pin order is:

[0040] The 12 pins of the A face are A1~A12;

[0041] The 12 pins of the B face are B1~B12.

[0042] A4, A9, B4, B9 are VBUS power pins, and the voltage of the VBUS power pin is up to 20V in PD2.0 of Type-C, and can support 48V in the specification of PD3.1 version

[0043] A5, B5 are communication pins, full name is Configuration Channel, abbreviated as CC, A5 is defined as CC1, and B5 is defined as CC2. These two pins are essential in any application of Type-C, and all applications and configurations of voltage, current, USB3.2 data stream, DP Alt mode video stream are completed through them. The highest voltage supported by these two pins is generally only 5.5V~6V.

[0044] And in TypeC interface, the center distance between pin and pin is 0.5mm, and the width of pin itself is 0.25mm, so the insulation distance between pin and pin is only 0.25mm.

[0045] Due to the frequent interface plugging action, the metal particles generated by the friction of the metal of pin caused by plugging may also cause the insulation between VBUS pin and CC pin to decrease.

[0046] Or, due to the frequent interface plugging action, sometimes some transverse stress is generated due to the angle not being well adjusted, and the stress will increase the interface gap and the shell and pin of the interface will be deformed, and when the insertion angle is not good, the VBUS pin and the CC pin have the risk of short circuit.

[0047] The above reasons make the two VBUS pins A4 and B4 respectively generate a risk of electric leakage with the two CC pins A5 and B5 adjacent to them, and once the electric leakage exists between the VBUS pin and the CC pin and the current reaches the mA level, it is very likely to cause the chip connected with the CC pin to be broken down, thereby causing the device to be damaged.

[0048] As shown in Figure 1 and Figure 2 , the embodiment of the present application provides an overvoltage protection circuit, which is connected between the configuration channel CC pin of a TypeC universal serial bus (USB) interface 100 of an electronic device and a CC pin of a power delivery (PD) master chip 500 of the electronic device; wherein the TypeC interface 100 has a first CC pin CC1, a second CC pin CC2 and a VBUS pin; the overvoltage protection circuit comprises a power supply module 200 and a protection unit 600, the protection unit 600 comprises a first NMOS transistor Q1 and a second NMOS transistor Q2, the power supply module 200 is used to output a first voltage to the PD master chip 500, the first NMOS transistor Q1 is used to control the on / off between the first CC pin CC1 and the PD master chip 500; the second NMOS transistor Q2 is used to control the on / off between the second CC pin CC2 and the PD master chip 500; the input end of the power supply module 200 is connected with the VBUS pin, and the output end is electrically connected with the PD master chip 500; the gate of the first NMOS transistor Q1 is connected with the output end of the power supply module 200, the source is electrically connected with the first CC pin CC1, and the drain is electrically connected with the PD master chip 500; the gate of the second NMOS transistor Q2 is connected with the output end of the power supply module 200, the source is electrically connected with the second CC pin CC2, and the drain is electrically connected with the PD master chip 500.

[0049] Specifically, the first voltage refers to when the product has electricity, the power module provides voltage to the chip.

[0050] In the embodiment of the present application, the overvoltage protection circuit is connected between the configuration channel CC pin of the TypeC interface 100 of the electronic device and the CC pin of the power delivery PD master chip 500 of the electronic device. The TypeC interface 100 includes two configuration channel CC pins and a VBUS pin, the VBUS pin is used for transmitting power, and the CC pin is used for configuration and communication between devices, especially for determining the power transmission direction and negotiating the voltage. The core components of the overvoltage protection circuit include a power module 200, a first NMOS tube Q1, and a second NMOS tube Q2. The function of the power module 200 is to provide a stable power supply voltage for the PD master chip 500, and provide the first voltage to the PD master chip 500 through the output end of the power module 200. The input end of the power module 200 is connected with the VBUS pin to obtain the input voltage from the VBUS pin, so as to ensure that the circuit can obtain the necessary power input when working normally. The first NMOS tube Q1 and the second NMOS tube Q2 are respectively used to control the on / off of the first CC pin CC1 and the second CC pin CC2 and the PD master chip 500. Specifically, the gate of the first NMOS tube Q1 is connected with the output end of the power module 200, and the change of the gate voltage determines the on / off of the NMOS tube; the source of the first NMOS tube Q1 is connected to the first CC pin CC1, and the drain is connected to the CC pin of the PD master chip 500. The gate of the second NMOS tube Q2 is also connected with the output end of the power module 200, the source is connected to the second CC pin CC2, and the drain is connected to the CC pin of the PD master chip 500. Through this design, the power module 200 can control the on / off state of the first NMOS tube Q1 and the second NMOS tube Q2 by adjusting the gate voltage, thereby effectively controlling the current flow between the PD master chip 500 and the TypeC interface 100.

[0051] Specifically, the source (S terminal) of the first NMOS tube Q1 is connected to the CC pin of the chip, the drain (D terminal) is connected to the first CC pin CC1 of the Type C interface 100, and the gate (G terminal) is connected to the V4 voltage network. The voltage range of the first voltage output by the power supply circuit is set to be between 2.5V and 7V, and such a design allows the first voltage to control the on-off state of the first NMOS tube Q1 through the gate. When leakage or short circuit occurs between the VBUS pin and the first CC pin CC1 and / or the second CC pin CC2 of the Type C interface 100, the drain voltage of the NMOS is lifted. Since the gate voltage is at most 7V, this voltage limits the working state of the NMOS tube, ensuring that the source voltage does not exceed 6V, thereby effectively protecting the chip from excessive voltage and protecting the electronic device using the overvoltage protection circuit from damage.

[0052] By setting the first NMOS tube Q1 and the second NMOS tube Q2, the traditional use of expensive chips for overvoltage protection can be replaced, thereby reducing manufacturing costs.

[0053] Optionally, as shown in Figure 2 The overvoltage protection circuit further includes an analog load module 300, which is configured to enable an external charger 400 to detect that power supply is needed when a PD master control chip 500 has no power supply, so that the power supply module 200 outputs a second voltage to the PD master control chip 500; and the input end of the analog load module 300 is connected to the first CC pin and the second CC pin CC2, and the output end is grounded.

[0054] Specifically, the second voltage refers to the voltage provided by the power supply module to the chip when the product is not powered, or the cut-off voltage V4 provided by the power supply module to the load module.

[0055] In the embodiment of the present application, when the electronic device has no built-in battery, the external charger 400 directly supplies power to the electronic device, and the overvoltage protection circuit further enhances the protection and control capability of the electronic device without power supply by adding the analog load module 300, ensuring that the external charger 400 can correctly identify and provide power. The main function of the analog load module 300 is to simulate a load behavior when the PD master control chip 500 has no power supply, so that the external charger 400 detects that the device needs power supply, thereby starting the power supply module 200 to output the second voltage to the PD master control chip 500. The design of the analog load module 300 provides a current guide path for the embodiment when there is no power supply, and effectively deceives the external charger 400 to identify and start power supply.

[0056] Specifically, the input end of the analog load module 300 is connected with the first and second CC pins CC2 respectively, and the output end is grounded. When the TypeC interface 100 provides power through the VBUS, the CC pin of the PD master chip 500 needs to negotiate with the external charger 400 through the protocol and communication. The analog load module 300 makes the external charger 400 think that the target electronic device needs power supply through the behavior of the analog load, and perceives this demand through the first CC pin CC1 and the second CC pin CC2, so as to trigger the power module 200 to work. At this time, the power module 200 can start to output the second voltage to the PD master chip 500 according to the response of the external charger 400, so as to ensure that the chip obtains the necessary power supply and starts the normal operation of the device. Through the analog load module 300, the circuit can simulate the load current when there is no power supply, and induce the external charger 400 to supply power, which is crucial to improve the reliability and adaptive ability of the embodiment. The design effectively solves the problem of starting the device without power supply, and avoids the failure of starting the embodiment due to the failure to provide power. At the same time, the connection of the analog load module 300 with the first CC pin CC1 and the second CC pin CC2 ensures that when the voltage change is detected, the necessary power support can be provided to the PD master chip 500 in time. In this way, the embodiment can ensure that the device can obtain reliable power support under different power supply conditions, further improving the user experience and safety of the product.

[0057] Further, referring to Figure 2 The analog load module 300 includes a first diode D2, a second diode D1, and a load unit 310, which is used to output the load detection signal to the load unit 310 through the first CC pin CC1 and the second CC pin CC2 when the PD master chip 500 has no power supply, so that the power module 200 outputs the second voltage to the PD master chip 500; the anode of the first diode D2 is electrically connected with the second CC pin CC2, the cathode of the first diode D2 is connected with the input end of the load unit 310, the anode of the second diode D1 is electrically connected with the first CC pin CC1, and the cathode of the second diode D1 is connected with the input end of the load unit 310.

[0058] In the embodiment of the present application, the anode of the first diode D2 is connected with the second CC pin CC2, and the cathode is connected with the input end of the load unit 310; the anode of the second diode D1 is connected with the first CC pin CC1, and the cathode is connected with the input end of the load unit 310. When the PD master chip 500 has no power supply, the external charger 400 outputs the load detection signal to the load unit 310 through the first CC pin CC1 and the second CC pin CC2. The combination of the first diode D2, the second diode D1 and the load unit 310 simulates a load behavior, so that the external charger 400 detects that the device needs power supply and starts the corresponding power output. The role of the load unit 310 is that when the external charger 400 sends the load detection signal through the first CC pin CC1 and the second CC pin CC2, it processes according to the input load detection signal and feeds back to the power module 200, prompting the power module 200 to output the second voltage to the PD master chip 500. The voltage enables the PD master chip 500 to obtain the necessary power support, so as to work normally and start the device.

[0059] It should be noted that the role of the first diode D2 and the second diode D1 in the overvoltage protection circuit is to ensure that the voltage of the CC pin meets the Type C specification requirement in the power supply negotiation process between the external charger 400 and the device. The anodes of the first diode D2 and the second diode D1 are respectively connected to the second CC pin CC2 and the first CC pin CC1 of the Type C interface 100, and the cathodes are respectively connected to the input end of the load unit 310. Through this design, the first diode D2 and the second diode D1 act as signal transmission elements to help adjust and transmit the load detection signal between the external charger 400 and the device, so that the power module 200 can correctly identify and start the power supply. In particular, by selecting a low-voltage drop diode, it can be ensured that when the external charger 400 is in different Rp gears (different input current units, such as the pull-up of the Default, 1.5A and 3A of the external charger 400), the voltage of the CC pin will not deviate from the voltage range specified in the Type-C specification due to the forward voltage drop of the diode, thereby ensuring the correctness of the normal power supply negotiation and communication between the electronic device and the charger. At the same time, the low-voltage drop characteristic reduces voltage loss and avoids power failure or improper negotiation due to voltage deviation, thereby improving the working stability and reliability of the power module 200 and the PD master chip 500.

[0060] Optionally, referring to Figure 2As shown, the load unit 310 includes a first resistor Rd1 and a second resistor Rd2, the input end of the first resistor Rd1 is connected with the cathode of the first diode D2 and the second diode D1 respectively, and the input end of the second resistor Rd2 is electrically connected with the output end of the first resistor Rd1, and the output end is grounded.

[0061] In the embodiment of the present application, the first resistor Rd1 and the second resistor Rd2 are in series. By setting the first resistor Rd1 and the second resistor Rd2, the load unit 310 can simulate appropriate load behavior under different current levels (such as Default, 1.5A, 3A) to ensure that the voltage of the first CC pin CC1 and the second CC pin CC2 meets the requirements of the Type C protocol when the charger outputs power to the PD master chip 500, and the voltage change on the first CC pin CC1 and the second CC pin CC2 is minimal when switching to the Rd resistor inside the PD master chip 500 (analog resistor implemented inside the PD master chip 500). Specifically, the first resistor Rd1 and the second resistor Rd2 create an analog load circuit by connecting with the first diode D2 and the second diode D1, simulating a current path that simulates a voltage drop similar to an actual load. When the external charger 400 provides pull-up current through the first CC pin CC1 and the second CC pin CC2 of the Type C interface 100, the first resistor Rd1 and the second resistor Rd2 of the load unit 310 control the voltage change of the first CC pin CC1 and the second CC pin CC2 through appropriate current distribution and voltage regulation, so that the voltage change under different current levels is kept within a small range. In particular, when the current level is switched between Default, 1.5A, and 3A, the first resistor Rd1 and the second resistor Rd2 setting can ensure that the voltage difference does not exceed 25%, so that the voltage on the first CC pin CC1 and the second CC pin CC2 remains within a close range when switching to the Rd resistor inside the chip, ensuring that the power negotiation between the device and the charger does not have a large voltage deviation, improving the stability and compatibility of charging.

[0062] When the Sink is connected to the Source, the CC pin will display the following typical voltage values according to the current capacity level of the Source:

[0063] Default level (default USB power supply): CC voltage is about 0.4V.

[0064] 1.5A level: CC voltage is about 0.9V.

[0065] 3A level: CC voltage is about 1.7V.

[0066] These voltage values are determined by the pull-up mode on the CC and the pull-down resistance (Rd) value of the Sink end.

[0067] The standard value of Rd is 5.1kΩ, and the allowable deviation is ±20%, which is Rd1+Rd2 in the utility model.

[0068] In product design, the Rd of the Sink end will form a voltage divider with the Rp (resistance pull-up or constant current source) of the Source, ultimately affecting the voltage of the CC pin.

[0069] It should be noted that actual products need to adapt to different Sources, and different Sources may support different current levels (Default, 1.5A, 3A). Therefore, the circuit design of the Sink end needs to consider the full range of CC voltage values, from about 0.4V to 1.7V, to ensure compatibility with all Sources. At this time, the third voltage is set to 1.2V, which can meet the problem of different current levels caused by different Sources.

[0070] Optionally, as shown in Figure 2 When the PD master chip 500 has no power supply, the voltage across the second resistor Rd2 is less than the voltage across the first resistor Rd1.

[0071] In the embodiment of the application, when the PD master chip 500 has no power supply, that is, when the electronic device has no battery to supply power to it, the first CC pin CC1 and the second CC pin CC2 output the load detection current from the first diode D2 and the second diode D1 to the first resistor Rd1 and the second resistor Rd2. Since the resistors are connected in series, they can act as voltage dividers, so the voltage across the second resistor Rd2 is less than the voltage across the first resistor Rd1. Due to the forward conduction of the first diode D2 and the second diode D1, the current can conduct the first diode D2 and the second diode D1. Therefore, the current of the external charger 400 flows through the VBUS pin to the first resistor Rd1 and the second resistor Rd2, conducts its charging protocol, and then charges the PD chip.

[0072] Optionally, as shown in Figure 2 The first resistor Rd1 and the second resistor Rd2 are connected in series, and the first output end of the power module outputs a second voltage between the first resistor and the second resistor;

[0073] Alternatively, the second output end of the power module outputs a third voltage between the first resistor and the second resistor.

[0074] Further, the power module 200 comprises a first voltage reduction unit 210 and a second voltage reduction unit 220, the first voltage reduction unit 210 is configured to output a second voltage, the second voltage reduction unit 220 is configured to output a third voltage, an input end of the first voltage reduction unit 210 is connected with the VBUS pin and an external charger, the first output end of the first voltage reduction unit 210 is electrically connected with the PD master chip, an input end of the second voltage reduction unit 220, a gate of the first NMOS tube and a gate of the second NMOS tube, the second input end of the second voltage reduction unit 220 is connected between the first resistor and the second resistor.

[0075] Specifically, the third voltage refers to the voltage after being processed by the second voltage reduction unit 220.

[0076] Further, when the external charger 400 outputs the second voltage to the PD master chip 500, the voltage values of the second voltage and the third voltage are equal, so as to cut off the current between the first CC pin CC1 and the second CC pin CC2 and the load module.

[0077] In the embodiment of the present application, the first resistor Rd1 and the second resistor Rd2 are connected in series, and the power module 200 additionally outputs the third voltage between the first resistor Rd1 and the second resistor Rd2. When the PD master chip 500 is not powered, that is, when the electronic device does not have a built-in battery, the voltage value of the second voltage output by the power module 200 to the PD master chip 500 is equal to the voltage value of the third voltage output by the power module 200 to the first resistor Rd1 and the second resistor Rd2. Since the first diode D2 and the second diode D1 are forward conducting, the current value of the current through the first resistor Rd1 is close to 0, so as to cut off the current between the first CC pin CC1 and the second CC pin CC2 and the load module, thereby preventing the current from flowing through the first resistor Rd1, the first diode D2 and the second diode D1 after the power module 200 provides the voltage to the PD master chip 500, and further avoiding the consumption of electric energy.

[0078] In some embodiments, with reference to Figure 3The first voltage reduction unit 210 includes a power management chip U4, a third resistor R19, a fourth resistor R20, a fifth resistor R21, a sixth resistor RP3, a first capacitor C18, a second capacitor C20, a third capacitor C25, a fourth capacitor C26, a fifth capacitor C27, a sixth capacitor C19, a seventh capacitor C21, an eighth capacitor Cf3, a ninth capacitor C22, a tenth capacitor C23, an eleventh capacitor C24, and an inductor L3. One end of the third resistor R19 is connected to one end of the third capacitor C25, one end of the fourth capacitor C26, one end of the fifth capacitor C27, a feedback end Vn of the power management chip U4, and an external charger 400. The other end of the third resistor R19 is connected to one end of the second capacitor C20 and an enable end EN of the power management chip U4. The other end of the second capacitor C20 is connected to one end of the first capacitor C18, an analog ground end AGND of the power management chip U4, and a ground end DGND. The other end of the first capacitor C18 is connected to a soft start end SS of the power management chip U4. An output end F8 of the power management chip U4 is connected to one end of the fourth resistor R20. A 5V output end of the power management chip U4 is connected to one end of the sixth capacitor C19. The other end of the sixth capacitor C19 is connected to ground. The other end of the fourth resistor R20 is connected to one end of the fifth resistor R21, one end of the sixth resistor RP3, and one end of the eighth capacitor Cf3. The other end of the sixth resistor RP3 is connected to the other end of the eighth capacitor Cf3, one end of the ninth capacitor C22, one end of the tenth capacitor C23, one end of the eleventh capacitor C24, one end of the inductor L3, a 5V control end (V4), and a 5V voltage output end. A bootstrap voltage end BS of the power management chip U4 is connected to one end of the seventh capacitor C21. The other end of the seventh capacitor C21 is connected to an inductor node pin LX and the other end of the inductor L3. The other end of the third capacitor C25, the other end of the fourth capacitor C26, the other end of the fifth capacitor C27, a ground end GND of the power management chip U4, the other end of the fifth resistor R21, the other end of the ninth capacitor C22, the other end of the tenth capacitor C23, and the other end of the eleventh capacitor C24 are respectively connected to the ground end DGND.

[0079] Specifically, the 5V control end (V4) in the above corresponds to the first output end.

[0080] In the embodiment of the present application, the power management chip U4 controls the enablement and disablement of the whole module through the EN pin, the soft start end SS is connected with the first capacitor C18 to adjust the current rising rate in the starting process and avoid instantaneous current impact, the analog ground end AGND of the power management chip U4 and the second capacitor C20, the third resistor R19 and other peripheral elements jointly stabilize the work of the chip, the feedback end Vn is used to obtain the feedback signal of the output voltage, the third resistor R19 is connected with the third capacitor C25, the fourth capacitor C26 and the fifth capacitor C27 to ensure the stability of the power output voltage, the fourth resistor R20 cooperates with the fifth resistor R21 and RP3 to adjust the precision of the output voltage, and the sixth capacitor C19 is used for filtering to reduce noise, the bootstrap voltage end BS is connected with the seventh capacitor C21 to form a high-side switch driving voltage, the inductor L3 and the inductor node LX interactively provide stable energy conversion at the output end, and the external charger 400 provides charging power for the module, and the sixth resistor RP3 and the like are used to control the stability of the power input.

[0081] In some embodiments, with reference to Figure 4 , the second voltage reduction unit 220 includes a first filter unit 221, a voltage reduction chip U1, an inductor L1 and a second filter unit 222, the filter unit is used to filter the voltage output by the external charger 400, the voltage reduction chip U1 is used to reduce the voltage output by the external charger 400 to supply power to the PD master chip 500 and the analog load module 300, and the inductor L1 is used to smoothly output the voltage output by the voltage reduction chip U1; the first end of the first filter unit 221 is electrically connected with the second output end, and the other end is grounded; the 4th pin and the 1st pin of the voltage reduction chip U1 are electrically connected with the first end of the first filter unit 221, the 3rd pin of the voltage reduction chip U1 is electrically connected with the input end of the inductor L1, and the 5th pin of the voltage reduction chip U1 is electrically connected with the second filter unit 222.

[0082] In the embodiment of the present application, the first end of the first filter unit 221 is connected to the external charger 400, and high-frequency noise and fluctuations in the external power supply are filtered out through the first filter unit 221 to ensure that the input voltage is stable and meets the requirements of the subsequent circuit. The other end of the first filter unit 221 is grounded, forming a stable power input path. Then, the 4th pin and the 1st pin of the voltage reduction chip U1 are respectively connected to the first end of the first filter unit 221, ensuring that the voltage provided by the external charger 400 is sent to the voltage reduction chip U1 for further processing after being filtered. The voltage reduction chip U1 is responsible for converting the voltage of the external charger 400 into a lower and more stable voltage through voltage reduction, adapting to the power supply requirements of the PD master control chip 500 and the analog load module 300. The 3rd pin of the voltage reduction chip U1 is connected to the input end of the inductor L1, which is used to smooth the voltage output by the voltage reduction chip U1, reducing voltage fluctuations and interference, thereby ensuring that a smooth power output is provided to the subsequent circuit. The 5th pin of the voltage reduction chip U1 is connected to the second filter unit 222, which is used to further stabilize the voltage, ensure the quality and stability of the output voltage, and provide the PD master control chip 500 and the load module with a 1.2v control voltage after passing through the second filter unit 222. Through this design, the power module 200 can effectively convert 5-48v voltage into stable voltages (5V and 1.2V) suitable for the device, ensuring that the PD master control chip 500 and the analog load module 300 obtain the required power, avoiding the influence of voltage fluctuations and interference on the embodiment, and improving the reliability and stability of the overall circuit.

[0083] Specifically, the 1.2v control voltage output after passing through the second filter unit 222 corresponds to the second output end (V5).

[0084] The second aspect of the embodiment also provides an overvoltage protection chip, which includes a circuit board and the overvoltage protection circuit described above, and the overvoltage protection circuit is arranged on the circuit board.

[0085] From the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional modules is exemplified, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0086] The third aspect of the embodiment also provides an overvoltage protection electronic device, which includes a TypeC interface, an overvoltage protection circuit, and a PD master control chip, the overvoltage protection circuit is arranged between the TypeC interface and the PD master control chip, and the overvoltage protection circuit is the overvoltage protection circuit mentioned above.

[0087] The same or similar reference numerals in the drawings of the embodiments correspond to the same or similar components; in the description of the present application, it is understood that if the orientations or positional relationships indicated by the terms "upper", "lower", "left", "right" and the like are based on the orientations or positional relationships shown in the drawings, they are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, therefore the terms describing the positional relationships in the drawings are only used for exemplary illustration, and cannot be understood as a limitation on the present patent, for those skilled in the art, the specific meanings of the above terms can be understood according to the specific circumstances.

[0088] The above only describes the preferred embodiments of the present application and is not intended to limit the present application, any modifications, equivalent replacements and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. An overvoltage protection circuit, characterized in that, The overvoltage protection circuit is connected between the configuration channel CC pin of the Type-C interface of the electronic device and the CC pin of the power transmission PD main control chip of the electronic device; wherein, the Type-C interface has a first CC pin, a second CC pin, and a VBUS pin; The overvoltage protection circuit includes a power supply module and a protection unit. The protection unit includes a first NMOS transistor and a second NMOS transistor. The power supply module is used to output a first voltage to the PD main control chip. The first NMOS transistor is used to control the connection / disconnection between the first CC pin and the PD main control chip. The second NMOS transistor is used to control the connection / disconnection between the second CC pin and the PD main control chip. The input terminal of the power module is connected to the VBUS pin, and the first output terminal of the power module is electrically connected to the PD main control chip; the gate of the first NMOS transistor is connected to the first output terminal of the power module, the source is electrically connected to the first CC pin, and the drain is electrically connected to the PD main control chip; the gate of the second NMOS transistor is connected to the first output terminal of the power module, the source is electrically connected to the second CC pin, and the drain is electrically connected to the PD main control chip.

2. The overvoltage protection circuit as described in claim 1, characterized in that, The overvoltage protection circuit also includes a simulated load module, which is used to enable the external charger to detect the need for power supply when the PD main control chip is not powered, so that the power module outputs a second voltage to the PD main control chip through the first output terminal. The input terminals of the analog load module are connected to the first CC pin and the second CC pin, respectively, and the output terminal is grounded.

3. The overvoltage protection circuit as described in claim 2, characterized in that, The simulated load module includes a first diode, a second diode, and a load unit. The load unit is used to output a load detection signal to the load unit through the first CC pin and the second CC pin when the PD main control chip is not powered, so that the power module outputs a second voltage to the PD main control chip. The anode of the first diode is electrically connected to the second CC pin, and the cathode of the first diode is connected to the input terminal of the load unit. The anode of the second diode is electrically connected to the first CC pin, and the cathode of the second diode is connected to the input terminal of the load unit.

4. An overvoltage protection circuit as described in claim 3, characterized in that, The load unit includes a first resistor and a second resistor. The input terminal of the first resistor is connected to the cathode of the first diode and the second diode, respectively. The input terminal of the second resistor is electrically connected to the output terminal of the first resistor, and the output terminal is grounded.

5. The overvoltage protection circuit as described in claim 4, characterized in that, When the PD main control chip is not powered, the voltage across the second resistor is less than the voltage across the first resistor.

6. The overvoltage protection circuit as described in claim 5, characterized in that, The first resistor and the second resistor are connected in series, and the first output terminal of the power module outputs a second voltage between the first resistor and the second resistor. Alternatively, the second output terminal of the power module outputs a third voltage between the first resistor and the second resistor.

7. The overvoltage protection circuit as described in claim 6, characterized in that, When the external charger outputs a second voltage to the PD main control chip, the voltage values ​​of the second voltage and the third voltage are equal, so as to cut off the current between the first CC pin and the second CC pin and the analog load module.

8. The overvoltage protection circuit as described in claim 7, characterized in that, The power module includes a first buck unit and a second buck unit. The first buck unit is used to output a second voltage, and the second buck unit is used to output a third voltage. The input terminal of the first buck unit is connected to the VBUS pin and an external charger. The first output terminal of the first buck unit is electrically connected to the PD main control chip, the input terminal of the second buck unit, the gate of the first NMOS transistor, and the gate of the second NMOS transistor. The second output terminal of the second buck unit is connected between the first resistor and the second resistor.

9. An overvoltage protection chip, characterized in that, It includes a circuit board and an overvoltage protection circuit as described in any one of claims 1-8; the overvoltage protection circuit is disposed on the circuit board.

10. An overvoltage protection electronic device, characterized in that, It includes a Type-C interface, an overvoltage protection circuit, and a PD main control chip. The overvoltage protection circuit is disposed between the Type-C interface and the PD main control chip. The overvoltage protection circuit is the overvoltage protection circuit according to any one of claims 1-8.

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