Delay unit

Abstract

The utility model relates to the field of radio frequency communication, in particular to a delayer, which is characterized by comprising a substrate and a control chip positioned on the substrate, and at least one slow wave delay line is arranged on the substrate; the control chip comprises a first input pin used for inputting a radio frequency signal to the control chip; the first output pin is used for outputting a radio frequency signal by the control chip; the plurality of second input pins are used for being connected with the input ends of the corresponding slow wave delay lines; the plurality of second output pins are used for being connected with the output ends of the corresponding slow wave delay lines; the change-over switch is used for connecting or disconnecting a path between the first input pin and the second input pin, and / or is used for connecting or disconnecting a path between the first output pin and the second output pin; and the control circuit is used for controlling the switching state of the change-over switch.

Description

TECHNICAL FIELD

[0001] The utility model relates to the field of radio frequency communication, especially relates to a delay. BACKGROUND

[0002] The delay has the effect that the adjusting circuit time delay, has wide application in wireless communication system, automation equipment, industry production, audio and video synchronization etc. field. At present, the industry adopts the form of mixed integration, and the delay includes delay structure and switch, the delay structure adopts coaxial cable, optical fiber, printed circuit board (PCB) wiring, on-chip slow wave delay line, and the switch can be integrated in the same PCB or the same chip with the delay structure.

[0003] The prior art coaxial cable, optical fiber is relatively large in size, and it is difficult to realize high integration; due to the limitation of processing precision, the overall size of the PCB is very large, and it is difficult to realize low insertion loss and miniaturization; and the on-chip slow wave delay line scheme needs to design more passive structures in the chip, the conductor chip area increases dramatically, and the cost is high, which is not conducive to mass production.

[0004] With the development of radio frequency microwave technology, the system equipment has higher and higher requirements for high integration, low insertion loss and low cost, and the corresponding design requirements for the delay are also put forward, that is, high integration, low insertion loss and low cost, therefore, how to design a low-cost, small-size, high-integration, low-insertion-loss and product-consistency-easy-to-control delay is a problem to be solved. UTILITY MODEL CONTENT

[0005] The utility model aims at providing a kind of delay, control circuit and switch are designed in chip interior, slow wave delay line is arranged in substrate, and switch and control circuit are arranged in control chip, and the delay of miniaturization, low insertion loss design can be realized.

[0006] The embodiment of the utility model discloses a kind of delay, the delay includes:

[0007] Substrate and control chip on the substrate, at least one slow wave delay line is arranged in the substrate;

[0008] The control chip includes:

[0009] First input pin, for inputting radio frequency signal to the control chip;

[0010] First output pin, for the control chip output radio frequency signal;

[0011] Multiple second input pins are used to connect with the input end corresponding to the slow wave delay line;

[0012] a plurality of second output pins for connecting with output ends of the slow-wave delay lines;

[0013] a switch for turning on or off a path between the first input pin and any of the second input pins, and / or for turning on or off a path between the first output pin and any of the second output pins;

[0014] a control circuit for controlling a switching state of the switch.

[0015] Optionally, the substrate comprises a first conductive layer, a first dielectric layer, a signal layer, a second dielectric layer and a second conductive layer which are sequentially stacked:

[0016] the signal layer comprises a slow-wave delay line, a co-planar waveguide at input and output ends of the slow-wave delay line, and a first conductive structure at two sides of the slow-wave delay line and the co-planar waveguide, the first conductive structure at two sides of the co-planar waveguide being a first gradually-changing arc structure;

[0017] the first dielectric layer comprises a second conductive structure;

[0018] the second dielectric layer comprises a third conductive structure;

[0019] the second conductive structure, the first conductive structure and the third conductive structure are sequentially in contact, and the first conductive structure, the second conductive structure and the third conductive structure are all insulated from the slow-wave delay line;

[0020] the second conductive structure is electrically connected with the first conductive layer, and / or the third conductive structure is electrically connected with the second conductive layer.

[0021] Optionally, a plurality of the slow-wave delay lines are arranged in parallel in the substrate; and / or,

[0022] a plurality of the slow-wave delay lines are arranged vertically in the substrate, a plurality of the slow-wave delay lines are respectively located in a plurality of signal layers of the substrate, and a plurality of the slow-wave delay lines are isolated by a ground layer.

[0023] Optionally, the second conductive structure comprises a second gradually-changing arc structure, the third conductive structure comprises a third gradually-changing arc structure, and the second gradually-changing arc structure, the first gradually-changing arc structure and the third gradually-changing arc structure are of the same shape and are sequentially in contact.

[0024] Optionally, the slow-wave delay line comprises a plurality of periodical structures which are periodically bent; wherein each of the periodical structures comprises:

[0025] a first bent structure and a second bent structure which are connected with each other; wherein,

[0026] The bending shapes of the first bending structure and the second bending structure are configured to generate magnetic field lines in opposite directions at the first bending structure and the second bending structure when the radio frequency signal is transmitted through the first bending structure and the second bending structure.

[0027] Optionally, the signal layer further comprises a cavity outside the slow wave delay line, the co-planar waveguide and the first conductive structure.

[0028] Optionally, the co-planar waveguide at the input end of the slow wave delay line is connected with the corresponding second input pin; and the co-planar waveguide at the output end of the slow wave delay line is connected with the corresponding second output pin.

[0029] Optionally, the substrate comprises a plurality of regions, each of which is arranged with a plurality of slow wave delay lines and the control chip corresponding to the slow wave delay lines.

[0030] The delay device further comprises a master control chip, which provides a control signal to the control chip through the substrate.

[0031] Optionally, the switch is a single-pole multi-throw switch.

[0032] Optionally, the substrate further comprises one or more of the following:

[0033] A radio frequency input channel is configured to provide the radio frequency signal to the first input pin.

[0034] A radio frequency output channel is configured to lead out the radio frequency signal of the first output pin.

[0035] A power supply channel is configured to provide a power supply signal to the control chip, and the power supply signal provides power supply to the control circuit.

[0036] A control signal channel is configured to provide a control signal to the control chip, and the control signal is used for controlling the control circuit.

[0037] The effect of the utility model embodiment compared with prior art lies in that:

[0038] The delay device of the utility model is designed with slow wave delay lines occupying area in a low-cost substrate, which greatly reduces the cost, and compared with the traditional coaxial cable or PCB slow wave delay line structure, the volume is smaller.

[0039] The control chip on the substrate is provided with a first input pin, a first output pin, a plurality of second input pins, a plurality of second output pins, a switching switch and a control circuit, the first input pin is used for inputting a radio frequency signal to the control chip; the first output pin is used for outputting the radio frequency signal by the control chip; the plurality of second input pins are used for being connected with input ends corresponding to the slow wave delay lines; the plurality of second output pins are used for being connected with output ends corresponding to the slow wave delay lines; the switching switch is used for turning on or turning off a path between the first input pin and the second input pin of the control chip and / or turning on or turning off a path between the first output pin and the second output pin of the control chip; and the control circuit is used for controlling a switching state of the switching switch, so that one of the slow wave delay lines is selected to be connected between the first input pin and the first output pin, the time delay between the first input pin and the first output pin can be conveniently selected, the control is simple to realize, the integration degree is high, and the cost is low.

[0040] The control chip and the substrate can be packaged together, the performance of the time delay device is effectively protected from interference of an external environment, and the service life of the time delay device is improved.

[0041] In the substrate, the slow wave delay lines and the coplanar waveguides are combined, a plurality of slow wave delay lines with different time delay amounts are realized, and the slow wave delay lines with low insertion loss can be realized in the smallest size. The corresponding gradual arc structure can be arranged for the coplanar waveguide, and the insertion loss caused by impedance mismatch can be further reduced.

[0042] In addition, the substrate can include a plurality of regions, and a plurality of groups of time delay devices can work simultaneously, different control signals are input to different time delay devices, the time delay amount of each group of time delay devices is different, and therefore a plurality of real-time time delay devices can be realized. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 It is an external side view of a time delay device according to an embodiment of the present application;

[0044] FIG. 2 (a) is a layered schematic view of a substrate according to an embodiment of the present application;

[0045] FIG. 2 (b) is a schematic view of a signal layer in a substrate according to an embodiment of the present application;

[0046] Figure 3 It is a layout schematic view of a slow wave delay line in a substrate according to an embodiment of the present application;

[0047] Figure 4 It is a schematic view of a plurality of time delay devices according to an embodiment of the present application. DETAILED DESCRIPTION

[0048] The utility model will be further described below in connection with specific embodiments and drawings. It can be understood that the specific embodiments described herein are merely for the purpose of explaining the utility model, and not limiting the utility model. In addition, in order to facilitate the description, only part of the structure or process related to the utility model is shown in the drawings, not all. It should be noted that in this specification, similar numbers and letters in the following drawings represent similar items.

[0049] It should be understood that although the terms "first", "second" and the like can be used herein to describe various features, these features should not be limited by these terms. The use of these terms is merely for the purpose of differentiation, and cannot be understood as indicating or implying relative importance. For example, without departing from the scope of the example embodiments, a first feature can be referred to as a second feature, and similarly a second feature can be referred to as a first feature.

[0050] In order to make the purpose, technical scheme and advantages of the utility model more clear, the embodiments of the utility model will be further described in detail below in connection with the drawings.

[0051] Figure 1 It is a structure schematic view of a time delay device according to the utility model embodiments.

[0052] As Figure 1 shown, a time delay device of the utility model includes a substrate 100 and a control chip 200 located on the substrate 100, and the substrate 100 is electrically connected with the control chip 200 through metal bumps 300. Wherein, the substrate 100 is arranged with at least one slow wave delay line 110 for decelerating and delaying the radio frequency signal flowing through; the control chip 200 is arranged with a switching switch 210 and a control circuit 240 for digital control.

[0053] In the present scheme, the control chip 200 is also called integrated circuit (IC), which is a microcircuit integrating multiple electronic elements (such as transistors, etc.) on a single substrate. The control chip 200 can be a bare chip, or a chip including packaging.

[0054] The substrate 100 provides physical support and electrical connection for the control chip 200. When the control chip 200 is a bare chip, the control chip 200 can be packaged with the substrate 100. During the packaging process, the control chip 200 is fixed on the substrate 100, and the electrical connection with the substrate is realized by welding or other methods. When the control chip 200 is a chip including packaging, the substrate 100 can be a PCB (Printed Circuit Board), and the control chip 200 can be fixed on the PCB by welding.

[0055] Specifically, as Figure 1As shown, as an embodiment, the control chip 200 includes:

[0056] The first input pin 221 is used for inputting the radio frequency signal 191 to the control chip 200, and the first input pin 221 can be welded with the corresponding pin on the substrate 100 through the metal bump 300, so as to receive the radio frequency signal 191 from the substrate 100.

[0057] The first output pin 231 is used for outputting the radio frequency signal 191 from the control chip 200, and the first output pin 231 can be welded with the corresponding pin on the substrate 100 through the metal bump 300, so as to output the delayed radio frequency signal from the substrate 100.

[0058] The plurality of second input pins 222 are used for connecting with the input ends of the corresponding slow wave delay lines 110 in the substrate 100, and the second input pin 222 can be welded with the corresponding pin at the output end of the slow wave delay line 110 through the metal bump 300, so as to output the radio frequency signal to the slow wave delay line 110.

[0059] The plurality of second output pins 232 are used for connecting with the output ends of the corresponding slow wave delay lines 110 in the substrate 100, and the second output pin 232 can be welded with the corresponding pin at the output end of the slow wave delay line 110 through the metal bump 300, so as to output the delayed radio frequency signal to the control chip 110; the plurality of second output pins 232 correspond to the plurality of second input pins 222 one by one, and each second output pin 232 and the corresponding second input pin 222 are used for connecting one slow wave delay line 110.

[0060] The switching switch 210 is used for turning on or turning off the path between the first input pin 221 and any second input pin 222, and / or turning on or turning off the path between the first output pin 231 and any second output pin 232; through the switching switch 210, one slow wave delay line 110 can be selected to be connected between the first input pin 221 and the first output pin 231, so as to select the slow wave delay line 110 to delay the radio frequency signal. Figure 1 In the embodiment shown, there is a switching switch 210 between the first input pin 221 and the second input pin 222, and at the same time, there is a switching switch 210 between the first output pin 231 and the second output pin 232; in other embodiments, there can be a switching switch 210 between the first input pin 221 and the second input pin 222, and there can be no switching switch 210 between the first output pin 231 and the second output pin 232; or, there can be no switching switch 210 between the first input pin 221 and the second input pin 222, and there can be a switching switch 210 between the first output pin 231 and the second output pin 232.

[0061] The control circuit 240 is configured to control the switching state of the switch 210. The control circuit 240 can control which path the switch 210 is turned on based on an external control signal, so as to select which slow-wave delay line 110 is connected between the first input pin 221 and the first output pin 231, so as to select the slow-wave delay line 110 to delay the radio frequency signal, so that the input radio frequency signal and the output radio frequency signal have a time delay corresponding to the delay amount. The slow-wave delay line 110 can slow down the electromagnetic wave (radio frequency signal), lengthen the electromagnetic path, and achieve a large circuit delay with a short length. The control is simpler, has high integration, and low cost.

[0062] The control chip 200 and the substrate 100 can be packaged together, so as to effectively protect the performance of the delay device from the interference of the external environment, and improve the service life of the delay device.

[0063] As an embodiment, the switch 210 is a single-pole multi-throw switch, for example, a single-pole eight-throw switch SP8T. Figure 1 In the embodiment shown, the substrate 100 has eight slow-wave delay lines 110, wherein the 0 ps (picosecond) slow-wave delay line is a reference delay line, the 5 ps slow-wave delay line is a delay amount interval, and the last slow-wave delay line has a delay amount of 35 ps. Therefore, the throw end of the switch includes throw 1 to throw 8, and each throw end is configured to connect one slow-wave delay line 110. Under the action of the control signal, the single-pole eight-throw switch SP8T can be connected to any one of throw 1, throw 2 to throw 8, so as to autonomously select different delay amounts, without the need to set multiple line supporting switches, thereby greatly reducing the size of the delay device.

[0064] As shown in Figure 1 As an embodiment, the substrate further includes one or more of the following, so as to facilitate signal communication between the control chip 200 and the substrate 100:

[0065] The radio frequency input channel 160 is configured to provide a radio frequency signal to the first input pin 221.

[0066] The radio frequency output channel 170 is configured to output the radio frequency signal of the first output pin 231.

[0067] The power supply channel 150 is configured to provide a power supply signal to the control chip 200, and the power supply signal provides a power supply 192 (shown in Figure 3 ) to the control circuit 240; or,

[0068] The control signal channel 180 is configured to provide a control signal 193 (shown in Figure 3 ) to the control chip 200, and the control signal is configured to control the control circuit 240 to control the state of the switch 210.

[0069] Figure 2(a) is a schematic diagram of a substrate according to an embodiment of the present application, wherein XYZ is a three-axis coordinate system, and the three axes XYZ can be perpendicular to each other or at least partially not perpendicular to each other. As shown in Figure 2(a), as an embodiment, the substrate 100 comprises a first conductive layer 410, a first dielectric layer 420, a signal layer 430, a second dielectric layer 440 and a second conductive layer 450 stacked in sequence along the direction Z; wherein the signal layer 430 can comprise a slow-wave delay line 110, a co-planar waveguide 120 at the input end and the output end of the slow-wave delay line 110, and a first conductive structure 431, the co-planar waveguide 120 being configured to be electrically connected to the second input pin 222 and the second output pin 232 in the signal transmission device 200. Figure 1 The first conductive structure 431 is located on both sides of the slow-wave delay line 110 and the co-planar waveguide 120 in the Y direction, and the first conductive structure 431 is configured to surround the slow-wave delay line 110 and the co-planar waveguide 120 in the Y direction, and the first conductive structure 431 is configured to be grounded. For the purpose of clear display, Figure 2(a) only shows the co-planar waveguide 120 at one end (which can be the input end or the output end) of the slow-wave delay line 110, and the co-planar waveguide 120 at the other end is not shown. The co-planar waveguide 120 is located on both sides of the slow-wave delay line 110 in the X direction.

[0070] The first dielectric layer 420 comprises a second conductive structure 421, the second dielectric layer 440 comprises a third conductive structure 441, and the second conductive structure 421, the first conductive structure 431 and the third conductive structure 441 are in contact with each other in sequence, so that the second conductive structure 421, the first conductive structure 431 and the third conductive structure 441 form a shielding wall on both sides of the slow-wave delay line 110 and the co-planar waveguide 120 in the Y direction. In addition, the first conductive structure 431, the second conductive structure 421 and the third conductive structure 441 are all insulated from the slow-wave delay line 110 and the co-planar waveguide 120, so as to ensure that the signal transmission of the slow-wave delay line 110 and the co-planar waveguide 120 is not affected. The second conductive structure 421 is electrically connected to the first conductive layer 410, and / or the third conductive structure 441 is electrically connected to the second conductive layer 450, so that the shielding wall formed by the second conductive structure 421, the first conductive structure 431 and the third conductive structure 441 can be conveniently grounded, and better shielding can be achieved. The first conductive structure 431, the second conductive structure 421 and the third conductive structure 441 are conductive materials, such as metal materials.

[0071] In the embodiments of the present disclosure, the slow-wave delay line 110 is a medium integrated suspended line formed by the above multi-layer structure, and the radio frequency signal is transmitted through the slow-wave delay line 110 and the coplanar waveguide 120 located in the signal layer 430. The transmission direction of the signal is the X direction, and along the Y direction, the signal layer 430 has two first conductive structures 431 located on both sides of the slow-wave delay line 110 and the coplanar waveguide 120, respectively. The first conductive structure 431 can be understood as two metal lines, and the thickness of the first conductive structure 431 is the same as the thickness of the signal layer 430, that is, the first conductive structure 431 penetrates the upper and lower surfaces along the direction Z perpendicular to the signal layer 430.

[0072] The signal layer 430 is respectively attached with a medium substrate (dielectric medium) above and below, that is, the first medium layer 420 and the second medium layer 440. The two layers of medium substrates make the slow-wave delay line 110 and the coplanar waveguide 120 in the signal layer 430 suspended. In the embodiments of the present disclosure, the first medium layer 420 is provided with two second conductive structures 421 along the Y direction, which correspond to the positions of the first conductive structures 431 in the signal layer. And similar to the first conductive structure 431, the second conductive structure 421 can extend along the X direction. The thickness of the second conductive structure 421 is the same as the thickness of the first medium layer 420, that is, the second conductive structure 421 penetrates the upper and lower surfaces of the first medium layer 420 along the direction Z. Similarly, the second medium layer 440 is also provided with two third conductive structures 441, which correspond to the positions of the first conductive structures 431. And the thickness of the third conductive structure 441 is the same as the thickness of the second substrate 140, which penetrates the upper and lower surfaces of the second medium layer 440.

[0073] For the first dielectric layer 420 and the second dielectric layer 440, in the manufacturing process, the dielectric substrate and the conductive layer can be first bonded, i.e., the first dielectric layer 420 and the first conductive layer 410 are bonded, and the second dielectric layer 440 and the second conductive layer 450 are bonded. Then two grooves extending in the X direction are formed on the dielectric substrate, and the depth of the groove is the same as the thickness of the dielectric substrate, i.e., the groove is slotted to the bottom of the dielectric substrate so that the conductive layer is exposed. Then the metal or other conductive material is filled in the groove, thereby forming the second conductive structure 421 and the third conductive structure 441. Then the first dielectric layer 420 and the first conductive layer 410 formed with the second conductive structure 421 are bonded with the signal layer 430, so that the surface of the first dielectric layer 420 is in contact with the surface of the signal layer 130. Since the position of the second conductive structure 421 in the first dielectric layer 420 corresponds to the position of the first conductive structure 431 in the signal layer 430, the second conductive structure 421 and the first conductive structure 431 are connected after bonding. Similarly, the second dielectric layer 440 bonded with the second conductive layer 450 is bonded with the other side of the signal layer 430, so that the third conductive structure and the first conductive structure 130 are connected. In this way, a complete five-layer structure is formed, and the first conductive layer 410, the second conductive structure 421, the first conductive structure 431, the third conductive structure 441 and the second conductive layer 450 are connected to each other.

[0074] In another embodiment, other structures, such as other dielectric layers, can be provided between the first dielectric layer 420 and the first conductive layer 410, and / or between the second dielectric layer 140 and the second conductive layer 450, and the second conductive structure 421 and the first conductive layer 410 and the third conductive structure 441 and the second conductive layer 450 are connected by other conductive structures. The specific form is not limited here, i.e., a conductive connection is formed.

[0075] In the above slow wave delay line of the embodiments of the present disclosure, the first conductive layer and / or the second conductive layer is a grounded metal layer, the first conductive structure in the signal layer, the second conductive structure in the first dielectric layer, and the third conductive structure in the second dielectric layer are sequentially in contact and connected to each other, so that the second conductive structure, the third conductive structure, and the first conductive structure and the first conductive layer and the second conductive layer can form a continuous frame to surround the slow wave delay line and the coplanar waveguide, thereby achieving the effect of shielding external signal interference, thereby effectively reducing the interference of external signals on the slow wave delay line, reducing loss, and improving signal transmission quality. At the same time, compared with the structure of the connection via, the second conductive structure and the third conductive structure can increase the capacitance of the slow wave delay line, thereby improving the delay effect.

[0076] As an implementation, the first conductive structure 431 comprises a first gradually-changing arc-shaped structure 432, the second conductive structure 421 comprises a second gradually-changing arc-shaped structure 422, and the third conductive structure 441 comprises a third gradually-changing arc-shaped structure 442. The second gradually-changing arc-shaped structure 422, the first gradually-changing arc-shaped structure 432, and the third gradually-changing arc-shaped structure 442 have the same shape and are in contact in sequence. The overall width of the slow wave delay line 110 in the Y direction is wide. At the slow wave delay line 110, the width of the first conductive structure 431 is narrow, and the spacing between two first conductive structures 431 is large. The overall width of the coplanar waveguide 120 in the Y direction is narrow. At the slow wave delay line 110, the width of the first conductive structure 431 is wide, and the spacing between two first conductive structures 431 is small. Therefore, the line width of the first gradually-changing arc-shaped structure 432 changes little, and the impedance at the transition is smoothly transitioned from the slow wave delay line to the coplanar waveguide, reducing the insertion loss caused by the transition mismatch.

[0077] Correspondingly, the positions and shapes of the second gradually-changing arc-shaped structure 422 and the third gradually-changing arc-shaped structure 442 match those of the first gradually-changing arc-shaped structure 432. That is, when the positions in the X direction are the same, the spacing between two first conductive structures 431, the spacing between two second conductive structures 421, and the spacing between two third conductive structures 441 are all equal, thereby further achieving smooth transition of the impedance and further reducing the insertion loss.

[0078] As an implementation, the signal layer 430 further comprises a cavity 432 outside the slow wave delay line 110, the coplanar waveguide 120, and the first conductive structure 431. The cavity is not filled with dielectric material or metal, and is empty inside, containing air or vacuum, to electrically isolate the slow wave delay line 110, the coplanar waveguide 120, and the first conductive structure 431.

[0079] Referring to FIG. 2(b), the periodic bending structure is a slow wave delay line 110, and a co-planar waveguide 120 is connected to the bending part. Each periodic structure includes a first bending structure 111 and a second bending structure 112 connected to each other; wherein the bending shapes of the first bending structure 111 and the second bending structure 112 are configured to generate magnetic induction lines in opposite directions at the first bending structure and the second bending structure when the signal is transmitted in the first bending structure 111 and the second bending structure 112. The periodically bent transmission line refers to a structure formed by bending to form a plurality of units, and each unit can be the same, i.e., a shape that is connected to each other and periodically repeated. The first bending structure 111 and the second bending structure 112 can be a center-symmetric structure, and the center of symmetry is the connection point of the two bending structures. The two bending structures can form magnetic induction lines in different directions when the current is transmitted in the delay line through bending in different directions. Here, the magnetic induction line directions corresponding to the first bending structure 111 and the second bending structure 112 are opposite, which can generate an induced electromotive force that hinders the change of the current, thus showing a significant self-induction effect, increasing the inductance of the transmission line, so that the signal transmission produces greater delay, and can reduce loss and improve transmission efficiency.

[0080] It can be understood that the more the line segments of the first bending structure 111 and the second bending structure 112 are bent, the closer to the shape of "8". The current in each "8" shaped periodic structure will generate a magnetic field perpendicular to the paper in the area enclosed by the first bending structure 111, and a magnetic field perpendicular to the paper outside the area enclosed by the second bending structure 112, and a magnetic induction line loop around the line segment connecting the first bending structure 111 and the second bending structure 112.

[0081] When the current flowing through the periodic structure changes, the magnetic flux between the first bending area 211 and the second bending area 212 also changes, thereby generating an induced electromotive force that hinders the change of the current, thereby showing a significant inductance effect, thereby increasing the inductance of the transmission line and producing a delay.

[0082] In an embodiment, different units can also have different shapes, for example, odd-numbered units are bent into "8" shapes, and even-numbered units are bent into "Z" shapes, and then periodically repeated.

[0083] Figure 1 The slow wave delay line 110 with different delay amounts can be provided with different numbers of periodic structures or periodic structures with different shapes to produce different delay amounts. When the slow wave delay line 110 is 0ps, it can be understood as having no periodic structure.

[0084] Fig. 2(a) and Fig. 2(b) are only one implementation of the above-mentioned back-and-forth bending structure, and the actual number of back-and-forth bending can be determined according to the width of the signal layer in the slow-wave delay line, that is, more bending can be performed when the width is wider and there is enough space, and less bending can be performed when the width is narrow. In addition, the number of bending can also be designed according to the length and width of the delay line. For example, the length of the slow-wave delay line can be 1.96 mm, and the width can be 0.58 mm. The bending mode shown in the above-mentioned figure can make the spacing between each bending line and the adjacent bending line be the minimum spacing supported by the process.

[0085] Figure 3 is a layout schematic diagram of a slow-wave delay line in a substrate according to an embodiment of the present application. In the present embodiment, in the Y direction, a plurality of slow-wave delay lines 110 are arranged in parallel in the substrate 100, that is, the plurality of slow-wave delay lines are arranged in parallel in the Y-axis direction. The staggered design of the delay lines on the plane can save area. The different slow-wave delay lines 110 are isolated by the first conductive structure 431 in Fig. 2(a) to avoid interference between the slow-wave delay lines 110.

[0086] The coplanar waveguide 120 located at the input end of the slow-wave delay line 110 can be connected with the metal bump 300 through a plug (not shown in the figure for clarity) and connected with the corresponding second input pin 222 in Fig. 1 through the metal bump 300. Figure 1 The coplanar waveguide 120 located at the output end of the slow-wave delay line 110 can be connected with the metal bump 300 through a plug (not shown in the figure for clarity) and connected with the corresponding second output pin 232 in Fig. 1 through the metal bump 300. Figure 1

[0087] In other embodiments, the plurality of slow-wave delay lines 110 can also be arranged vertically in the substrate, that is, the plurality of slow-wave delay lines are arranged vertically in the Z-axis direction. The plurality of slow-wave delay lines are isolated by a ground layer to avoid interference between the slow-wave delay lines 110, for example, to form the following stacked structure: conductive layer, dielectric layer, signal layer (slow-wave delay line 1), dielectric layer, conductive layer, dielectric layer, signal layer (slow-wave delay line 2), dielectric layer, conductive layer, dielectric layer, signal layer (slow-wave delay line 3), dielectric layer, conductive layer, and so on. The conductive layer is a whole layer of metal as a ground.

[0088] Figure 4 is a schematic diagram of a multi-path delay device according to an embodiment of the present application.

[0089] ​As an implementation, the substrate 100 comprises a plurality of regions 510, in each region 510 of the substrate 100, a plurality of slow-wave delay lines are arranged, and on one side of the substrate 100 of each region 510, a corresponding control chip 200 is arranged; the delay device further comprises a master control chip 500, which provides control signals to each control chip 200 through the substrate.

[0090] In the case of keeping the size of the control chip 200 unchanged, the substrate 100 can be expanded, and a plurality of groups of delay devices as shown above can be designed on the same substrate 100, and the plurality of groups of delay devices can work simultaneously, by inputting different control signals to different delay devices, the delay amount of each group of delay devices is different, thereby realizing a multi-path real-time delay device.

[0091] In some embodiments, the four control chips 200 each have a corresponding radio frequency input signal and a radio frequency output signal, and the radio frequency signals are connected with the outside through the substrate 100. The power supply and control signals required by each chip are uniformly managed and provided by the master control chip 500, and the external total power supply 194, the first total control signal 195 and the second total control signal 196 are transmitted to each control chip 200 through the substrate 100, and the four single-path delay devices generate corresponding delay amounts respectively, thereby realizing a four-path real-time delay device.

[0092] The master control chip 500 and the four control chips 200 can be located on the same side of the substrate 100, or at least partially arranged on both sides of the substrate 100, when the master control chip 500 and the control chip 200 are not on the same side, the layout can be more compact, thereby miniaturizing the area of the substrate 100, and further reducing the cost.

[0093] The illustrative embodiments of the present application include but are not limited to a delay device.

[0094] Various aspects of the illustrative embodiments will be described using terminology commonly employed by those skilled in the art and having a basic understanding of such technology. It will be apparent, however, to one skilled in the art that the practice of the embodiments described herein can employ both presently known equivalents or substitutions as well as equivalents or substitutions developed after the time of the patent. For purposes of explanation and ease of understanding, specific details of the illustrative embodiments are set forth including a description of certain features. It will be apparent to one skilled in the art, however, that alternative embodiments can be practiced without all of the specific details set forth. In some instances, well-known features have been omitted or simplified in order to avoid obscuring the illustrative embodiments of the present application.

[0095] Furthermore, the various operations will be described as multiple separate operations in a manner most conducive to understanding the illustrative embodiments; however, the order of description should not be construed as implying that these operations must depend on the order of description, and many of these operations may be performed in parallel, concurrently, or simultaneously. Moreover, the order of the operations may also be rearranged. The process may be terminated when the described operations are completed, but may also include additional steps not included in the figures. The process may correspond to a method, function, procedure, subroutine, subroutine, etc.

[0096] References to phrases such as "an example," "in an example," "an embodiment," and "an implementation" in the specification indicate that the described embodiment may include specific features, structures, or properties; however, each embodiment may or may not necessarily include specific features, structures, or properties. Furthermore, these phrases are not necessarily directed at the same embodiment. Additionally, when specific features are described in conjunction with specific embodiments, the knowledge of those skilled in the art can influence the combination of these features with other embodiments, whether or not those embodiments are explicitly described.

[0097] Unless the context otherwise specifies, the terms “comprising,” “having,” and “including” are synonyms. The phrase “A and / or B” means “(A), (B), or (A and B).”

[0098] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the present invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0099] Similarly, it should be understood that, in order to simplify the present invention and aid in understanding one or more of the various aspects of the invention, in the above description of exemplary embodiments of the present invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof. However, this disclosure should not be construed as reflecting an intention that the claimed invention requires more features than expressly recited in each claim. Rather, as reflected in the claims, the inventive aspect lies in fewer than all features of the single embodiment disclosed above. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of the invention.

[0100] Those skilled in the art will appreciate that the modules in the apparatuses in the embodiments can be adapted and placed in one or more apparatuses other than that of the embodiments. The modules or units or components in the embodiments can be combined into one module or unit or component, and furthermore can be split into multiple sub-modules or sub-units or sub-components. Any combination of all the features disclosed in the present specification (including the accompanying claims, abstract and drawings), and any method or process of any combination of the features disclosed in the present specification (including the accompanying claims, abstract and drawings) can be adopted unless specifically stated otherwise. Each feature disclosed in the present specification (including the accompanying claims, abstract and drawings) can be replaced by alternative features providing the same, equivalent or similar function unless stated explicitly otherwise.

[0101] Furthermore, those skilled in the art will appreciate that the features of the different embodiments described herein can be combined in any combination, and that the combinations of features form different embodiments within the scope of the present application. For example, in the claims, any of the claimed embodiments can be used in any combination.

Claims

1. A delay timer characterized by, The substrate is arranged with at least one slow-wave delay line; The control chip comprises: a first input pin for inputting a radio frequency signal to the control chip; a first output pin for outputting a radio frequency signal from the control chip; a plurality of second input pins for connecting with input ends of the slow-wave delay lines; a plurality of second output pins for connecting with output ends of the slow-wave delay lines; a switching switch for turning on or off a path between the first input pin and any of the second input pins, and / or for turning on or off a path between the first output pin and any of the second output pins; a control circuit for controlling a switching state of the switching switch.

2. The delayer of claim 1, wherein The substrate comprises a first conductive layer, a first dielectric layer, a signal layer, a second dielectric layer and a second conductive layer which are sequentially stacked: The signal layer comprises a slow-wave delay line, a co-planar waveguide at input and output ends of the slow-wave delay line, and a first conductive structure at both sides of the slow-wave delay line and the co-planar waveguide, the first conductive structure at both sides of the co-planar waveguide being in a first gradually changing arc shape; The first dielectric layer comprises a second conductive structure; The second dielectric layer comprises a third conductive structure; The second conductive structure, the first conductive structure and the third conductive structure are sequentially in contact, and the first conductive structure, the second conductive structure and the third conductive structure are all insulated from the slow-wave delay line; The second conductive structure is electrically connected with the first conductive layer, and / or the third conductive structure is electrically connected with the second conductive layer.

3. The delay line according to claim 1 or 2, wherein: a plurality of the slow-wave delay lines are arranged in parallel in the substrate; and / or a plurality of the slow-wave delay lines are arranged perpendicularly in the substrate, and the plurality of the slow-wave delay lines are respectively located in a plurality of signal layers of the substrate, and the plurality of the slow-wave delay lines are isolated by a ground layer.

4. The delayer of claim 2, wherein, The second conductive structure comprises a second gradually changing arc shape, the third conductive structure comprises a third gradually changing arc shape, and the second gradually changing arc shape, the first gradually changing arc shape and the third gradually changing arc shape are in the same shape and are sequentially in contact.

5. The delayer of claim 2, wherein, The slow-wave delay line comprises a plurality of periodical structures which are periodically bent; wherein each of the periodical structures comprises: a first bending structure and a second bending structure which are connected with each other; wherein bending shapes of the first bending structure and the second bending structure are configured such that, when the radio frequency signal is transmitted in the first bending structure and the second bending structure, the radio frequency signal generates magnetic field lines with opposite directions at the first bending structure and the second bending structure respectively.

6. The delayer of claim 2, wherein, The signal layer further comprises a cavity outside the slow-wave delay line, the co-planar waveguide and the first conductive structure.

7. The delay line according to claim 2, wherein: the co-planar waveguide at the input end of the slow-wave delay line is connected with a corresponding second input pin; and the co-planar waveguide at the output end of the slow-wave delay line is connected with a corresponding second output pin.

8. The delayer of claim 1, wherein, The substrate comprises a plurality of regions, each of which is arranged with a plurality of slow-wave delay lines and control chips corresponding to the plurality of slow-wave delay lines; The delay device further comprises a master control chip, which provides control signals to the control chips through the substrate.

9. The delayer of claim 1, wherein, The switch is a single-pole multi-throw switch.

10. The delayer of claim 1, wherein, The substrate is packaged with the control chip; and / or, The substrate further comprises one or more of the following: An RF input channel for providing the RF signal to the first input pin; An RF output channel for leading out the RF signal of the first output pin; A power supply channel for providing a power supply signal to the control chip, the power supply signal providing power supply to the control circuit; A control signal channel for providing a control signal to the control chip, the control signal being used to control the control circuit.

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