Chip testing device

Abstract

The utility model discloses a chip testing device which comprises a system power supply circuit, a chip power supply circuit, a testing board peripheral component, a serializer integrated circuit and a controller, the system power supply circuit is electrically connected with the testing board peripheral component, the chip power supply circuit is electrically connected with the serializer integrated circuit, and the serializer integrated circuit is electrically connected with the controller. The test board peripheral component is electrically connected with the serializer integrated circuit, and the controller is electrically connected with the test board peripheral component and the serializer integrated circuit.

Description

TECHNICAL FIELD

[0001] The utility model belongs to chip testing technical field, concretely relates to a chip testing device. BACKGROUND

[0002] The design of the high-frequency Serializer / Deserializer chip is to meet the needs of wide frequency band and long-distance signal transmission in the industry and automotive field, and through the coaxial cable of not more than 15 meters, the frequency MIPI / CSI (Camera Serial Interface) / PHY (physical layer chip) protocol can realize the transmission of bidirectional signals up to dozens of GHz, so the market demand is extremely high, but the design difficulty is extremely great.

[0003] In the prior art, the chip function test is not complete, and the interface with the deserializer is lacking, so that the signal chain is not complete. UTILITY MODEL CONTENT

[0004] The utility model aims at providing a kind of chip testing device, solve the problem of Serializer chip function test not completely in relevant technologies.

[0005] Therefore, the utility model provides a kind of chip testing device, it includes: system power supply circuit, chip power supply circuit, test board peripheral component, serializer integrated circuit and controller, the system power supply circuit is electrically connected with test board peripheral component, the chip power supply circuit is electrically connected with serializer integrated circuit, the test board peripheral component is electrically connected with the serializer integrated circuit, the controller is electrically connected with the test version peripheral component and the serializer integrated circuit.

[0006] Preferably, it further includes power conversion device, and the power conversion device is electrically connected with the system power supply circuit and the chip power supply setting.

[0007] Preferably, the system power supply circuit is provided with stabilizer.

[0008] Preferably, the chip power supply circuit is provided with stabilizer.

[0009] Preferably, the serializer integrated circuit is provided with first GPIO / I2C interface, CSI interface and APHY interface.

[0010] Preferably, the controller is provided with second GPIO / I2C interface, SCCB interface and UART interface.

[0011] Preferably, the first GPIO / I2C interface on the serializer integrated circuit is electrically connected with the second GPIO / I2C interface on the controller.

[0012] Preferably, the camera is electrically connected with the serializer integrated circuit through a CSI interface, and the camera is electrically connected with the controller through an SCCB interface.

[0013] Preferably, the control host is electrically connected with the controller through a UART interface.

[0014] Preferably, the deserializer is electrically connected with the serializer integrated circuit through an APHY interface.

[0015] Advantages:

[0016] 1. The utility model provides a chip testing device, on the basis that the chip and circuit of each module have been completely verified, organically combines each module, realizes complete test for the function of Serializer chip, can realize complete test of signal chain through the design of plan, reserves the interface with Deserializer. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical scheme in the embodiment of the utility model or prior art, the following will be briefly introduced to the drawing needed to be used in the embodiment or prior art description, obviously, the drawing in the following description only some embodiments of the utility model, for ordinary skilled person in the art, under the premise of not paying creative labor, other drawings can also be obtained according to these drawings.

[0018] Figure 1 It is the circuit schematic diagram of embodiment 1 of a kind of chip testing device provided by the utility model.

[0019] Figure 2 It is the circuit schematic diagram of signal chain complete test of embodiment 1 of a kind of chip testing device provided by the utility model.

[0020] In the figure, 1-power conversion device, 2-system power supply circuit, 3-chip power supply circuit, 4-test board peripheral components, 5-serializer integrated circuit, 51-first GPIO / I2C interface, 52-CSI interface, 53-APHY interface, 6-controller, 61-second GPIO / I2C interface, 62-SCCB interface, 63-UART interface, 7-camera, 8-control host, 9-deserializer. DETAILED DESCRIPTION

[0021] The content of the present application can be more easily understood by referring to the following detailed description of the preferred embodiments of the present application and included drawings. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. In case of conflict, the definitions in this specification prevail.

[0022] Embodiment 1

[0023] Provided is a chip testing device as shown in Figure 1 The chip testing device comprises:

[0024] The power supply circuit module comprises a power conversion device 1, a system power supply circuit 2 and a chip power supply circuit 3. The power conversion device 1 is electrically connected to the system power supply circuit 2 and the chip power supply circuit 3.

[0025] The power conversion device 1 converts the input 12V voltage to 5V voltage. The system power supply circuit 2 and the chip power supply circuit 3 are provided with voltage stabilizers (LDO). The system power supply circuit 2 requires different voltages including 5V, 3.3V and 1.8V, and two 5V-3.3V LDO and 5V-1.8V LDO are set according to the circuit requirements, i.e. converting 5V voltage to 3.3V and 1.8V. The chip power supply circuit 3 requires different voltages including 1.8V, 1.1V and 2.5V, and 5V-1.8V LDO, 5V-1.1V LDO and 5V-2.5V LDO are set according to the circuit requirements.

[0026] The system power supply circuit 2 is electrically connected to the test board peripheral components 4, the chip power supply circuit 3 is electrically connected to the serializer integrated circuit 5, the test board peripheral components 4 are electrically connected to the serializer integrated circuit 5 (Serializer IC), and the controller (MCU) 6 is electrically connected to the test board peripheral components and the serializer integrated circuit 5.

[0027] The serializer integrated circuit 5 is provided with a first GPIO / I2C interface 51, a CSI interface 52 and an APHY interface 53. The controller 6 is provided with a second GPIO / I2C interface 61, an SCCB interface 62 and a UART interface 63. The first GPIO / I2C interface 51 on the serializer integrated circuit 5 is electrically connected to the second GPIO / I2C interface 61 on the controller 6.

[0028] It also includes a camera 7, which is electrically connected to the serializer integrated circuit 5 through the CSI interface 52, and is electrically connected to the controller 6 through the SCCB interface 62.

[0029] It also includes a control host 8, which is electrically connected to the controller 6 via a UART interface 63.

[0030] It also includes a deserializer 9, and the serializer integrated circuit 5 is electrically connected to the deserializer 9 through the APHY interface 53.

[0031] like Figure 2 The diagram shows a complete signal chain transmission and testing system. A microcomputer system (Raspberry Pi) can communicate with the deserializer 9 via Linux system software and USB / HDMI interfaces. The serializer converts the video signal from the camera 7 into a serial signal, which is then transmitted to the deserializer 9 via a coaxial cable. The deserializer 9 converts the transmitted signal into a parallel signal, which is then transmitted to the computer PC1 via the Raspberry Pi. The control host is used solely to control the serializer and deserializer 9.

[0032] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A chip testing apparatus characterized by comprising: The system power supply circuit, the chip power supply circuit, the test board peripheral component, the serializer integrated circuit and the controller are electrically connected. The power conversion device is electrically connected with the system power supply circuit and the chip power supply.

2. The chip testing apparatus according to claim 1, wherein The system power supply circuit is provided with a voltage stabilizer.

3. The chip testing apparatus according to claim 2, wherein The chip power supply circuit is provided with a voltage stabilizer.

4. The chip testing apparatus according to claim 2, wherein The serializer integrated circuit is provided with a first GPIO / I2C interface, a CSI interface and an APHY interface.

5. The chip testing apparatus according to claim 1, wherein The controller is provided with a second GPIO / I2C interface, an SCCB interface and a UART interface.

6. The chip testing apparatus according to claim 5, wherein The first GPIO / I2C interface on the serializer integrated circuit is electrically connected with the second GPIO / I2C interface on the controller.

7. The chip testing apparatus according to claim 6, wherein The camera is electrically connected with the serializer integrated circuit through the CSI interface and is electrically connected with the controller through the SCCB interface.

8. The chip testing apparatus according to claim 7, wherein The control host is electrically connected with the controller through the UART interface.

9. The chip testing apparatus according to claim 7, wherein The deserializer is electrically connected with the serializer integrated circuit through the APHY interface.

10. The chip testing apparatus according to claim 8, wherein ​

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