Voltage conversion circuit and switching power supply

Abstract

The utility model discloses a voltage conversion circuit and a switching power supply, and relates to the technical field of switching power supplies. The voltage conversion circuit comprises a first voltage input end, a conversion output circuit, a drive control circuit, an MOS tube drive circuit and a bleeder circuit. Wherein the driving control circuit can output a driving control signal, the MOS tube driving circuit controls the conduction state between the first voltage input end and the conversion output circuit according to the level change of the driving control signal, and the conversion output circuit controls the conduction state between the first voltage input end and the conversion output circuit in the conduction / turn-off change of an MOS tube of the MOS tube driving circuit. The first voltage input by the first voltage input end can be output after voltage conversion, and the leakage circuit can quickly discharge parasitic voltage when an MOS tube of the MOS tube driving circuit is turned off. The utility model aims to quickly discharge the parasitic voltage of the MOS tube in the voltage conversion circuit so as to prevent the false driving of the MOS tube.

Description

Technical Field

[0001] This utility model relates to the field of switching power supply technology, and in particular to a voltage conversion circuit and a switching power supply. Background Technology

[0002] In switching power supplies, voltage conversion circuits are typically used for voltage conversion. For example, a BUCK circuit is used to reduce a high voltage to a constant low voltage output. MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are widely used in these circuits as the primary switching element to control the operation of the voltage conversion output device.

[0003] However, in practical applications, when a MOSFET switches from the on state to the off state, the voltage at the gate of the MOSFET cannot be discharged in time due to the parasitic inductance and capacitance between the gate and the drain. This means that there is a delayed discharge parasitic voltage, which can easily cause the MOSFET to be misdriven, resulting in unstable or erroneous operation of the voltage conversion output device. Utility Model Content

[0004] The main purpose of this invention is to provide a voltage conversion circuit that quickly discharges the parasitic voltage of the MOSFET to prevent malfunction of the MOSFET.

[0005] To achieve the above objectives, the voltage conversion circuit proposed in this utility model includes:

[0006] The first voltage input terminal is used to input the first voltage.

[0007] A conversion output circuit is used to convert the first voltage and output it.

[0008] Drive control circuit, used to output drive control signals;

[0009] A MOSFET driving circuit is provided, wherein the controlled terminal of the MOSFET driving circuit is connected to the driving control circuit, the input terminal of the MOSFET driving circuit is connected to the first voltage input terminal, and the output terminal of the MOSFET driving circuit is connected to the conversion output circuit; the MOSFET driving circuit is used to control the conduction state between the first voltage input terminal and the conversion output circuit according to the driving control signal, so as to drive the operation of the conversion output circuit.

[0010] A discharge circuit is provided, which is connected to the drive control circuit and the MOS transistor drive circuit respectively. The discharge circuit is used to discharge the parasitic voltage of the MOS transistor in the MOS transistor drive circuit.

[0011] In one embodiment, the MOS transistor driving circuit includes an NMOS transistor; the drain of the NMOS transistor is connected to the first voltage input terminal, the gate of the NMOS transistor is connected to the MOS transistor driving circuit, and the source of the NMOS transistor is connected to the conversion output circuit.

[0012] The discharge circuit includes a discharge resistor, which is used to discharge the parasitic voltage generated when the NMOS transistor is turned off.

[0013] In one embodiment, the drive control circuit includes:

[0014] An isolated input circuit is provided, wherein the input terminal of the isolated input circuit is used to receive an external pulse drive signal, and the first output terminal of the isolated input circuit is connected to the MOS transistor drive circuit and the discharge circuit respectively. The isolated input circuit is used to transform and isolate the external pulse drive signal and then output the drive control signal.

[0015] A first control branch, the input terminal of which is connected to the second output terminal of the isolated input circuit, and the control terminal of which is connected to the gate of the NMOS transistor; the first control branch is used to control the NMOS transistor to turn on when the drive control signal is at a first level;

[0016] The second control branch has its input terminal connected to the second output terminal of the isolated input circuit, and its control terminal connected to the gate of the NMOS transistor. The second control branch is used to control the NMOS transistor to turn off when the drive control signal is at the second level.

[0017] In one embodiment, the isolated input circuit includes a drive isolation transformer and a first capacitor, the first control branch includes a first diode, and the second control branch includes a transistor and a first resistor;

[0018] The primary winding of the drive isolation transformer is used to supply external pulse drive signal input. One end of the secondary winding of the drive isolation transformer is connected to one end of the first capacitor. The other end of the secondary winding, the collector of the transistor, the source of the NMOS transistor, and one end of the bleeder resistor are connected. The other end of the first capacitor, the anode of the first diode, and one end of the first resistor are connected. The cathode of the first diode, the emitter of the transistor, and the gate of the NMOS transistor are connected. The other end of the first resistor, the base of the transistor, and the other end of the bleeder resistor are connected.

[0019] In one embodiment, the transistor is a PNP transistor.

[0020] In one embodiment, the first control branch further includes a second resistor, one end of which is connected to the negative terminal of the first diode, and the other end of the second resistor, the emitter of the transistor, and the gate of the NMOS transistor are connected.

[0021] In one embodiment, the MOS transistor driving circuit further includes a third resistor, one end of which is connected to the gate of the NMOS transistor, and the other end of which is connected to the source of the NMOS transistor.

[0022] In one embodiment, the conversion output circuit includes a second diode, a first inductor, and a second capacitor; the negative terminal of the second diode and one end of the first inductor are connected to the output terminal of the MOS transistor driving circuit; the other end of the first inductor and the positive terminal of the second capacitor are connected to the output terminal of the conversion output circuit; the positive terminal of the second diode and the negative terminal of the second capacitor are grounded.

[0023] In one embodiment, the second capacitor is an electrolytic capacitor.

[0024] This invention also proposes a switching power supply, including the voltage conversion circuit described above.

[0025] This invention employs a voltage conversion circuit, including a first voltage input terminal, a conversion output circuit, a drive control circuit, a MOSFET drive circuit, and a discharge circuit. The drive control circuit outputs a drive control signal. The MOSFET drive circuit controls the conduction state between the first voltage input terminal and the conversion output circuit based on the level of the drive control signal. For example, when the drive control signal is high, the first voltage input terminal and the conversion output circuit are connected, and the inductor of the conversion output circuit stores energy. When the drive control signal is low, the first voltage input terminal and the conversion output circuit are turned off, and the inductor of the conversion output circuit releases energy. Thus, the conversion output circuit can convert and output the first voltage as the MOSFET in the MOSFET drive circuit changes between on and off states. The discharge circuit quickly discharges the parasitic voltage of the MOSFET in the MOSFET drive circuit. Therefore, this invention solves the problem of mis-driving caused by slow discharge of parasitic voltage from the MOSFET, enhancing the stability of the voltage conversion circuit. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0027] Figure 1 A schematic diagram of an embodiment of the voltage conversion circuit provided by this utility model;

[0028] Figure 2 Electronic circuit diagram of another embodiment of the voltage conversion circuit provided by this utility model;

[0029] Figure 3 Two square wave diagrams of the drive control signal of an embodiment of the voltage conversion circuit provided by this utility model.

[0030] Explanation of icon numbers:

[0031]

[0032] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0033] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0034] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in this utility model embodiment are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0035] Furthermore, the use of terms such as "first" and "second" in this utility model is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this utility model.

[0036] It should be noted that when a MOSFET switches from the on state to the off state, the parasitic voltage of the MOSFET cannot be discharged in time due to the parasitic inductance and capacitance between the gate and drain. The delayed parasitic voltage can easily cause the MOSFET to be misdriven, resulting in unstable or erroneous operation of the voltage conversion output device.

[0037] This invention proposes a voltage conversion circuit.

[0038] Please see Figure 1 In one embodiment of this utility model, the voltage conversion circuit includes:

[0039] The first voltage input terminal is used to input the first voltage.

[0040] The conversion output circuit 10 is used to convert the first voltage and output it.

[0041] Drive control circuit 20 is used to output drive control signals;

[0042] The MOSFET driving circuit 30 has its controlled terminal connected to the driving control circuit 20, its input terminal connected to the first voltage input terminal, and its output terminal connected to the conversion output circuit 10. The MOSFET driving circuit 30 is used to control the conduction state between the first voltage input terminal and the conversion output circuit 10 according to the driving control signal, so as to drive the operation of the conversion output circuit 10.

[0043] The discharge circuit 40 is connected to the drive control circuit 20 and the MOS transistor drive circuit 30 respectively. The discharge circuit 40 is used to discharge the parasitic voltage of the MOS transistor in the MOS transistor drive circuit 30.

[0044] It should be noted that the first voltage can be HV voltage, i.e., the voltage after AC rectification. The conversion output circuit 10 can specifically be a BUCK circuit, which can reduce the higher input first voltage to a constant low output voltage. The BUCK circuit can include components such as inductors, diodes, and capacitors. The inductor acts as an energy storage device, storing energy when the switch is on and releasing it when the switch is off. The diode can be used as a freewheeling diode, providing a path for current to continue flowing in the inductor when the switch is off, preventing the inductor from generating excessive reverse voltage. The capacitor smooths the output, providing a stable low-voltage output.

[0045] It should be noted that the drive control circuit 20 may include components such as a drive isolation transformer to transform the external pulse signal into a drive control signal suitable for controlling the operation of the MOS transistor drive circuit 30. The drive control signal may be a square wave signal such as a PWM signal.

[0046] It should be noted that the MOSFET driver circuit 30 specifically includes a MOSFET, which is used to control the conduction between the first voltage input terminal and the conversion output circuit 10 when it is turned on. At this time, the first voltage is input, and the inductor in the BUCK circuit stores energy. When it is turned off, it controls the disconnection between the first voltage input terminal and the conversion output circuit 10. At this time, there is no first voltage input, and the inductor in the BUCK circuit releases energy, thus converting the first voltage into a low voltage output.

[0047] It should be noted that, due to the parasitic inductance and capacitance between the gate and drain of a MOSFET, if the parasitic voltage of the MOSFET cannot be discharged in time, the delayed parasitic voltage can easily cause malfunction of the MOSFET. In this embodiment, the discharge circuit 40 can quickly discharge the parasitic voltage generated by the MOSFET during operation.

[0048] In this embodiment, the drive control circuit 20 can output a drive control signal. The MOSFET drive circuit 30 controls the conduction state between the first voltage input terminal and the conversion output circuit 10 according to the level change of the drive control signal. For example, when the drive control signal is high, the first voltage input terminal and the conversion output circuit 10 are connected, and the inductor of the conversion output circuit 10 stores energy. When the drive control signal is low, the first voltage input terminal and the conversion output circuit 10 are turned off, and the inductor of the conversion output circuit 10 releases energy. Thus, the conversion output circuit 10 can convert and output the first voltage as the MOSFET in the MOSFET drive circuit 30 changes between on and off states. The discharge circuit 40 can quickly discharge the parasitic voltage of the MOSFET in the MOSFET drive circuit 30. Therefore, this embodiment solves the problem of MOSFET misdrive caused by slow discharge of parasitic voltage, and enhances the stability of the voltage conversion circuit.

[0049] In this invention, the drive control circuit 20 can output a drive control signal. The MOSFET drive circuit 30 controls the conduction state between the first voltage input terminal and the conversion output circuit 10 according to the level change of the drive control signal. For example, when the drive control signal is high, the first voltage input terminal is connected to the conversion output circuit 10, and the inductor of the conversion output circuit 10 stores energy. When the drive control signal is low, the first voltage input terminal is disconnected from the conversion output circuit 10, and the inductor of the conversion output circuit 10 releases energy. Thus, the conversion output circuit 10 can convert the first voltage and output it as the MOSFET in the MOSFET drive circuit 30 changes between on and off states. The discharge circuit 40 can quickly discharge the parasitic voltage of the MOSFET in the MOSFET drive circuit 30. Therefore, this invention solves the problem of mis-driving caused by slow discharge of parasitic voltage from the MOSFET, and enhances the stability of the voltage conversion circuit.

[0050] Please see Figure 2 In one embodiment of the present invention, the MOS transistor driving circuit 30 includes an NMOS transistor Q1; the drain of the NMOS transistor Q1 is connected to the first voltage input terminal, the gate of the NMOS transistor Q1 is connected to the MOS transistor driving circuit 30, and the source of the NMOS transistor Q1 is connected to the conversion output circuit 10.

[0051] The bleeder circuit 40 includes a bleeder resistor RA, which is used to bleed the parasitic voltage generated when the NMOS transistor Q1 is turned off.

[0052] In this embodiment, the bleeder resistor RA can bleed the parasitic voltage generated when the NMOS transistor Q1 is turned off, which can improve the turn-off speed of the NMOS transistor Q1, prevent the NMOS transistor Q1 from being misdriven due to delayed turn-off, and enhance the stability of the NMOS transistor Q1 drive conversion output circuit 10.

[0053] Please see Figure 2 In one embodiment of this utility model, the drive control circuit 20 includes:

[0054] The isolation input circuit 21 has an input terminal for receiving external pulse drive signals. The first output terminal of the isolation input circuit 21 is connected to the MOS transistor drive circuit 30 and the discharge circuit 40, respectively. The isolation input circuit 21 is used to output drive control signals after transforming and isolating the external pulse drive signals.

[0055] The first control branch 22 has its input terminal connected to the second output terminal of the isolation input circuit 21, and its control terminal connected to the gate of the NMOS transistor Q1. The first control branch 22 is used to control the NMOS transistor Q1 to turn on when the drive control signal is at the first level.

[0056] The second control branch 23 has its input terminal connected to the second output terminal of the isolation input circuit 21, and its control terminal connected to the gate of the NMOS transistor Q1. The second control branch 23 is used to control the NMOS transistor Q1 to turn off when the drive control signal is at the second level.

[0057] In one feasible embodiment, the isolation input circuit 21 includes a drive isolation transformer T1 and a first capacitor C1, the first control branch 22 includes a first diode D1, and the second control branch 23 includes a transistor Q2 and a first resistor R1.

[0058] The primary winding of the drive isolation transformer T1 is used to supply external pulse drive signal input. One end of the secondary winding of the drive isolation transformer T1 is connected to one end of the first capacitor C1. The other end of the secondary winding, the collector of transistor Q2, the source of NMOS transistor Q1, and one end of the bleeder resistor RA are connected. The other end of the first capacitor C1, the anode of the first diode D1, and one end of the first resistor R1 are connected. The cathode of the first diode D1, the emitter of transistor Q2, and the gate of NMOS transistor Q1 are connected. The other end of the first resistor R1, the base of transistor Q2, and the other end of the bleeder resistor RA are connected.

[0059] In this embodiment, the drive isolation transformer T1 can isolate external noise interference and generate a relatively stable drive control signal. Specifically, the drive control signal can be a square wave signal with alternating high and low levels. The high level corresponds to the first level and is used to control the NMOS transistor Q1 to conduct through the diode in the first control branch 22. The low level corresponds to the first level and is used to control the NMOS transistor Q1 to turn off through the first resistor R1 and transistor Q2 in the second control branch 23.

[0060] Please see Figure 2 In one embodiment of this utility model, transistor Q2 is a PNP transistor.

[0061] In this embodiment, when a low-level drive signal is input to the PNP transistor, the PNP transistor turns on, controlling the NMOS transistor Q1 to turn off. The discharge circuit 40 can quickly release the parasitic voltage generated when the NMOS transistor Q1 is turned off, thus achieving the effect of controlling the NMOS transistor Q1 to turn off quickly.

[0062] Please see Figure 2 In one embodiment of the present invention, the first control branch 22 further includes a second resistor R2. One end of the second resistor R2 is connected to the negative terminal of the first diode D1, and the other end of the second resistor R2, the emitter of the transistor Q2, is connected to the gate of the NMOS transistor Q1.

[0063] In this embodiment, the second resistor R2 is used for current limiting protection to ensure the safe operation of the NMOS transistor Q1.

[0064] Please see Figure 2 In one embodiment of the present invention, the MOS transistor driving circuit 30 further includes a third resistor R3, one end of which is connected to the gate of the NMOS transistor Q1, and the other end of which is connected to the source of the NMOS transistor Q1.

[0065] In this embodiment, the third resistor R3 is used to stabilize the gate voltage, which helps to resist possible noise or transient voltage fluctuations and ensures the normal turn-on / turn-off of the NMOS transistor Q1.

[0066] Please see Figure 2 In one embodiment of this utility model, the conversion output circuit 10 includes a second diode D2, a first inductor L1 and a second capacitor C2; the negative terminal of the second diode D2 and one end of the first inductor L1 are connected to the output terminal of the MOS transistor driving circuit 30; the other end of the first inductor L1 and the positive terminal of the second capacitor C2 are connected to the output terminal of the conversion output circuit 10; the positive terminal of the second diode D2 and the negative terminal of the second capacitor C2 are grounded.

[0067] In one feasible implementation, the second capacitor C2 is an electrolytic capacitor.

[0068] In this embodiment, the second diode D2, the first inductor L1, and the second capacitor C2 form a step-down output circuit, which can reduce the first voltage to a stable low voltage output. The first inductor L1 acts as an energy storage device, storing energy when the MOSFET is on and releasing it when the MOSFET is off. The second diode D2 functions as a freewheeling diode, providing a path for current to continue flowing in the inductor when the switch is off, preventing excessive reverse voltage from being generated in the inductor. The second capacitor C2 smooths the output, providing a stable low voltage output.

[0069] To facilitate understanding of the circuit principle of this utility model, please refer to [link / reference]. Figure 3 , Figure 3 The drive control signal consists of two square wave waveforms: a first, regularly changing square wave, and a second, irregularly changing square wave. Compared to the first square wave, the second square wave has a shorter time interval (t3-t1) / 2 between high and low levels at time t1, compared to (t2-t1) / 2 in the first square wave. When the drive control signal is the second square wave, the parasitic voltage of the MOSFET needs to be discharged more quickly to prevent malfunctions in the MOSFET.

[0070] To quickly discharge the parasitic voltage of the MOSFET to adapt to different drive control signal input scenarios, please refer to [link / reference needed]. Figure 2 , Figure 2 An embodiment of a voltage conversion circuit is provided. In this embodiment, when the drive control signal is at a high level, the high-level signal passes through the first diode D1 and the second resistor R2, driving the MOSFET Q1 to conduct. The first voltage HV passes through the first inductor L1 and the second capacitor C2, outputting a constant voltage. When the drive control signal is at a low level, the low-level signal passes through the first resistor R1 and the transistor Q2, driving the MOSFET Q1 to turn off. At this time, the voltage changes abruptly, and the output voltage passes through the freewheeling second diode D2, the first inductor L1, and the second capacitor C2, outputting a constant voltage. Specifically, when the drive control signal changes from high to low, the parasitic voltage generated by the MOSFET Q1 turning off can be discharged through the transistor Q2 and the bleeder resistor RA. Therefore, the MOSFET Q1 can be quickly turned off, and when the high-level signal returns, the MOSFET Q1 can resume normal driving operation. Thus, this embodiment can quickly discharge the parasitic voltage of the MOSFET Q1, which can cope with irregular changes in the drive control signal and prevent erroneous driving of the MOSFET Q1, enhancing the stability of the voltage conversion circuit.

[0071] This utility model also proposes a switching power supply, which includes a voltage conversion circuit. The specific structure of the voltage conversion circuit is as described in the above embodiments. Since this switching power supply adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here.

[0072] The above description is merely an exemplary embodiment of the present utility model and does not limit the patent scope of the present utility model. Any equivalent structural transformations made based on the technical concept of the present utility model and the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present utility model.

Claims

1. A voltage conversion circuit, characterized by, include: The first voltage input terminal is used to input the first voltage. A conversion output circuit is used to convert the first voltage and output it. Drive control circuit, used to output drive control signals; A MOSFET driving circuit is provided, wherein the controlled terminal of the MOSFET driving circuit is connected to the driving control circuit, the input terminal of the MOSFET driving circuit is connected to the first voltage input terminal, and the output terminal of the MOSFET driving circuit is connected to the conversion output circuit; the MOSFET driving circuit is used to control the conduction state between the first voltage input terminal and the conversion output circuit according to the driving control signal, so as to drive the operation of the conversion output circuit. A discharge circuit is provided, which is connected to the drive control circuit and the MOS transistor drive circuit respectively. The discharge circuit is used to discharge the parasitic voltage of the MOS transistor in the MOS transistor drive circuit.

2. The voltage conversion circuit of claim 1, wherein, The MOS transistor driving circuit includes an NMOS transistor; the drain of the NMOS transistor is connected to the first voltage input terminal, the gate of the NMOS transistor is connected to the MOS transistor driving circuit, and the source of the NMOS transistor is connected to the conversion output circuit. The discharge circuit includes a discharge resistor, which is used to discharge the parasitic voltage generated when the NMOS transistor is turned off.

3. The voltage conversion circuit of claim 2, wherein, The drive control circuit includes: An isolated input circuit is provided, wherein the input terminal of the isolated input circuit is used to receive an external pulse drive signal, and the first output terminal of the isolated input circuit is connected to the MOS transistor drive circuit and the discharge circuit respectively. The isolated input circuit is used to transform and isolate the external pulse drive signal and then output the drive control signal. A first control branch, the input terminal of which is connected to the second output terminal of the isolated input circuit, and the control terminal of which is connected to the gate of the NMOS transistor; The first control branch is used to control the NMOS transistor to turn on when the drive control signal is at the first level; The second control branch has its input terminal connected to the second output terminal of the isolated input circuit, and its control terminal connected to the gate of the NMOS transistor. The second control branch is used to control the NMOS transistor to turn off when the drive control signal is at the second level.

4. The voltage conversion circuit of claim 3, wherein, The isolated input circuit includes a drive isolation transformer and a first capacitor, the first control branch includes a first diode, and the second control branch includes a transistor and a first resistor; The primary winding of the drive isolation transformer is used to supply external pulse drive signal input. One end of the secondary winding of the drive isolation transformer is connected to one end of the first capacitor. The other end of the secondary winding, the collector of the transistor, the source of the NMOS transistor, and one end of the bleeder resistor are connected. The other end of the first capacitor, the anode of the first diode, and one end of the first resistor are connected. The cathode of the first diode, the emitter of the transistor, and the gate of the NMOS transistor are connected. The other end of the first resistor, the base of the transistor, and the other end of the bleeder resistor are connected.

5. The voltage conversion circuit of claim 4, wherein, The triode is a PNP triode.

6. The voltage conversion circuit of claim 4, wherein, The first control branch further comprises a second resistor, one end of the second resistor is connected with the negative electrode of the first diode, and the other end of the second resistor, the emitter of the triode and the gate of the NMOS tube are connected.

7. The voltage conversion circuit of claim 2, wherein, The MOS tube driving circuit further comprises a third resistor, one end of the third resistor is connected with the gate of the NMOS tube, and the other end of the third resistor is connected with the source of the NMOS tube.

8. The voltage conversion circuit of claim 1, wherein, The conversion output circuit comprises a second diode, a first inductor and a second capacitor, the negative electrode of the second diode and one end of the first inductor are connected with the output end of the MOS tube driving circuit, the other end of the first inductor and the positive electrode of the second capacitor are connected with the output end of the conversion output circuit, and the positive electrode of the second diode and the negative electrode of the second capacitor are grounded.

9. The voltage conversion circuit of claim 8, wherein, The second capacitor is an electrolytic capacitor.

10. A switching power supply, characterized by comprising: The voltage conversion circuit comprises the voltage conversion circuit according to any one of claims 1 to 9.

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