Buck-boost test device and buck-boost conversion system

Abstract

The utility model provides a buck-boost test device and a buck-boost conversion system, the device comprises an upper computer, a high-voltage power supply and at least one port circuit group, and the port circuit group comprises a first detection interface circuit; the output end of the upper computer is connected with each power tube of the target buck-boost converter; the high-voltage power supply is connected to the output side of the target buck-boost converter in parallel; the first detection interface circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end is connected with an input negative bus of a target buck-boost converter, the second connecting end is connected with an input positive bus of the target buck-boost converter, and the third connecting end is connected with an output positive bus of the target buck-boost converter; during testing, the second connecting end is in short circuit with the first connecting end or the third connecting end. The problem that according to an existing converter testing scheme, current and voltage stress is generated due to ceaseless disassembly and assembly, and a power tube is damaged is solved.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a buck-boost test device and a buck-boost conversion system. Background Technology

[0002] Currently, dual-pulse test setups for buck-boost converters primarily achieve this by adding a load, such as an inductor, to the converter's output side. During testing, different load connection positions are set according to the different power transistors in the converter. Changing the connection position requires repeatedly disassembling and reassembling the connecting components in the test setup. Since the converter itself also has inductance and capacitance, a resonant network will be formed with the added load inductance. This can generate unpredictable current and voltage stresses during disassembly and reassembly, thereby damaging the power transistors in the converter. Utility Model Content

[0003] In view of this, the purpose of this application is to provide a buck-boost test device and a buck-boost conversion system, which avoids damage to the power transistors caused by current and voltage stress during disassembly and assembly by setting a high-voltage power supply on the output side of the converter and using the inductor in the port circuit group as the load.

[0004] In a first aspect, embodiments of this application provide a buck-boost converter testing device, comprising: a host computer, a high-voltage power supply, a sampling circuit, and at least one port circuit group, wherein the port circuit group includes a first detection interface circuit; the output terminal of the host computer is connected to each power transistor of the target buck-boost converter, and is used to output a first drive signal to control the conduction and cutoff of each power transistor; the high-voltage power supply is connected in parallel to the output side of the target buck-boost converter, and is used to provide a dual-pulse signal; the first detection interface circuit includes a first connection terminal, a second connection terminal, and a third connection terminal, the first connection terminal being connected to the negative input bus of the target buck-boost converter, the second connection terminal being connected to the positive input bus of the target buck-boost converter, and the third connection terminal being connected to the positive output bus of the target buck-boost converter; during testing, the second connection terminal is short-circuited to the first connection terminal or the third connection terminal; the sampling circuit is connected to the host computer and is disposed on each power transistor of the target buck-boost converter, and is used to collect the parameters of each power transistor during testing.

[0005] In one feasible embodiment, the port circuit group further includes: a second detection interface circuit, which is connected in series with the high-voltage power supply and is used to control the connection and disconnection between the high-voltage power supply and the output side of the target buck-boost converter.

[0006] In one feasible embodiment, the second detection interface circuit is located between the positive terminal of the high-voltage power supply and the positive busbar on the output side, or between the positive terminal of the high-voltage power supply and the negative busbar on the output side.

[0007] In one feasible implementation, both the first detection interface circuit and the second detection interface circuit are signal-controlled switching devices or physical-controlled switching devices.

[0008] In one feasible implementation, if both the first detection interface circuit and the second detection interface circuit are signal-controlled switching devices, the host computer is also connected to the first detection interface circuit and the second detection interface circuit to output a second drive signal to control the on / off state of the first detection interface circuit and the second detection interface circuit.

[0009] In one feasible implementation, the physically controlled switching device is a single-pole double-gate switch or a single-pole single-gate switch designed using a copper busbar.

[0010] In one feasible embodiment, the second detection interface circuit includes two copper busbar connectors and a cable harness. The two copper busbar connectors are respectively located on the busbar on the output side and the high-voltage power supply, and are electrically connected through the cable harness.

[0011] Secondly, embodiments of this application provide a buck-boost converter system, including: a buck-boost test device as described above and at least one buck-boost converter; the input side of each buck-boost converter is connected in parallel with the first detection interface circuit, and the output side of each buck-boost converter is connected in parallel with the high-voltage power supply; the sampling circuit is disposed on each power transistor of the buck-boost converter.

[0012] In one feasible embodiment, the buck-boost converter includes a full-bridge circuit, an input capacitor, an output capacitor, a first inductor, and a second inductor; the output capacitor, the full-bridge circuit, and the high-voltage power supply are connected in parallel; the full-bridge circuit includes a first bridge arm and a second bridge arm, the first inductor and the second inductor are connected in series and positioned between the midpoints of the first bridge arm and the second bridge arm, the common terminal of the first inductor and the second inductor is connected to one end of the input capacitor and the second connection terminal; the other end of the input capacitor is connected to the first connection terminal, one end of the first bridge arm, and one end of the second bridge arm; the other end of the first bridge arm and the other end of the second bridge arm are connected to the third connection terminal.

[0013] In one feasible embodiment, the port circuit group further includes: a second detection interface circuit, which is connected in parallel with the high-voltage power supply and then in parallel with the output capacitor.

[0014] The embodiments of this application bring the following beneficial effects:

[0015] The aforementioned buck-boost test device and buck-boost conversion system include: a host computer, a high-voltage power supply, and at least one port circuit group. The port circuit group includes a first detection interface circuit. The output terminal of the host computer is connected to each power transistor of the target buck-boost converter. The high-voltage power supply is connected in parallel to the output side of the target buck-boost converter. The first detection interface circuit includes a first connection terminal, a second connection terminal, and a third connection terminal. The first connection terminal is connected to the negative input bus of the target buck-boost converter, the second connection terminal is connected to the positive input bus of the target buck-boost converter, and the third connection terminal is connected to the positive output bus of the target buck-boost converter. During testing, the second connection terminal is short-circuited to either the first connection terminal or the third connection terminal. This application sets the high-voltage power supply on the output side of the converter and uses the inductor in the converter multiplexed by the port circuit group as a load, thus avoiding damage to the power transistors caused by current and voltage stress during disassembly and assembly without the need for disassembly and assembly.

[0016] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. The objectives and other advantages of this application are realized and obtained through the structures particularly pointed out in the description, claims and drawings.

[0017] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0018] To more clearly illustrate the specific embodiments of this application or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of one embodiment of the boost / buck testing device provided in this application.

[0020] Figure 2 This is a schematic diagram of a second embodiment of the boost / buck testing device provided in this application.

[0021] Figure 3 This is a schematic diagram of one embodiment of the buck-boost converter system provided in this application.

[0022] Figure 4 The circuit schematic diagram of the buck-boost converter system provided in the embodiments of this application;

[0023] Figure 5 This is a first equivalent circuit diagram of the buck-boost converter system provided in the embodiments of this application;

[0024] Figure 6 This is a second equivalent circuit diagram of the buck-boost converter system provided in the embodiments of this application;

[0025] Figure 7 This is a third equivalent circuit diagram of the buck-boost converter system provided in the embodiments of this application;

[0026] Figure 8 This is a fourth equivalent circuit diagram of the buck-boost converter system provided in the embodiments of this application. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] The buck-boost converter consists of four switching transistors forming a full-bridge circuit. The full-bridge circuit includes a first bridge arm and a second bridge arm. An inductor is provided at the midpoint of each bridge arm. The inductor is connected to the positive and negative buses of the lower bridge of the first and second bridge arms, serving as the input side bus. In addition, the controller is connected to each control terminal on the two bridge arms to output the corresponding level to control the turn-off and turn-on of the corresponding power transistor.

[0029] like Figure 1 The diagram illustrates one embodiment of the buck-boost test device provided in this application. The device includes a host computer 110, a high-voltage power supply 120, a sampling circuit 140, and at least one port circuit group 130. The host computer 110, high-voltage power supply 120, sampling circuit 140, and at least one port circuit group 130 are all connected to the target buck-boost converter (i.e., the portion within the dashed box in the diagram). Specifically, the high-voltage power supply 120 is connected in parallel to the output side of the converter, the port circuit group 130 is connected in parallel to the input side of the converter, and the host computer 110 is connected to the control terminals of each power transistor in the converter. The host computer 110 outputs drive signals to control the turn-off and turn-on of each power transistor.

[0030] During converter testing, the port circuit group 120 is internally connected and forms a corresponding test loop with the converter. The parameters on each power transistor are collected by the sampling circuit 140 for subsequent evaluation of the buck-boost converter's performance.

[0031] Understandably, the port circuit group 130 includes a first detection interface circuit 131, which is used to connect to the two bus terminals on the input side and one bus terminal on the output side of the target buck-boost converter. During testing, the two bus terminals on the input side or one of the two bus terminals on the input side and one bus terminal on the output side are short-circuited through the first detection interface circuit 131 to achieve testing of different power transistors in the target buck-boost converter.

[0032] In this embodiment, the output terminal of the host computer 110 is connected to each power transistor of the target buck-boost converter, and is used to output a first drive signal to control the conduction and cutoff of each power transistor; the high-voltage power supply 120 is connected in parallel to the output side of the target buck-boost converter, and is used to provide a dual-pulse signal; the first detection interface circuit 131 includes a first connection terminal 1311, a second connection terminal 1312 and a third connection terminal 1313, the first connection terminal 1311 is connected to the input negative bus of the target buck-boost converter, the second connection terminal 1312 is connected to the input positive bus of the target buck-boost converter, and the third connection terminal 1313 is connected to the output positive bus of the target buck-boost converter; during testing, the second connection terminal 1312 is short-circuited to the first connection terminal 1311 or the third connection terminal 1313; the sampling circuit 140 is connected to the host computer 110 and is located on each power transistor of the target buck-boost converter, and is used to collect the parameters of each power transistor during testing.

[0033] Understandably, the first detection interface circuit 131 can be a switching device with three output ports, such as a single-pole double-gate switch, a combination circuit of two single-pole single-gate switches, or even a relay. When using a relay, it is also connected to the host computer 110. After determining the target power transistor to be tested, the two ports corresponding to the target power transistor in the first detection interface circuit 131 are short-circuited. After short-circuiting, the host computer 110 outputs the corresponding drive signal, causing the target power transistor to conduct, thereby realizing the test of the target power transistor. It should be noted that the above control method only designs pulse level output. The pulse level can be a pre-set level command or a pre-given voltage value, which are all commonly used implementation principles.

[0034] In another feasible embodiment, the port circuit group 130 further includes: a second detection interface circuit 132, which is connected in series with the high-voltage power supply 120 and is used to control the connection and disconnection between the high-voltage power supply 120 and the output side of the target buck-boost converter.

[0035] Understandably, the second detection interface circuit 132 is located between the positive terminal of the high-voltage power supply 120 and the positive busbar on the output side, or between the positive terminal of the high-voltage power supply 120 and the negative busbar on the output side.

[0036] like Figure 2 As shown, the second detection interface circuit 132 is located between the positive terminal of the high-voltage power supply 120 and the positive busbar on the output side. Specifically, the second detection interface circuit 132 is turned on after shorting the second connection terminal 1312 and the first connection terminal 1311 or the second connection terminal 1312 and the third connection terminal 1313.

[0037] It should be noted that both the first detection interface circuit 131 and the second detection interface circuit 132 are signal-controlled switching devices or physical-controlled switching devices.

[0038] In practical applications, the signal-controlled switching device can be a relay or a level-controlled knife switch, which is connected to the host computer 110. The host computer 110 outputs different level signals to control the short-circuiting of different connection terminals of the first detection interface circuit 131 and the connection of the second detection interface circuit 132.

[0039] The physical control type switching device is a single-pole double-gate switch or a single-pole single-gate switch designed using copper busbars.

[0040] In another embodiment, the second detection interface circuit 132 includes two copper busbar connectors and a cable harness. The two copper busbar connectors are respectively disposed on the busbar on the output side and the high-voltage power supply 120, and are electrically connected through the cable harness.

[0041] In practical applications, the first connection terminal 1311, the second connection terminal 1312, and the third connection terminal 1313 in the first detection interface circuit 131, as well as the two ports in the second detection interface circuit 132, are all configured as copper busbars. The two copper busbars are short-circuited by either a cable harness or an automatic closing component. When testing the power transistors on the upper bridge of the target buck-boost converter, the first connection terminal 1311 and the second connection terminal 1312 are short-circuited, while the lower bridge is simultaneously turned off. Similarly, when testing the power transistors on the lower bridge of the target buck-boost converter, the third connection terminal 1313 and the second connection terminal 1312 are short-circuited, while the upper bridge is simultaneously turned off. At this time, the sampling circuit 140 collects real-time data on the current or voltage changes at the corresponding power transistors to determine if the power transistors are functioning correctly, thereby determining if the target buck-boost converter is functioning correctly.

[0042] The buck-boost test device provided in this application includes a host computer, a high-voltage power supply, at least one port circuit group, and a sampling circuit. The port circuit reuses the inductor on the target buck-boost converter as a load to test each power transistor. This test device structure eliminates the need for additional loads, thus reducing circuit costs and simplifying circuit setup. Furthermore, this circuit structure only requires a simple short-circuit operation interface to connect different power transistors for testing, simplifying the testing process and improving testing efficiency. The short-circuit setup eliminates the resonant network structure, avoiding frequent disassembly that could cause resonance and lead to unpredictable current and voltage fluctuations, potentially damaging the power transistors.

[0043] like Figure 3 The diagram shown is a structural schematic of a buck-boost converter system provided in an embodiment of this application. The system includes: a buck-boost testing device and at least one buck-boost converter 300; the input side of each buck-boost converter 300 is connected in parallel with the first detection interface circuit 131, and the output side of each buck-boost converter 300 is connected in parallel with the high-voltage power supply 120; the sampling circuit 140 is disposed on each power transistor of the buck-boost converter 300.

[0044] It should be noted that the sampling circuit 140 can be implemented using devices such as current sensors, voltage sensors, ammeters, and voltmeters. One can be set for each power transistor, or they can share one, and it can be set on the bus on the output side.

[0045] In this embodiment, the buck-boost converter 300 includes a full-bridge circuit 301, an input capacitor 302, an output capacitor 303, a first inductor 304, and a second inductor 305. The output capacitor 303, the full-bridge circuit 301, and the high-voltage power supply 120 are connected in parallel. The full-bridge circuit 301 includes a first bridge arm (power transistors Q1 and Q2 in the figure) and a second bridge arm (power transistors Q3 and Q4 in the figure). The first inductor 304 (i.e., L1 in the figure) and the second inductor 305 (i.e., L2 in the figure) are connected in series and positioned between the midpoints of the first and second bridge arms. The common terminal of the first inductor 304 and the second inductor 305 is connected to one end of the input capacitor 302 and the second connection terminal 1312. The other end of the input capacitor 302 is connected to the first connection terminal 1311, one end of the first bridge arm, and one end of the second bridge arm. The other ends of the first bridge arm and the second bridge arm are connected to the third connection terminal 1313. Figure 4 As shown.

[0046] Furthermore, in order to better control the test, a second detection interface circuit 132 is also provided. The second detection interface circuit 132 is connected in parallel with the high-voltage power supply 120 and then in parallel with the output capacitor 303.

[0047] It should be noted that if the test is confirmed to be of the power transistor in the upper bridge, the circuit topology is as follows: Figure 5 and 6 As shown. If it is determined that the test is being performed on the power transistor of the lower bridge, the circuit topology is as follows. Figure 7 and 8 As shown in the figure, connection terminals 1-5 correspond to the connection points connected to the first detection interface circuit 131 and the second detection interface circuit 132. Connection terminals 1, 2 and 5 correspond to the first connection terminal 1311, the second connection terminal 1312 and the third connection terminal 1313, and connection terminals 3 and 4 correspond to the second detection interface circuit 132. All of them can be implemented using copper busbars. Then, during the test, the two connection terminals are short-circuited through a cable harness.

[0048] During the dual-pulse test of power transistor Q1, a shorting copper busbar was used at connection terminals 1 and 2 to short-circuit the input capacitor 302 (Cin), thus eliminating the resonant network in the circuit and allowing the first inductor L1 to be directly connected in parallel across power transistor Q2. Simultaneously, a cable harness was used to connect the positive busbar of the high-voltage power supply 120 to the positive output copper busbar of the step-up / step-down converter, providing high-voltage power to the dual-pulse test system. The output capacitor 303 (Cout) is the system's own film capacitor. The dual-pulse test PWM wave controls the switching of power transistor Q1, and the first inductor L1 and power transistor Q2 form a freewheeling circuit.

[0049] In the double-pulse test of power transistor Q3, a shorting copper busbar is used at connection terminals 1 and 2 to short-circuit the input capacitor 302 (Cin), thus cutting off the resonant network in the circuit and allowing the second inductor L2 to be directly connected in parallel across power transistor Q4. Simultaneously, a cable harness is used to connect the positive busbar of the high-voltage power supply 120 to the positive output copper busbar of the step-up / step-down converter, providing high-voltage power to the double-pulse test system. The output capacitor 303 (Cout) is the system's own film capacitor. The double-pulse test PWM wave controls the switching of power transistor Q3, and the second inductor L2 and power transistor Q4 form a freewheeling circuit.

[0050] In the double-pulse test of power transistor Q2, a shorting copper busbar is used at connection terminals 1 and 5, so that the first inductor L1 is directly connected in parallel across the two ends of power transistor Q1. At the same time, a cable harness is used to connect the positive busbar of the high-voltage power supply 120 to the positive copper busbar of the step-up / step-down output, so as to provide high-voltage power to the double-pulse test system. The output capacitor 303 (Cout) and the input capacitor 302 (Cin) together serve as the system's own film capacitor. The PWM wave of the double-pulse test controls the switching of power transistor Q2, and the first inductor L1 and power transistor Q1 form a freewheeling circuit.

[0051] In the double-pulse test of power transistor Q4, a shorting copper busbar is used at connection terminals 1 and 5, allowing the second inductor L2 to be directly connected in parallel across power transistor Q3. Simultaneously, a cable harness is used to connect the high-voltage power busbar positively to the positive copper busbar of the step-up / step-down output, providing high-voltage power to the double-pulse test system. Output capacitor 303 (Cout) and input capacitor 302 (Cin) together serve as the system's own film capacitor. The double-pulse test PWM wave controls the switching of power transistor Q4, and the second inductor L2 and power transistor Q3 form a freewheeling circuit.

[0052] In summary, by utilizing the first and second detection interface circuits to reuse the inductor in the buck-boost converter as a load, the new test scheme achieves the goal of not requiring an additional inductor load and using its own inductance as the dual-pulse load inductor. The test fixture is simple and low-cost. Compared with existing technologies, it reduces the load disassembly and switching operations and avoids the problem of power damage caused by the resonant network composed of the upper and lower transistors in the buck-boost converter.

[0053] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0054] Furthermore, in the description of the embodiments of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0055] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0056] Finally, it should be noted that the above embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A step-up / step-down pressure testing device, characterized in that, include: The system includes a host computer, a high-voltage power supply, a sampling circuit, and at least one port circuit group, wherein the port circuit group includes a first detection interface circuit. The output terminal of the host computer is connected to each power transistor of the target buck-boost converter, and is used to output the first drive signal to control the conduction and cutoff of each power transistor; The high-voltage power supply is connected in parallel to the output side of the target buck-boost converter to provide a dual-pulse signal; The first detection interface circuit includes a first connection terminal, a second connection terminal, and a third connection terminal. The first connection terminal is connected to the negative input bus of the target buck-boost converter, the second connection terminal is connected to the positive input bus of the target buck-boost converter, and the third connection terminal is connected to the positive output bus of the target buck-boost converter. During testing, the second connection terminal is short-circuited to either the first connection terminal or the third connection terminal. The sampling circuit is connected to the host computer and is located on each power transistor of the target buck-boost converter to collect the parameters of each power transistor during testing.

2. The boost / buck pressure testing device according to claim 1, characterized in that, The port circuit group also includes: The second detection interface circuit is connected in series with the high-voltage power supply and is used to control the connection and disconnection between the high-voltage power supply and the output side of the target buck-boost converter.

3. The boost / buck pressure testing device according to claim 2, characterized in that, The second detection interface circuit is located between the positive terminal of the high-voltage power supply and the positive busbar on the output side, or between the positive terminal of the high-voltage power supply and the negative busbar on the output side.

4. The boost / buck pressure testing device according to claim 2, characterized in that, Both the first detection interface circuit and the second detection interface circuit are signal-controlled switching devices or physical-controlled switching devices.

5. The boost / buck pressure testing device according to claim 4, characterized in that, If both the first detection interface circuit and the second detection interface circuit are signal-controlled switching devices, the host computer is also connected to the first detection interface circuit and the second detection interface circuit to output a second drive signal to control the on / off state of the first detection interface circuit and the second detection interface circuit.

6. The boost / buck pressure testing device according to claim 4, characterized in that, The physical control type switching device is a single-pole double-gate switch or a single-pole single-gate switch designed using copper busbars.

7. The boost / buck pressure testing device according to claim 4, characterized in that, The second detection interface circuit includes two copper busbar connectors and a cable harness. The two copper busbar connectors are respectively located on the busbar on the output side and the high-voltage power supply, and are electrically connected through the cable harness.

8. A buck-boost converter system, characterized in that, include: The buck-boost test device and at least one buck-boost converter as described in any one of claims 1-7; the input side of each buck-boost converter is connected in parallel with the first detection interface circuit, and the output side of each buck-boost converter is connected in parallel with the high-voltage power supply; the sampling circuit is provided on each power transistor of the buck-boost converter.

9. The buck-boost converter system according to claim 8, characterized in that, The buck-boost converter includes a full-bridge circuit, an input capacitor, an output capacitor, a first inductor, and a second inductor. The output capacitor, the full-bridge circuit, and the high-voltage power supply are connected in parallel. The full-bridge circuit includes a first bridge arm and a second bridge arm. The first inductor and the second inductor are connected in series and positioned between the midpoints of the first bridge arm and the second bridge arm. The common terminal of the first inductor and the second inductor is connected to one end of the input capacitor and the second connection terminal. The other end of the input capacitor is connected to the first connection terminal, one end of the first bridge arm, and one end of the second bridge arm. The other ends of the first bridge arm and the other ends of the second bridge arm are connected to the third connection terminal.

10. The buck-boost converter system according to claim 9, characterized in that, The port circuit group further includes: a second detection interface circuit, which is connected in parallel with the high-voltage power supply and then in parallel with the output capacitor.

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