Logic chip test experiment device

Abstract

The utility model discloses a logic chip test experiment device, which relates to the field of logic chip test experiments and comprises an external input unit, an internal input unit, a relay change-over switch unit, a control instruction conversion unit, a liquid crystal control unit, a test chip unit, an output measurement unit and a power supply unit. According to the logic chip test experiment device of the utility model, the digital source meter is used as an input source and an output measuring instrument; the digital source meter can provide stable voltage or current output to serve as an input signal source of the logic chip, input conditions of the logic chip in an actual working environment can be simulated by accurately controlling the size and change of input signals, so that the performance and stability of the chip under different input conditions are verified, and the output end of the logic chip is connected with the digital source meter. The digital source meter can be used as a high-precision voltmeter or ammeter at the same time to measure the output signal of the chip in real time.

Description

TECHNICAL FIELD

[0001] The utility model relates to the test experiment field of logic chip especially relates to a logic chip test experiment device. BACKGROUND

[0002] With the continuous development of computer technology, the speed and efficiency of digital circuit systems are also constantly improving. As the basic building blocks in digital circuits, the performance and reliability of logic chips are crucial to the stable operation of the entire circuit system. Therefore, strict testing of logic chips to ensure that they meet design requirements is an inevitable requirement in the process of technological development.

[0003] Logic chips play a crucial role in digital circuit systems, as they are responsible for processing data, performing logical operations, and controlling signal flow. If a logic chip fails or does not meet performance standards, it will directly cause the entire circuit system to malfunction or even crash. Therefore, strict testing of logic chips to promptly identify and resolve issues is of great importance to ensuring the stability and reliability of digital circuit systems.

[0004] Static testing and dynamic testing are two commonly used methods for testing logic chips. Static testing detects the input and output signals of the chip to determine whether it is working properly, while dynamic testing provides a series of input signals to the logic chip to test its output results and compares the context to determine the working state of the chip.

[0005] Traditional methods of testing logic chips have problems such as long testing period, high resource consumption, and low testing precision, making it difficult to meet the needs of modern logic chip testing.

[0006] Therefore, it is necessary to propose a logic chip test experiment device to solve the above problems. CONTENT OF THE UTILITY MODEL

[0007] The main purpose of the utility model is to provide a logic chip test experiment device that can effectively solve the problems in the background technology.

[0008] To achieve the above purpose, the technical scheme adopted by the utility model is as follows:

[0009] An experimental device for testing logic chips includes an external input unit, an internal input unit, a relay switching unit, a control command conversion unit, a liquid crystal control unit, a test chip unit, an output measurement unit, and a power supply unit. The external input unit and the internal input unit are electrically connected to the relay switching unit. The relay switching unit is electrically connected to the power supply unit and the control command conversion unit. The control command conversion unit is electrically connected to the liquid crystal control unit. The power supply unit is electrically connected to the test chip unit. The test chip unit is electrically connected to the relay switching unit and the output measurement unit.

[0010] Preferably, the external input unit includes first digital source meter interface terminals IN-A and IN-B, and signal generator interface terminals INPUTA and INPUTB. When the first digital source meter is selected as the signal input, and the first digital source meter is connected to interface terminals IN-A and IN-B, the first digital source meter provides input signals to the first input pin and the second input pin of the test chip unit. When the signal generator is selected as the signal input, and the signal generator is connected to interface terminals INPUTA and INPUTB, the signal generator provides input signals to the first input pin and the second input pin of the test chip unit.

[0011] Preferably, the internal input unit provides input signals to the first and second input pins of the test chip unit within the experimental device's internal circuitry, and switches between high and low levels via relays in the relay switching unit. The relay switching unit is used to coordinate internal relay switching during different experiments, achieving different input and output connection methods. The relay switching unit includes four relay switches: the first relay switch controls the power supply connection of the test chip unit; the second relay switch is used for switching between the external and internal input units; the third relay switch controls the high-low level transition of the first input pin of the test chip unit; and the fourth relay switch controls the high-low level transition of the second input pin of the test chip unit.

[0012] Preferably, the control command conversion unit is used to convert the control commands issued by the LCD control unit into electrical signals that can be recognized by the relay switching unit; the LCD control unit is used as the input / output interface of the test chip unit, and the power supply is connected to different test input devices to achieve different test experimental purposes; the LCD control unit includes internal and external input units, switching of internal input units, high and low level conversion of the first input pin and the second input pin of the test chip unit, and whether the internal power supply of the test chip unit is connected or not.

[0013] Preferably, the test chip unit includes two replaceable IC test sockets. The first socket is used to test 74HC series logic gate chips, and can measure 74HC08 AND gate chips, 74HC04 NOT gate chips, 74HC32 OR gate chips, 74HC00 NAND gate chips, and 74HC86 XS gate chips. The second socket is used to test 74LS series logic gate chips, and can measure 74LS08 AND gate chips, 74LS04 NOT gate chips, 74LS32 OR gate chips, 74LS00 NAND gate chips, and 74LS86 XS gate chips. The replaceable IC test sockets enable the measurement of different chips.

[0014] Preferably, the output measurement unit includes a digital source meter interface terminal OUT-Y. When performing a test gate output characteristic verification experiment, the digital source meter is connected to the interface terminal OUT-Y to measure the voltage signal of the first output pin of the test chip unit. The power supply unit is the power input for the test chip unit. The power supply unit is connected to the second digital source meter interface terminals PWR+ and PWR-. When the second digital source meter is connected to the interface terminals PWR+ and PWR-, it provides power to the test chip unit.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] This logic chip testing experimental setup uses a digital source meter as both the input source and the output measuring instrument. The digital source meter can provide a stable voltage or current output as the input signal source for the logic chip. By precisely controlling the magnitude and changes of the input signal, it can simulate the input conditions of the logic chip in a real working environment, thereby verifying the chip's performance and stability under different input conditions. At the logic chip's output end, the digital source meter can also function as a high-precision voltmeter or ammeter to measure the chip's output signal in real time. This synchronous measurement capability allows testers to accurately capture changes in the chip's output signal, and thus analyze the chip's logic function and electrical performance.

[0017] This logic chip testing experimental device improves the accuracy and reliability of testing by optimizing the test circuit and test process. It also supports the testing of various chips, such as the 74HC series and 74HS series, to meet different testing needs and has strong flexibility and scalability. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall structure of this utility model;

[0019] Figure 2 This is the PCB diagram of this utility model;

[0020] Figure 3 This is a flowchart of the present invention;

[0021] Figure 4 This is the circuit diagram of the two-way power supply switch of this utility model;

[0022] Figure 5 This is the circuit diagram of the status light of this utility model;

[0023] Figure 6 This is the circuit diagram of the test point of this utility model;

[0024] Figure 7 This is the circuit diagram of the chip of this utility model;

[0025] Figure 8 This is the circuit diagram of the I / O interface of this utility model;

[0026] Figure 9 This is the circuit diagram for the high / low level switching of this utility model.

[0027] In the diagram: 1. External input unit; 2. Internal input unit; 3. Relay switching unit; 4. Control command conversion unit; 5. LCD control unit; 6. Test chip unit; 7. Output measurement unit; 8. Power supply unit. Detailed Implementation

[0028] To make the technical means, creative features, objectives and effects of this utility model easier to understand, the present utility model will be further described below in conjunction with specific embodiments.

[0029] like Figures 1-9 As shown, a logic chip testing experimental device includes an external input unit 1, an internal input unit 2, a relay switching unit 3, a control command conversion unit 4, a liquid crystal control unit 5, a test chip unit 6, an output measurement unit 7, and a power supply unit 8. The external input unit 1 and the internal input unit 2 are electrically connected to the relay switching unit 3. The relay switching unit 3 is electrically connected to the power supply unit 8 and the control command conversion unit 4. The control command conversion unit 4 is electrically connected to the liquid crystal control unit 5. The power supply unit 8 is electrically connected to the test chip unit 6. The test chip unit 6 is electrically connected to the relay switching unit 3 and the output measurement unit 7.

[0030] External input unit 1 includes first digital source meter interface terminals IN-A and IN-B, and signal generator interface terminals INPUTA and INPUTB. When the first digital source meter is selected as the signal input, and the first digital source meter is connected to interface terminals IN-A and IN-B, the first digital source meter provides input signals to the first input pin and the second input pin of the test chip unit 6. When the signal generator is selected as the signal input, and the signal generator is connected to interface terminals INPUTA and INPUTB, the signal generator provides input signals to the first input pin and the second input pin of the test chip unit 6.

[0031] Internal input unit 2 provides input signals to the first and second input pins of the test chip unit 6 within the experimental device's internal circuitry. These signals are switched between high and low levels via relays in relay switching unit 3. Relay switching unit 3 is used to switch internal relays for different experiments, achieving different input and output connection methods. Relay switching unit 3 includes four relay switches: the first switch controls the power supply connection of the test chip unit 6; the second switch switches the connection between external input unit 1 and internal input unit 2; the third switch controls the high-low level transition of the first input pin of the test chip unit 6; and the fourth switch controls the high-low level transition of the second input pin of the test chip unit 6.

[0032] The control command conversion unit 4 is used to convert the control commands issued by the LCD control unit 5 into electrical signals that can be recognized by the relay switching unit 3; the LCD control unit 5 is used for the input and output interface of the test chip unit 6, and the power supply is connected to different test input devices to achieve different test experimental purposes; the LCD control unit 5 includes the switching of internal and external input units 1 and internal input units 2, the high and low level conversion of the first input pin and the second input pin of the test chip unit 6, and whether the internal power supply of the test chip unit 6 is connected.

[0033] Test chip unit 6 includes two replaceable IC test sockets. The first is used to test 74HC series logic gate chips, and can measure 74HC08 AND gate, 74HC04 NOT gate, 74HC32 OR gate, 74HC00 NAND gate, and 74HC86 XS gate. The second is used to test 74LS series logic gate chips, and can measure 74LS08 AND gate, 74LS04 NOT gate, 74LS32 OR gate, 74LS00 NAND gate, and 74LS86 XS gate. The replaceable IC test sockets enable the measurement of different chips.

[0034] The output measurement unit 7 includes a digital source meter interface terminal OUT-Y. When performing a test gate output characteristic verification experiment, the digital source meter is connected to the interface terminal OUT-Y to measure the voltage signal of the first output pin of the test chip unit 6. The power supply unit 8 is the power input for the test chip of the test chip unit 6. The power supply unit 8 is connected to the interface terminals PWR+ and PWR- of the second digital source meter. When the second digital source meter is connected to the interface terminals PWR+ and PWR-, it provides power to the test chip unit 6.

[0035] It should be noted that this utility model is a logic chip testing experimental device, and its use is as follows: Figure 3As shown, lift the DIP-14 test socket on the logic chip testing device to unlock it. Use tweezers to remove the sample chip to be tested from the sample box. The chip being tested in this experiment is SN74HC08. Carefully place the sample chip into the test socket. Place SN74HC08 in the left test socket and SN74LS08 in the right test socket. The upper left corner of the test socket is pin 1, corresponding to the solid circle mark on the chip. After the sample is placed, press the locking handle of the DIP-14 test socket to securely hold the chip.

[0036] Connect the red terminal of FORCE_HI of the first digital source meter to PWR+_HC of the logic chip test device, and the black terminal FORCE_LO to PWR-_HC of the logic chip test device. Set the first digital source meter to voltage source and current detection mode, set the voltage to 2V, and limit the current to 1mA.

[0037] Connect the red terminal of FORCE_HI of the second digital source meter to HC_OUT-Y of the logic chip kit, and the black terminal FORCE_LO to PWR-_HC of the logic chip kit. Set the second digital source meter to voltage source, current detection mode, with the voltage set to 0V and the current limited to 20uA.

[0038] Using a BNC connector, connect the INPUTA terminal of the logic chip test device to channel 1 of the signal generator, and the INPUTB terminal to channel 2 of the signal generator. Set channel 1 of the signal generator to DC input and the voltage to VCC voltage, i.e., 2V. Set channel 2 of the signal generator to DC input and the voltage to VCC voltage, i.e., 2V.

[0039] Click on the LCD screen and select the corresponding test circuit. The chip under test in this experiment is the SN74HC08 and a logic gate chip. Select the AND gate circuit on the LCD screen and click the PWRON button on the LCD screen to power the SN74HC08 and logic gate in the experimental circuit. At this time, LED1 on the experimental circuit board lights up, indicating that the power supply to the SN74HC08 and logic gate is connected. Click the external input button on the LCD to input the signal using the source meter. Turn on the output of signal generator channel 1 and channel 2. At this time, the first digital source meter powers the 74HC08 chip, and the signal generator provides input to input channel A and input channel B of the 74HC08.

[0040] Now observe the reading of the second digital source meter. When the current drawn by the second digital source meter is 20uA, the voltage measured by the meter is VOH when VCC=2V and IOH=-20uA. Change the output voltage value of the first digital source meter to 4.5V, and adjust the output voltage of channel 1 and channel 2 of the signal generator to 4.5V. Now observe the reading of the second digital source meter. When the current drawn by the second digital source meter is 20uA, the voltage measured by the meter is VOH when VCC=4.5V and IOH=-20uA. By adjusting the output voltage values ​​of the first digital source meter and the signal generator, verify the change of the high-level output voltage VOH under different input voltages; similarly, the change of the low-level output voltage VOL can also be verified.

[0041] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of this utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection of this utility model is defined by the appended claims and their equivalents.

Claims

1. A logic chip testing experimental device, comprising an external input unit (1), an internal input unit (2), a relay switching unit (3), a control command conversion unit (4), a liquid crystal control unit (5), a test chip unit (6), an output measurement unit (7), and a power supply unit (8), characterized in that: The external input unit (1) and internal input unit (2) are electrically connected to the relay switching unit (3). The relay switching unit (3) is electrically connected to the power supply unit (8) and the control command conversion unit (4). The control command conversion unit (4) is electrically connected to the liquid crystal control unit (5). The power supply unit (8) is electrically connected to the test chip unit (6). The test chip unit (6) is electrically connected to the relay switching unit (3) and the output measurement unit (7).

2. The logic chip testing experimental device according to claim 1, characterized in that: The external input unit (1) includes a first digital source meter interface terminal IN-A, IN-B and a signal generator interface terminal INPUTA, INPUTB. When the first digital source meter is selected as the signal input, the first digital source meter is connected to the interface terminal IN-A, IN-B, and the first digital source meter provides input signals to the first input pin and the second input pin of the test chip unit (6). When the signal generator is selected as the signal input, the signal generator is connected to the interface terminal INPUTA, INPUTB, and the signal generator provides input signals to the first input pin and the second input pin of the test chip unit (6).

3. The logic chip testing experimental device according to claim 1, characterized in that: The internal input unit (2) is used to provide input signals to the first input pin and the second input pin of the test chip unit (6) in the internal circuit of the experimental device. The high and low levels are switched by the relay of the relay switching unit (3). The relay switching unit (3) is used to switch the internal relays in different experiments to achieve different input and output connection methods. The relay switching unit (3) includes 4 relay switching channels. The first relay switching channel controls the power supply connection of the test chip unit (6). The second relay switching channel is used to switch the external input unit (1) and the internal input unit (2). The third relay switching channel is used to control the high and low level conversion of the first input pin of the test chip unit (6). The fourth relay switching channel is used to control the high and low level conversion of the second input pin of the test chip unit (6).

4. The logic chip testing experimental device according to claim 1, characterized in that: The control command conversion unit (4) is used to convert the control commands issued by the liquid crystal control unit (5) into electrical signals that can be recognized by the relay switching unit (3); the liquid crystal control unit (5) is used to perform the input and output interface of the test chip unit (6), and the power supply is connected to different test input devices to achieve different test experimental purposes; the liquid crystal control unit (5) includes the switching of internal external input unit (1) and internal input unit (2), the high and low level conversion of the first input pin and the second input pin of the test chip unit (6), and whether the internal power supply of the test chip unit (6) is connected.

5. The logic chip testing experimental device according to claim 1, characterized in that: The test chip unit (6) includes two replaceable IC test sockets. The first is used to test 74HC series logic gate chips, and can measure 74HC08 AND gate chip, 74HC04 NOT gate chip, 74HC32 OR gate chip, 74HC00 NAND gate chip, and 74HC86 XS gate chip. The second is used to test 74LS series logic gate chips, and can measure 74LS08 AND gate chip, 74LS04 NOT gate chip, 74LS32 OR gate chip, 74LS00 NAND gate chip, and 74LS86 XS gate chip. Different chips can be measured using the replaceable IC test sockets.

6. The logic chip testing experimental device according to claim 1, characterized in that: The output measurement unit (7) includes a digital source meter interface terminal OUT-Y. When the gate output characteristic verification experiment is performed, the digital source meter is connected to the interface terminal OUT-Y to measure the voltage signal of the first output pin of the test chip unit (6). The power supply unit (8) is the power input for the test chip unit (6). The power supply unit (8) is connected to the second digital source meter interface terminals PWR+ and PWR-. When the second digital source meter is connected to the interface terminals PWR+ and PWR-, the second digital source meter is used to provide power to the test chip unit (6).

Images