PCB structure for improving impedance of high-speed surface-mounted connector
By symmetrically setting signal pins and ground pins in the PCB structure and adopting a symmetrical return ground via design, the impedance discontinuity problem caused by the impedance inductance of the fan-out via of the surface mount connector is solved, thereby improving signal quality.
Patent Information
- Application Number
- CN202423016363.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2026-01-09
- Estimated Expiration
- 2034-12-06
AI Technical Summary
In high-speed signal transmission, the fan-out via impedance of surface-mount connectors exhibits inductive impedance, leading to impedance discontinuities and affecting signal quality.
In the PCB structure, the signal pins and ground pins of the surface mount connector are symmetrically arranged. Through the symmetrical return ground via design, the return ground path is optimized, the impedance fluctuation in the signal channel is reduced, and an electromagnetic field wrapping effect similar to that of a Faraday cage is formed.
It effectively reduces impedance fluctuations in the signal channel, reduces signal reflection, improves signal transmission quality, and enables more stable and efficient transmission of high-speed signals.
Smart Images
Figure CN223786233U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of PCB technology, and more specifically, to a PCB structure for improving the impedance of high-speed surface mount connectors. Background Technology
[0002] Printed circuit boards (PCBs) are core components of electronic products, housing electronic components and providing pathways for signal transmission. In high-speed signal transmission, high-speed signal connectors, as a critical part of the signal path, have performance and PCB optimization that are crucial to signal quality. To minimize the impact on signal transmission, connector pins need to be specifically optimized to increase their transparency to the signal. Surface-mount connectors, due to their characteristic that their pins only connect to the surface copper layer of the PCB, are often used for high-speed signal interconnection. However, to connect surface-mount connectors to inner layer traces, vias must be drilled after the surface pins exit to change the layer.
[0003] Impedance continuity is a crucial parameter for evaluating signal channel performance, directly impacting signal reflection. To minimize signal reflection, impedance fluctuations must be reduced, thus optimizing impedance continuity. Return loss, as an important indicator of impedance continuity from an S-parameter perspective, is also key to assessing signal channel performance.
[0004] In traditional designs, the primary focus is on the return ground of the signal traces on the surface-mount connector. However, as the board thickness increases, the impedance of the connector fan-out vias gradually becomes inductive, resulting in an overall high impedance at this point. This impedance discontinuity can severely affect signal quality.
[0005] The above shortcomings need to be improved. Summary of the Invention
[0006] To address or mitigate the problem of inductive impedance in surface-mount connector fan-out vias, which leads to impedance discontinuities and affects high-speed signal transmission, this invention provides a PCB structure that improves the impedance of high-speed surface-mount connectors.
[0007] The technical solution of this utility model is as follows:
[0008] A PCB structure for improving the impedance of high-speed surface-mount connectors includes a PCB board on which surface-mount connectors are disposed. The surface-mount connectors are symmetrical about both a horizontal and a vertical centerline. Each surface-mount connector includes a first signal pin and a second signal pin. The first signal pin is connected to a first signal via via a first fan-out trace, and the second signal pin is connected to a second signal via a second fan-out trace.
[0009] The first signal pin and the second signal pin are respectively provided with a first ground pin and a second ground pin on both sides. The two ends of the first ground pin are respectively connected to the first ground via through the third fan-out line. The two first ground vias are symmetrical about the horizontal center line. The two ends of the second ground pin are respectively connected to the second ground via through the fourth fan-out line. The two second ground vias are symmetrical about the horizontal center line. The first ground via and the second ground via are symmetrical about the vertical center line.
[0010] Furthermore, the center distance between the first signal via and the second signal via is equal to the center distance between the first signal pin and the second signal pin.
[0011] Furthermore, the lengths of the first fan-out trace and the second fan-out trace are equal, and the lengths of the first fan-out trace and the second fan-out trace are no greater than 6 mil.
[0012] Furthermore, the first signal via and the second signal via are disposed in the anti-pad area, and the edges of the first ground via and the second ground via are close to the outer edge of the anti-pad area.
[0013] Furthermore, the center distance between the first ground via and the first signal via is equal to the center distance between the second ground via and the second signal via, and the center distance between the first ground via and the first signal via is 20mil to 30mil.
[0014] Furthermore, the line width of the first fan-out routing line is equal to the line width of the second fan-out routing line, the line width of the third fan-out routing line is equal to the line width of the fourth fan-out routing line, and the line width of the first fan-out routing line is smaller than the line width of the third fan-out routing line.
[0015] Furthermore, the width of the third outgoing cable is not greater than the width of the first ground pin.
[0016] Furthermore, the line width of the third outgoing line is 10mil to 13.8mil.
[0017] Furthermore, the centers of the first signal via, the second signal via, the first ground via, and the second ground via, all located on the same side of the horizontal centerline, are simultaneously on the horizontal line, which is parallel to the horizontal centerline.
[0018] Furthermore, the angle between the first ground pin and the third outgoing cable is equal to the angle between the second ground pin and the fourth outgoing cable, and the angle between the first ground pin and the third outgoing cable is 120° to 180°.
[0019] Furthermore, a transition arc is provided at the angle between the first ground pin and the third outgoing cable, and a transition arc is also provided at the angle between the second ground pin and the fourth outgoing cable.
[0020] According to the above-described solution, the beneficial effects of this utility model are as follows: The ground pin of this utility model has symmetrically arranged return ground vias in both the outgoing and reverse directions, increasing the return ground path and optimizing the distribution of the return ground vias. This effectively reduces impedance fluctuations in the signal channel, reduces signal reflection, improves signal transmission quality, and enables high-speed signals to be transmitted more stably and efficiently. Furthermore, the symmetrical addition of return ground vias in the reverse direction of the ground pin can better enclose the signal electromagnetic field, creating an effect similar to a Faraday cage. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0022] Figure 1 This is a schematic diagram of the existing technology;
[0023] Figure 2 This is a schematic diagram of the structure of this utility model;
[0024] Figure 3 This is a schematic diagram showing the structural dimensions of this utility model;
[0025] Figure 4 This is a comparison diagram of the impedance of the present invention and existing technologies;
[0026] Figure 5 This is a comparison chart of the return loss between the present invention and the prior art.
[0027] In the figure, the following labels are used: 1. PCB board; 2. Surface mount connector; 201. First signal pin; 202. Second signal pin; 3. First sector trace; 4. Second sector trace; 5. First signal via; 6. Second signal via; 7. First ground pin; 8. Second ground pin; 9. Third sector trace; 10. Fourth sector trace; 11. First ground via; 12. Second ground via; 13. Horizontal center line; 14. Vertical center line; 15. Horizontal line; 16. Anti-soldering pad area. Detailed Implementation
[0028] To make the technical problem to be solved, the technical solution, and the beneficial effects of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this utility model and are not intended to limit this utility model.
[0029] It should be noted that when a component is referred to as "fixed," "set," or "connected" to another component, it may be located directly or indirectly on that other component. The terms "upper," "lower," "left," "right," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or position based on the accompanying drawings, and are for ease of description only, and should not be construed as limiting the technical solution. The terms "first," "second," etc., are used for ease of description only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features. "Many" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.
[0030] like Figure 2 As shown in the figure, a PCB structure for improving the impedance of a high-speed surface-mount connector according to one embodiment of the present invention includes a PCB board 1, on which a surface-mount connector 2 is disposed. The surface-mount connector 2 is symmetrical about both the horizontal center line 13 and the vertical center line 14. The surface-mount connector 2 includes a first signal pin 201 and a second signal pin 202. The first signal pin 201 is connected to a first signal via 5 through a first fan-out trace 3. The second signal pin 202 is connected to a second signal via 6 through a second fan-out trace 4. A first ground pin 7 and a second ground pin 8 are respectively disposed on both sides of the first signal pin 201 and the second signal pin 202. The two ends of the first ground pin 7 are respectively connected to a first ground via 11 through a third fan-out trace 9. The two first ground vias 11 are symmetrical about the horizontal center line 13. The two ends of the second ground pin 8 are respectively connected to a second ground via 12 through a fourth fan-out trace 10. The two second ground vias 12 are symmetrical about the horizontal center line 13. The first ground via 11 and the second ground via 12 are symmetrical about the vertical center line 14.
[0031] In this embodiment, the surface-mount connector 2 is symmetrically distributed, with the two ends of the first signal pin 201 and the two ends of the second signal pin 202 symmetrically arranged about the horizontal center line 13, and the first signal pin 201 and the second signal pin 202 symmetrically arranged about the vertical center line 14. This layout helps reduce interference during signal transmission and ensures signal quality. The first signal pin 201 and the second signal pin 202 are connected to signal vias via independent fan-out traces to ensure stable signal transmission. Simultaneously, by providing the first ground pin 7 and the second ground pin 8, and ground vias at both ends of each, a stable return path is provided for the signal. Specifically, return ground vias are symmetrically arranged on the ground pins in the direction of the outgoing trace and in the opposite direction, increasing the return ground path and optimizing the distribution of return ground vias. This effectively reduces impedance fluctuations in the signal channel, reduces signal reflection, improves signal transmission quality, and enables more stable and efficient transmission of high-speed signals. In addition, adding return ground vias symmetrically in the opposite direction of the outgoing line can better envelop the signal electromagnetic field, creating an effect similar to a Faraday cage.
[0032] like Figure 2 and Figure 3 As shown, in a preferred embodiment, the center distance S1 between the first signal via 5 and the second signal via 6 is equal to the center distance S0 between the first signal pin 201 and the second signal pin 202. In this embodiment, the center distance S1 between the signal vias and the center distance S0 between the signal pins are equal, which can be set via shortcut keys in the design software, thus improving design efficiency. Specifically, taking the following surface-mount connector as an example, the length and width dimensions of the signal pins are 71.7mil × 13.8mil, and the center distance S0 between adjacent signal pins is 31.5mil, then the center distance S1 between adjacent vias is 31.5mil.
[0033] like Figure 2 and Figure 3 As shown, in a preferred embodiment, the lengths of the first outgoing line 3 and the second outgoing line 4 are equal, and the length L of the first outgoing line 3 and the second outgoing line 4 is no greater than 6mil.
[0034] The first signal via 5 and the second signal via 6 are located in the anti-pad area 16.
[0035] In this embodiment, the first signal via 5 and the second signal via 6 fan out. To ensure processing reliability, the spacing between the vias and the pins meets the process spacing requirements, facilitating manufacturing. Furthermore, the length L is reduced. On one hand, the first fan-out trace 3 and the second fan-out trace 4 are located in the via anti-pad area 16, without a reference plane, resulting in higher impedance. A smaller L can reduce the impedance discontinuity length. On the other hand, using a conventional via design improves efficiency without requiring changes to existing manufacturing processes, thus saving costs.
[0036] like Figure 2 and Figure 3 As shown, in a preferred embodiment, the edges of the first ground via 11 and the second ground via 12 are close to the outer edge of the antipad area 16.
[0037] Specifically, the center distance S2 between the first ground via 11 and the first signal via 5 is equal to the center distance S3 between the second ground via 12 and the second signal via 6, and the center distance S2 between the first ground via 11 and the first signal via 5 is 20mil to 30mil.
[0038] In this embodiment, the spacing between adjacent ground vias and signal vias is appropriate. On the one hand, it meets the process spacing requirements and facilitates manufacturing; on the other hand, the ground vias are located at the outer edge of the anti-pad area 16, minimizing the spacing between adjacent ground vias and signal vias to ensure signal return flow and thus guarantee signal quality. If the spacing is too large, the impedance optimization effect will be insignificant.
[0039] like Figure 2 and Figure 3 As shown, in a preferred embodiment, the line width W1 of the first outgoing line 3 is equal to the line width W2 of the second outgoing line 4, the line width W3 of the third outgoing line 9 is equal to the line width W4 of the fourth outgoing line 10, and the line width W1 of the first outgoing line 3 is less than the line width W3 of the third outgoing line 9.
[0040] The line width W3 of the third outgoing line 9 is 10mil to 13.8mil.
[0041] The centers of the first signal via 5, the second signal via 6, the first ground via 11, and the second ground via 12, located on the same side of the horizontal centerline 13, are simultaneously on the horizontal line 15, which is parallel to the horizontal centerline 13.
[0042] In this embodiment, the main function of the ground pin is to allow current to pass through. To ensure sufficient current carrying capacity, the line width W3 of the third trace is larger than the line width W1 of the first trace. At the same time, considering the width of the ground pin, the line widths of the third fan-out trace 9 and the fourth fan-out trace 10 do not exceed the width of the ground pin.
[0043] like Figure 2 and Figure 3 As shown, in a preferred embodiment, the included angle ∠1 between the first ground pin 7 and the third outgoing line 9 is equal to the included angle ∠2 between the second ground pin 8 and the fourth outgoing line 10, and the included angle ∠1 between the first ground pin 7 and the third outgoing line 9 is 120° to 180°.
[0044] A transition arc is provided at the angle ∠1 between the first ground pin 7 and the third outgoing line 9, and a transition arc is also provided at the angle ∠2 between the second ground pin 8 and the fourth outgoing line 10.
[0045] Signals experience reflection and coupling during transmission. Right-angle or acute-angle traces can cause abrupt changes in signal impedance, leading to signal reflections and resulting in waveform distortion, delays, and interference with adjacent signals, thus affecting circuit performance and stability. In this embodiment, obtuse angles and transition arcs can improve signal quality.
[0046] like Figure 4 As shown, a high-speed signal surface-mount connector requires a characteristic impedance of 100 ohms for its high-speed differential signal channel. Figure 1 For traditional solutions, Figure 2 This is the solution proposed in this application. Traditional solution ( Figure 4 The maximum impedance of the (dashed line) is 107.3 ohms, and the impedance deviation is 7.3 ohms; the scheme of this application ( Figure 4 The maximum impedance of the solid line is 104.1 ohms, and the impedance deviation is reduced to 4.1 ohms, which is an improvement of 3.2 ohms compared with the traditional method.
[0047] like Figure 5 As shown, within the frequency band of 0–15 GHz, the scheme of this application ( Figure 5 The pullback rate of the solid line is higher than that of the traditional solution. Figure 5 The (middle dashed line) has been optimized by 1dB to 10.5dB.
[0048] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.
Claims
1. A PCB structure for improving the impedance of high-speed surface-mount connectors, characterized in that, The system includes a PCB board with surface-mount connectors symmetrical about both a horizontal and a vertical centerline. Each surface-mount connector includes a first signal pin and a second signal pin. The first signal pin is connected to a first signal via via a first outgoing trace, and the second signal pin is connected to a second signal via via a second outgoing trace. The first signal pin and the second signal pin are respectively provided with a first ground pin and a second ground pin on both sides. The two ends of the first ground pin are respectively connected to the first ground via through the third fan-out line. The two first ground vias are symmetrical about the horizontal center line. The two ends of the second ground pin are respectively connected to the second ground via through the fourth fan-out line. The two second ground vias are symmetrical about the horizontal center line. The first ground via and the second ground via are symmetrical about the vertical center line.
2. The PCB structure for improving the impedance of high-speed surface-mount connectors according to claim 1, characterized in that, The center distance between the first signal via and the second signal via is equal to the center distance between the first signal pin and the second signal pin.
3. The PCB structure for improving the impedance of high-speed surface-mount connectors according to claim 1, characterized in that, The lengths of the first and second fan-out traces are equal, and the lengths of the first and second fan-out traces are no greater than 6 mil.
4. A PCB structure for improving the impedance of a high-speed surface-mount connector as described in claim 1, characterized in that, The first signal via and the second signal via are disposed in the anti-pad area, and the edges of the first ground via and the second ground via are close to the outer edge of the anti-pad area.
5. A PCB structure for improving the impedance of a high-speed surface-mount connector according to claim 4, characterized in that, The center distance between the first ground via and the first signal via is equal to the center distance between the second ground via and the second signal via, and the center distance between the first ground via and the first signal via is 20mil to 30mil.
6. A PCB structure for improving the impedance of a high-speed surface-mount connector as described in claim 1, characterized in that, The line width of the first fan-out routing line is equal to the line width of the second fan-out routing line, the line width of the third fan-out routing line is equal to the line width of the fourth fan-out routing line, and the line width of the first fan-out routing line is smaller than the line width of the third fan-out routing line.
7. A PCB structure for improving the impedance of a high-speed surface-mount connector according to claim 6, characterized in that, The width of the third outgoing cable is not greater than the width of the first ground pin.
8. A PCB structure for improving the impedance of a high-speed surface-mount connector as described in claim 1, characterized in that, The centers of the first signal via, the second signal via, the first ground via, and the second ground via, located on the same side of the horizontal centerline, are all on the horizontal line, which is parallel to the horizontal centerline.
9. A PCB structure for improving the impedance of a high-speed surface-mount connector according to claim 1, characterized in that, The angle between the first ground pin and the third outgoing cable is equal to the angle between the second ground pin and the fourth outgoing cable, and the angle between the first ground pin and the third outgoing cable is 120° to 180°.
10. A PCB structure for improving the impedance of a high-speed surface-mount connector according to claim 9, characterized in that, A transition arc is provided at the angle between the first ground pin and the third outgoing cable, and a transition arc is also provided at the angle between the second ground pin and the fourth outgoing cable.