Package structure

By introducing hollow barrier structures and venting holes into the semiconductor packaging structure, the problem of substrate and component damage caused by heat dissipation layer sputtering is solved, and the performance and stability of the packaging structure are improved.

CN223786536UActive Publication Date: 2026-01-09STATS CHIPPAC SEMICON (JIANGYIN) CO LTD
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Patent Information

Application Number
CN202423207295.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-24
Publication Date
2026-01-09
Estimated Expiration
2034-12-24

AI Technical Summary

Technical Problem

In existing semiconductor packaging structures, the heat dissipation layer is prone to sputtering after melting during high-temperature processes, which can damage the substrate and components and affect the performance of the packaging structure.

Method used

A hollow barrier structure is used to isolate the heat dissipation layer from the substrate on the side of the chip, preventing the heat dissipation layer material from sputtering, and the air pressure is balanced through the exhaust holes to reduce the probability of damage.

Benefits of technology

It effectively blocks the sputtering of heat dissipation layer material, reduces the probability of damage to the substrate and components, and improves the performance and stability of the packaging structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a packaging structure. The packaging structure comprises a substrate; the heat dissipation cover is located on the substrate, and a cavity is defined by the heat dissipation cover and the substrate; the first chip is located in the cavity, and the first chip is welded to the substrate and electrically connected with the substrate; the heat dissipation layer is located between the top of the first chip and the heat dissipation cover; the blocking structure is located on the inner wall of the cavity, a containing space is defined by the blocking structure and the heat dissipation cover, at least the heat dissipation layer is contained in the containing space, and the blocking structure is of a hollow structure; in the embodiment of the invention, the blocking structure at least covers the side wall of the heat dissipation layer, so that the blocking structure can effectively block the material of the heat dissipation layer from sputtering towards the substrate due to melting in a high-temperature process, the probability that the substrate or other components on the substrate are damaged is correspondingly reduced, and the performance of the packaging structure is further improved.
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Description

TECHNICAL FIELD

[0001] The embodiment of the utility model relates to the technical field of semiconductor packaging, and particularly relates to a packaging structure. BACKGROUND

[0002] With the development of technology, the chip operation speed in the semiconductor packaging structure has been significantly improved, however, such fast operation also leads to more heat generated by the chip in the working process. These increased heat may reduce the efficiency of the chip, and even cause the chip to be damaged, thereby affecting the performance of the semiconductor packaging structure.

[0003] In order to solve the heat dissipation problem of the semiconductor packaging structure, the mounting of the heat dissipation cover becomes an effective solution. The heat dissipation cover mainly increases the heat dissipation area to improve the heat dissipation efficiency, thereby protecting the chip from overheating.

[0004] However, although the mounting of the heat dissipation cover alleviates the heat dissipation problem to a certain extent, the performance of the semiconductor packaging structure still faces challenges. UTILITY MODEL CONTENT

[0005] The problem solved by the embodiment of the utility model is to provide a packaging structure, which is beneficial to improve the performance of the packaging structure.

[0006] In order to solve the above problems, the embodiment of the utility model provides a packaging structure, which comprises: a substrate; a heat dissipation cover located on the substrate, the heat dissipation cover and the substrate form a cavity; a first chip located in the cavity, the first chip is welded on the substrate and electrically connected with the substrate; a heat dissipation layer located between the top of the first chip and the heat dissipation cover; a blocking structure located on the inner wall of the cavity and surrounding the heat dissipation cover to form a containing space, the containing space at least contains the heat dissipation layer, and the blocking structure is a hollow structure.

[0007] Optionally, the blocking structure covers the sidewall of the heat dissipation layer, or the blocking structure covers the sidewall of the heat dissipation layer and also covers part of the sidewall of the first chip, or the blocking structure covers part of the sidewall of the first chip.

[0008] Optionally, in the direction parallel to the normal direction of the substrate, the ratio of the wall thickness of the blocking structure to the total height of the blocking structure is less than or equal to 1:4.

[0009] Optionally, the blocking structure is an elastic structure.

[0010] Optionally, the material of the blocking structure includes rubber or silicone.

[0011] Optionally, the material of the blocking structure includes fluororubber, silicone rubber, fluorosilicone rubber, silicon nitride rubber or methyl vinyl silicone rubber.

[0012] Optionally, the heat dissipation layer comprises one or any multi-layered stack of an indium layer, an indium-silver alloy layer, a silver layer, a tin layer, a tin-silver alloy layer and a tin-lead alloy layer.

[0013] Optionally, the heat dissipation cover comprises a top cover plate and a side plate connected to the top cover plate, the side plate is located between the top cover plate and the substrate and on the side of the top cover plate, the blocking structure satisfies one or both of the following conditions: the blocking structure is in contact with the top cover plate, and the packaging structure further comprises a first exhaust hole longitudinally penetrating the top cover plate and a top wall of the blocking structure in contact with the top cover plate; the blocking structure is in contact with the side plate, and the packaging structure further comprises a second exhaust hole transversely penetrating the side plate and a side wall of the blocking structure in contact with the side plate.

[0014] Optionally, the heat dissipation cover is of an integrated structure.

[0015] Optionally, the packaging structure further comprises a bonding layer between the heat dissipation cover and the blocking structure.

[0016] Optionally, the blocking structure is of an annular structure surrounding the heat dissipation layer.

[0017] Optionally, the packaging structure further comprises a component located in the cavity, the component is welded to the substrate of the first chip side and electrically connected to the substrate, and the blocking structure is located above the top of the component.

[0018] Optionally, the component comprises one or both of a passive element and a second chip.

[0019] Compared with the prior art, the technical scheme of the embodiment of the utility model has the following advantages:

[0020] The embodiment of the utility model provides a packaging structure, comprising: a substrate; a heat dissipation cover located on the substrate, the heat dissipation cover and the substrate form a cavity; a first chip located in the cavity, the first chip is welded to the substrate and electrically connected to the substrate; a heat dissipation layer located between the top of the first chip and the heat dissipation cover; a blocking structure located on the inner wall of the cavity and surrounded by the heat dissipation cover to form a containing space, the containing space at least contains the heat dissipation layer, and the blocking structure is a hollow structure; in this embodiment, the blocking structure isolates the heat dissipation layer and the substrate of the first chip side, so that the blocking structure can effectively block the material of the heat dissipation layer from sputtering to the substrate direction due to melting in high-temperature processing, correspondingly reducing the probability of damage to the substrate or other components on the substrate, and improving the performance of the packaging structure.

[0021] Optionally, the heat dissipation cover comprises a top cover plate and a side plate connected to the top cover plate, the side plate is located between the top cover plate and the base plate and is located on the side of the top cover plate, the blocking structure meets one or both of the following conditions: the blocking structure is in contact with the top cover plate, and the packaging structure further comprises: a first exhaust hole longitudinally penetrating the top cover plate and the top wall of the blocking structure in contact with the top cover plate; the blocking structure is in contact with the side plate, and the packaging structure further comprises: a second exhaust hole transversely penetrating the side plate and the side wall of the blocking structure in contact with the side plate; in this embodiment, since the first exhaust hole longitudinally penetrates the top cover plate and the top wall of the blocking structure in contact with the top cover plate, and the second exhaust hole transversely penetrates the side plate and the side wall of the blocking structure in contact with the side plate, through one or both of the first exhaust hole and the second exhaust hole, the internal and external air pressures of the packaging structure are balanced, thereby reducing the probability of damage to the packaging structure due to too high internal air pressure of the packaging structure; in addition, since the first exhaust hole and the second exhaust hole are only connected to the internal space of the blocking structure, the probability of internal pollution of the packaging structure by external pollutants of the packaging structure is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is a structural schematic view of a packaging structure;

[0023] Figure 2 is a structural schematic view of an embodiment of the packaging structure. DETAILED DESCRIPTION

[0024] At present, the performance of the packaging structure still needs to be improved. In combination with a structural schematic view of a packaging structure, the reason why the performance of the packaging structure needs to be improved is analyzed. Figure 1 is a structural schematic view of a packaging structure.

[0025] Reference Figure 1 , the packaging structure comprises: a base plate 10; a heat dissipation cover 11, the heat dissipation cover 11 comprises a top cover plate 12 and a side plate 13 connected to the top cover plate 12, the side plate 13 is located between the top cover plate 12 and the base plate 10 and is located on the side of the top cover plate 12, the heat dissipation cover 11 and the base plate 10 form a cavity 14; a chip 15 located in the cavity 14, the chip 15 is welded on the base plate 10 and is electrically connected with the base plate 10; a heat dissipation layer 16 located between the top of the chip 15 and the heat dissipation cover 11; a metal plating layer 18 located between the heat dissipation layer 16 and the chip 15; a component 17 located in the cavity 14, the component 17 is welded on the base plate 10 on the side of the chip 15 and is electrically connected with the base plate 10.

[0026] It is found through research that the heat dissipation layer 16 usually adopts an indium layer in the packaging structure. However, during the reflow soldering process (for example, during welding of the heat dissipation cover 11 and the substrate 10, during planting of solder balls on the back of the substrate 10, and during subsequent welding of the solder balls on the back of the substrate 10 in the packaging structure to a printed circuit board, high-temperature reflow is required), because the process temperature of the process is relatively high and the melting point of the heat dissipation layer 16 is relatively low, the heat dissipation layer 16 is easily melted and sputtered to the side, and when the chip 15 side has components 17, the components 17 are correspondingly easily damaged, thereby affecting the performance of the packaging structure.

[0027] To solve the technical problem, the packaging structure provided in the embodiments of the present application comprises: a substrate; a heat dissipation cover located on the substrate, the heat dissipation cover and the substrate surrounding a cavity; a first chip located in the cavity, the first chip being welded on the substrate and being electrically connected with the substrate; a heat dissipation layer located between the top of the first chip and the heat dissipation cover; and a blocking structure located on the inner wall of the cavity and surrounding a containing space with the heat dissipation cover, the containing space at least containing the heat dissipation layer, and the blocking structure being a hollow structure.

[0028] In the scheme disclosed in the embodiments of the present application, the blocking structure isolates the heat dissipation layer from the substrate on the side of the first chip, so that the blocking structure can effectively block the material of the heat dissipation layer from being sputtered to the substrate direction due to melting in the high-temperature process, correspondingly reducing the probability of damage to the substrate or other components on the substrate, and thereby improving the performance of the packaging structure.

[0029] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the drawings.

[0030] Figure 2 is a structural schematic diagram of an embodiment of the packaging structure of the present application.

[0031] Reference Figure 2 The packaging structure comprises: a substrate 100; a heat dissipation cover 101 located on the substrate 100, the heat dissipation cover 101 and the substrate 100 surrounding a cavity 102; a first chip 103 located in the cavity 102, the first chip 103 being welded on the substrate 100 and being electrically connected with the substrate 100; a heat dissipation layer 104 located between the top of the first chip 103 and the heat dissipation cover 101; and a blocking structure 106 located on the inner wall of the cavity 102 and surrounding a containing space (not indicated) with the heat dissipation cover 101, the containing space at least containing the heat dissipation layer 104, and the blocking structure 106 being a hollow structure.

[0032] The substrate 100 serves as a package carrier to provide support for the first chip 103 and to provide an electrical connection path for the first chip 103 to external circuits. The substrate 100 can include a package substrate, an interposer, or a printed circuit board (PCB). As an example, the substrate 100 is a package substrate.

[0033] The heat dissipation cover 101 is used to dissipate heat of the package structure and to protect the first chip 103 inside the cavity 102.

[0034] Specifically, the first chip 103 has a certain power consumption when working, and thus generates corresponding heat. The heat dissipation cover 101 is used to conduct the heat generated by the first chip 103 during work to the outside, so as to avoid damage to the first chip 103 due to the accumulation of heat during work, which helps to prolong the working stability and life of the package structure.

[0035] In the embodiment, the heat dissipation cover 101 includes a top cover plate 107 and a side plate 108 connected to the top cover plate 107. The side plate 108 is located between the top cover plate 107 and the substrate 100 and is located on the side of the top cover plate 107.

[0036] The side plate 108 is used to support the top cover plate 107, and the bottom of the side plate 108 is fixed on the substrate 100. Specifically, the heat dissipation cover 101 can be welded on the substrate 100, or the heat dissipation cover 101 can be fixed on the substrate 100 by heat-conducting glue.

[0037] In the embodiment, the side plate 108 is located on the side of the top cover plate 107, that is, the side plate 108 surrounds the top cover plate 107, thereby improving the sealing performance of the cavity 102.

[0038] The top cover plate 107 is used to dissipate the heat generated by the first chip 103 during work.

[0039] In the embodiment, the heat dissipation cover 101 is an integrated structure.

[0040] Specifically, the integrated structure of the heat dissipation cover 101 means that the top cover plate 107 and the side plate 108 are formed in the same step, which is beneficial to simplify the process steps and reduce production costs.

[0041] It should be noted that the heat dissipation cover 101 is an integrated structure, which is beneficial to reduce the joints or connection points, thereby reducing the cost, and at the same time can improve the mechanical strength and durability of the heat dissipation cover 101.

[0042] In other embodiments, according to actual process requirements, the heat dissipation cover can also not be an integrated structure.

[0043] In this embodiment, the heat dissipation cover 101 is a metal cover.

[0044] It should be noted that the metal cover has a good thermal conductivity, which is conducive to the rapid conduction of heat away from the packaging structure, thereby effectively improving the heat dissipation efficiency of the packaging structure. In addition, the metal cover can be formed by various processing techniques (such as stamping process), which is convenient for mass production, thus making it easier to obtain a heat dissipation cover 101 of good quality.

[0045] In other embodiments, depending on actual process requirements, the heat sink can also be other heat sinks with good heat dissipation performance.

[0046] In this embodiment, the packaging structure further includes: a component 105 located inside the cavity 102, the component 105 being soldered to the substrate 100 on the side of the first chip 103 and electrically connected to the substrate 100.

[0047] It should be noted that components are a general term for elements and devices. Components can be either passive elements (i.e., passive components) or active elements (e.g., chips).

[0048] The cavity 102 is used to accommodate the first chip 103 and the components 105.

[0049] In this embodiment, the first chip 103 is a chip with a specific function. Specifically, the type of the first chip 103 is determined according to the actual functional needs or application scenarios. For example, the first chip 103 includes one or more of the following: radio frequency chip, memory chip, ASIC (Application-Specific Integrated Circuit) chip, CPU (Central Processing Unit) chip, GPU (Graphics Processing Unit) chip, and FPGA (Field-Programmable Gate Array) chip.

[0050] In other embodiments, the first chip may be other chips, depending on the actual process requirements.

[0051] In this embodiment, the packaging structure further includes a conductive bump 113, located between the first chip 103 and the substrate 100, and electrically connected to the first chip 103 and the substrate 100.

[0052] The conductive bump 113 is used for thermal conduction of the first chip 103 and electrical connection between the first chip 103 and the substrate 100.

[0053] The conductive bump 113 may be made of materials including tin, copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, or tantalum nitride. As an example, the conductive bump 113 may be made of tin.

[0054] In other embodiments, the first chip may also be fixed to the substrate in other ways, such as by solder (e.g., solder paste) or by an adhesive layer.

[0055] The heat dissipation layer 104 is used to dissipate heat from the first chip 103 during its operation, thereby transferring the heat generated by the first chip 103 to the heat dissipation cover 101.

[0056] The cross-section of the heat dissipation layer 104 is adapted to the cross-section of the first chip 103 to achieve a tight fit between the heat dissipation layer 104 and the first chip 103, thereby improving the heat dissipation effect of the heat dissipation layer 104 on the first chip 103.

[0057] The heat dissipation layer 104 comprises one or more layers selected from the following: an indium layer, an indium-silver alloy layer, a silver layer, a tin layer, a tin-silver alloy layer, and a tin-lead alloy layer. As an example, the heat dissipation layer 104 is an indium layer.

[0058] It should be noted that the indium layer, indium-silver alloy layer, silver layer, tin layer, tin-silver alloy layer and tin-lead alloy layer have excellent thermal conductivity, which can quickly conduct the heat generated by the first chip 103 during operation to the outside, thus improving the heat dissipation effect.

[0059] Component 105 includes one or both of a passive component and a second chip. As an example, component 105 is a passive component.

[0060] It should be noted that passive components are electronic components that can exhibit their characteristics without the need for an external power supply. They mainly include one or more of the following: capacitors, resistors, inductors, filters, and couplers.

[0061] It should also be noted that the second chip is a chip with a specific function. Specifically, the type of the second chip depends on the actual functional requirements or application scenario. For example, the second chip may include one or more of the following: radio frequency chip, memory chip, ASIC chip, CPU chip, GPU chip, and FPGA chip.

[0062] In other embodiments, the second chip may be other chips depending on the actual process requirements.

[0063] In this embodiment, the packaging structure includes a metal plating layer 109 located between the top of the first chip 103 and the heat dissipation layer 104.

[0064] The metal plating layer 109 is used to connect the first chip 103 and the heat dissipation layer 104.

[0065] It should be noted that, under the influence of high-temperature processing, the metal plating layer 109 and the heat dissipation layer 104 usually form a eutectic layer at the interface due to mutual diffusion between materials. Therefore, the metal plating layer 109 can be used to improve the connection strength between the first chip 103 and the heat dissipation layer 104.

[0066] The metal plating 109 comprises one or any number of layers of gold and silver. As an example, the metal plating 109 is a gold layer.

[0067] It should be noted that both the gold and silver layers have excellent thermal conductivity, which is beneficial for transferring the heat generated by the first chip 103 to the heat dissipation layer 104. They are also beneficial for reducing voids between the metal plating layer 109 and the heat dissipation layer 104 during the bonding process, thereby improving the bonding quality between the metal plating layer 109 and the heat dissipation layer 104.

[0068] The barrier structure 106 serves to prevent the material of the heat dissipation layer 104 from sputtering toward the substrate 100 due to melting during the high-temperature process.

[0069] In this embodiment, the blocking structure 106 is a hollow structure, which helps to reduce the weight of the blocking structure 106 and improve the stability of the blocking structure 106 on the inner wall of the cavity 102.

[0070] It should be noted that since the blocking structure 106 and the heat sink 101 form a receiving space, and the receiving space at least accommodates the heat sink 104, the blocking structure 106 can effectively prevent the material of the heat sink 104 from sputtering towards the substrate 100 due to melting during the high-temperature process, thereby reducing the probability of damage to the substrate 100 or other components on the substrate 100, and thus improving the performance of the packaging structure.

[0071] In this embodiment, the blocking structure 106 is suspended above the substrate 100 on the side of the first chip 103, thereby reducing the impact on the placement or wiring of other components on the substrate 100.

[0072] In this embodiment, the blocking structure 106 is located above the top of the component 105, thereby preventing the material of the heat dissipation layer 104 from sputtering onto the component 105.

[0073] In this embodiment, the blocking structure 106 is an annular structure surrounding the heat dissipation layer 104, thereby blocking sputtered material from the heat dissipation layer 104 in the circumferential direction, thus improving the blocking effect on the sputtered material.

[0074] In other embodiments, the blocking structures may also be arranged discretely around the heat dissipation layer. For example, the blocking structures may be strip-shaped and distributed on the sides of each sidewall of the heat dissipation layer.

[0075] In other embodiments, depending on actual needs, the blocking structure may also be distributed only on the side of one of the sidewalls of the heat dissipation layer.

[0076] It should be noted that, along the normal direction parallel to the surface of the substrate 100, depending on the height position of the blocking structure 106 above the substrate 100 or the total height H of the blocking structure 106, the blocking structure 106 covers the sidewall of the heat dissipation layer 104, or the blocking structure 106 covers the sidewall of the heat dissipation layer 104 and also covers part of the sidewall of the first chip 103, or the blocking structure 106 covers part of the sidewall of the first chip 103.

[0077] It should also be noted that by contacting either the sidewall of the heat dissipation layer 104 or the sidewall of the first chip 103, the blocking effect of the heat dissipation layer 104 can be further improved.

[0078] In this embodiment, the blocking structure 106 at least covers the sidewall of the heat dissipation layer 104, thereby improving the blocking effect on the sputtered material of the heat dissipation layer 104.

[0079] In one embodiment, the barrier structure 106 also covers part of the sidewall of the first chip 103, which helps to completely cover the sidewall of the heat dissipation layer 104, thereby enabling the barrier structure 106 to effectively prevent the material of the heat dissipation layer 104 from sputtering toward the substrate 100 due to melting during the high-temperature process.

[0080] In other embodiments, the barrier structure may also have a certain gap with the sidewall of the first chip along a direction parallel to the substrate surface. It should be noted that the width of the gap should not be too large. If the gap is too large, the barrier structure may not effectively prevent the material of the heat dissipation layer from sputtering towards the substrate due to melting during high-temperature processes. As an example, the width of the gap is less than or equal to 5 millimeters.

[0081] In this embodiment, the ratio of the wall thickness h of the barrier structure 106 to its total height H along the normal direction parallel to the surface of the substrate 100 should not be too large. If the ratio of the wall thickness h of the barrier structure 106 to its total height H is too large, that is, if the wall thickness h of the barrier structure 106 is too large, on the one hand, it is easy to reduce the volume of the hollow portion of the barrier structure 106, thereby easily increasing the weight of the barrier structure 106, and thus reducing the stability of the barrier structure 106 on the inner wall of the cavity 102. On the other hand, when there is an exhaust hole, it is also easy to cause the hollow portion of the barrier structure 106 and the exhaust hole to have a poor effect on balancing the internal and external air pressure of the packaging structure. Therefore, in this embodiment, the ratio of the wall thickness h of the barrier structure 106 to its total height H along the normal direction parallel to the surface of the substrate 100 is less than or equal to 1:4.

[0082] It should be noted that the blocking structure 106 has an inner wall (not shown) and an outer wall (not shown), with the inner wall facing the hollow part. The wall thickness h of the blocking structure 106 refers to the distance between the outer wall and the inner wall of the blocking structure 106.

[0083] In this embodiment, the blocking structure 106 is an elastic structure, so the elasticity of the blocking structure 106 can be used to make the blocking structure 106 better resist the sidewall of the heat dissipation layer 104 or the first chip 103.

[0084] In this embodiment, the blocking structure 106 is made of rubber or silicone. Rubber or silicone has good elasticity, which helps to better resist the sidewall of the heat dissipation layer 104 or the first chip 103.

[0085] Specifically, the material of the blocking structure 106 includes fluororubber, silicone rubber, fluorosilicone rubber, silicone nitrile rubber, or methyl vinyl silicone rubber.

[0086] It should be noted that fluororubber, silicone rubber, fluorosilicone rubber, silicone nitrile rubber, or methyl vinyl silicone rubber have good heat resistance, which helps to reduce the probability of the barrier structure 106 melting or deforming during the encapsulation process, thereby helping to ensure the integrity of the barrier structure 106.

[0087] In this embodiment, the blocking structure 106 is in contact with the top cover plate 107 and the side plate 108, which helps to increase the contact area between the blocking structure 106 and the top cover plate 107 and the side plate 108, thereby improving the stability of the blocking structure 106 on the inner wall of the cavity 102.

[0088] In other embodiments, the blocking structure may contact only the top cover plate, or the blocking structure may contact only the side plate.

[0089] In this embodiment, the encapsulation structure further includes one or both of a first vent (not shown) and a second vent 111. The first vent extends longitudinally through the top cover plate 107 and the top wall of the blocking structure 106 that contacts the top cover plate 107. The second vent 111 extends laterally through the side plate 108 and the side wall of the blocking structure 106 that contacts the side plate 108.

[0090] It should be noted that, since the first vent penetrates longitudinally through the top cover plate 107 and the top wall of the barrier structure 106 that contacts the top cover plate 107, and the second vent 111 penetrates laterally through the side plate 108 and the side wall of the barrier structure 106 that contacts the side plate 108, this helps to balance the internal and external air pressure of the packaging structure during high-temperature processes such as reflow soldering, thereby reducing the probability of damage to the packaging structure due to excessive internal air pressure. In addition, since the first vent and the second vent 111 are only connected to the internal space of the barrier structure 106, the probability of external contaminants contaminating the internal part of the packaging structure is reduced.

[0091] Specifically, since the barrier structure 106 is made of rubber, it is easy for the material of the barrier structure 106 to have pores, thus balancing the internal and external air pressure of the encapsulation structure.

[0092] In one specific embodiment, when the blocking structure 106 is in contact with the side plate 108, the encapsulation structure includes a second vent 111 that extends laterally through the side plate 108 and the side wall of the blocking structure 106 that is in contact with the side plate 108.

[0093] In other embodiments, depending on actual design requirements, when the blocking structure is in contact with the top cover plate and the side plate, the encapsulation structure may include: a first vent hole that longitudinally penetrates the top cover plate and the top wall of the blocking structure that contacts the top cover plate; or, when the blocking structure is in contact with the top cover plate and the side plate, the encapsulation structure may further include: a first vent hole that longitudinally penetrates the top cover plate and the top wall of the blocking structure that contacts the top cover plate, and a second vent hole that transversely penetrates the side plate and the side wall of the blocking structure that contacts the side plate.

[0094] In this embodiment, the encapsulation structure further includes an adhesive layer (not shown) located between the heat dissipation cover 101 and the blocking structure 106.

[0095] The adhesive layer is used to fix the barrier structure 106 to the heat sink 101.

[0096] In one embodiment, the adhesive layer is a thermosetting adhesive layer. Specifically, the adhesive layer is cured by heat treatment, thereby enabling it to limit and fix the blocking structure 106.

[0097] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A packaging structure, characterized in that, include: substrate; A heat dissipation cover is located on the substrate, and the heat dissipation cover and the substrate form a cavity. The heat dissipation cover includes a top cover plate and a side plate connected to the top cover plate. The side plate is located between the top cover plate and the substrate and is located on the periphery of the top cover plate. A first chip is located inside the cavity, and the first chip is soldered onto the substrate and electrically connected to the substrate. A heat dissipation layer is located between the top of the first chip and the heat dissipation cover; A blocking structure is located on the inner wall of the cavity and forms a receiving space with the heat dissipation cover. The receiving space at least accommodates the heat dissipation layer. The blocking structure is an elastic hollow structure that abuts against the side wall of the heat dissipation layer and contacts the side plate of the heat dissipation cover. The encapsulation structure further includes a second vent, which extends laterally through the side plate and the side wall of the blocking structure that contacts the side plate.

2. The packaging structure as described in claim 1, characterized in that, The blocking structure covers the sidewall of the heat dissipation layer, or the blocking structure covers the sidewall of the heat dissipation layer and also covers part of the sidewall of the first chip, or the blocking structure covers part of the sidewall of the first chip.

3. The packaging structure as described in claim 1, characterized in that, Along the direction parallel to the normal of the substrate, the ratio of the wall thickness of the barrier structure to the total height of the barrier structure is less than or equal to 1:

4.

4. The packaging structure as described in claim 1, characterized in that, The barrier structure is made of materials including rubber or silicone.

5. The packaging structure as described in claim 4, characterized in that, The materials used for the barrier structure include fluororubber, silicone rubber, fluorosilicone rubber, silicone nitride, or methyl vinyl silicone.

6. The packaging structure as described in claim 1, characterized in that, The heat dissipation layer includes one or more stacks of indium, indium-silver alloy, silver, tin, tin-silver alloy, and tin-lead alloy.

7. The packaging structure as described in claim 1, characterized in that, The blocking structure contacts the top cover plate, and the encapsulation structure further includes a first vent hole, which longitudinally penetrates the top cover plate and the top wall of the blocking structure that contacts the top cover plate.

8. The packaging structure as described in claim 1, characterized in that, The heat dissipation cover is a one-piece structure.

9. The packaging structure as described in claim 1, characterized in that, The encapsulation structure further includes an adhesive layer located between the heat dissipation cap and the barrier structure.

10. The packaging structure as described in claim 1, characterized in that, The blocking structure is a ring structure surrounding the heat dissipation layer.

11. The packaging structure according to any one of claims 1 to 10, characterized in that, The packaging structure further includes: components located within the cavity, the components being soldered to a substrate on the side of the first chip and electrically connected to the substrate; The blocking structure is located on top of the component.

12. The packaging structure as described in claim 11, characterized in that, The components include one or both of passive components and a second chip.