Test board delay circuit, frequency conversion board and test device
By introducing a delay circuit into the test of the variable frequency compressor and using a microcontroller to control the conduction of the MOSFET, the timing problem caused by the relay delay is solved, ensuring the normal operation of the variable frequency board.
Patent Information
- Application Number
- CN202423069942.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2026-01-13
- Estimated Expiration
- 2034-12-12
AI Technical Summary
During the testing of the variable frequency compressor, a timing problem caused by relay delay led to a failure of the variable frequency board.
A delay circuit is introduced between the test terminals and the test bench. The MOSFET is turned on by the delay trigger logic pre-programmed into the microcontroller to ensure that the connection time between the test terminals and the test bench matches the connection time between the inverter board and the compressor.
This effectively avoids timing inconsistencies caused by relay delays, ensuring the normal operation of the frequency converter board.
Smart Images
Figure CN223798214U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of variable frequency compressor testing, specifically to a test bench delay circuit, a variable frequency board, and a testing device. Background Technology
[0002] When performing start-stop tests on a variable frequency compressor using a general-purpose inverter board, the terminal operation method is selected. When the terminals are connected, the inverter board starts working; when the terminals are disconnected, the inverter board stops working. The connection and disconnection of the terminals are controlled by the test bench. The normal operating procedure is to first connect the wiring between the inverter board and the compressor, and then connect the compressor terminals. The inverter board works normally. However, because the inverter board and the compressor are connected through a relay, the delay introduced by the relay will cause timing problems, leading to inverter board failure. Summary of the Invention
[0003] To address the issue of inverter board failure caused by timing problems introduced by relay delays during existing compressor testing, this invention provides a test bench delay circuit. By introducing a delay circuit between the test terminals and the test bench, the delay introduced by the relay is offset, thereby avoiding inverter board failure due to timing issues.
[0004] According to one aspect of this utility model specification, a test bench delay circuit is provided. The input terminal of the delay circuit is connected to the test terminal on the frequency converter board, and the output terminal is connected to the test bench. The delay circuit includes a microcontroller pre-programmed with delay trigger logic, which is used to trigger the MOS transistor of the output port to conduct after a set delay time when the test terminal is connected, so that the test terminal is connected to the test bench.
[0005] Optionally, a relay is provided on the frequency converter board, and when the relay is closed, the circuit between the frequency converter board and the compressor is connected.
[0006] Optionally, the delay time set by the delay triggering logic is related to the relay delay time.
[0007] Optionally, the gate of the MOS transistor is connected to the output port of the microcontroller, the drain is connected to the programmed delayed trigger logic, and the source is grounded.
[0008] Optionally, the power module of the frequency converter board is connected to the microcontroller through a series multi-stage voltage regulator.
[0009] Optionally, the multi-stage voltage regulator includes three three-terminal voltage regulators connected in series.
[0010] According to one aspect of this utility model specification, a frequency converter board is provided, which integrates the aforementioned test bench delay circuit.
[0011] According to one aspect of this utility model specification, a testing device is provided, which is equipped with the aforementioned frequency converter board.
[0012] Compared with the prior art, the beneficial effects of this utility model are as follows:
[0013] This invention addresses the timing issues introduced by relay delays during the testing of variable frequency compressors by providing a delay circuit. This circuit is placed between the test terminals and the test bench, delaying the connection of the test terminals by a set time after they are turned on, thus ensuring normal timing and enabling the variable frequency board to operate normally. Attached Figure Description
[0014] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 A schematic diagram of the test bench delay circuit provided in an embodiment of this utility model.
[0016] Figure 2 The circuit diagram of the test bench delay circuit provided in the embodiment of this utility model. Detailed Implementation
[0017] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model. In addition, the technical features of the various embodiments or individual embodiments provided by this utility model can be arbitrarily combined to form new technical solutions. Such combinations are not bound by the order of steps and / or structural composition patterns, but must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.
[0018] This utility model embodiment provides a test bench delay circuit, which sets a delay between the test terminals and the test bench so that the connection time between the test terminals and the test bench can match the connection time between the frequency converter board and the compressor. This avoids the timing inconsistency problem caused by the relay delay when the frequency converter board and the compressor are turned on, and ensures the normal operation of the frequency converter board.
[0019] Please see Figure 1 and Figure 2 The input terminal of the delay circuit is connected to the test terminal on the frequency converter board, and the output terminal is connected to the test bench. The delay circuit includes a microcontroller, which has a delay trigger logic pre-programmed into it. When the test terminal is connected, the delay trigger logic delays for a set time and then triggers the MOSFET at the output port of the microcontroller to conduct, thereby connecting the test terminal to the test bench.
[0020] Specifically, the microcontroller is an STM32F030F4, and its PA2 port is connected to a four-pin connector for transmitting signals from the test terminals to the test bench; the PA3 port is also connected to the same pin connector for transmitting signals from the test bench to the test terminals.
[0021] The microcontroller's PA9 port is equipped with a MOSFET. The gate of the MOSFET is connected to the microcontroller's output port, the drain is connected to the programmed delay trigger logic, and the source is grounded. When the test terminal is on, the frequency converter board powers the delay circuit. When the voltage between the gate and source of the MOSFET is higher than the threshold voltage, the MOSFET conducts, and the test terminal is connected to the test bench.
[0022] The power module of the frequency converter board is connected to the microcontroller through a series three-stage voltage regulator. The first-stage three-terminal voltage regulator converts the 24V DC voltage of the frequency converter board to 12V DC voltage, the second-stage three-terminal voltage regulator converts the 12V DC voltage of the frequency converter board to 5V DC voltage, and the third-stage three-terminal voltage regulator converts the 5V DC voltage of the frequency converter board to 3.3V DC voltage, which is then used to power the delay circuit.
[0023] Specifically, the first-stage three-terminal voltage regulator is model 7812, the second-stage three-terminal voltage regulator is model 7805, and the third-stage three-terminal voltage regulator is model LM1117-3V3.
[0024] The delay circuit is also equipped with a five-pin connector for use when programming the delay trigger logic.
[0025] During the testing of the variable frequency compressor, the inverter board is connected to the compressor via a three-phase line, and a relay on the inverter board is used to maintain continuity. That is, when the relay is closed, the circuit between the inverter board and the compressor is connected.
[0026] It should be noted that during testing, the connection between the inverter board and the compressor is typically established first, followed by the connection between the test terminals and the test bench. However, due to the delay in relay operation, the connection between the test terminals and the test bench may occur before the connection between the inverter board and the compressor is established, leading to timing discrepancies. To address this, this invention introduces a delay circuit, which delays the connection between the test terminals and the test bench by programming a delay trigger logic.
[0027] Specifically, the delay time set by the delay triggering logic is determined based on the relay delay time, which is generally about two seconds, but can also be other delay times. This utility model does not limit this to any particular delay time.
[0028] Based on the same inventive concept as the above embodiments, this utility model also provides a frequency converter board that integrates the aforementioned test bench delay circuit. When using the frequency converter board to test a compressor, the conduction time between the test terminals and the test bench can be delayed by the delay circuit, avoiding malfunctions of the frequency converter board caused by timing issues introduced by relay delays.
[0029] This utility model also provides a testing device, including a frequency converter board with an integrated delay circuit. The frequency converter board also integrates test terminals and relays. The test terminals are connected to a test bench, and the relays are used to connect or disconnect the three-phase lines between the frequency converter board and the compressor.
[0030] The testing device described in this utility model achieves delayed start-up by adding a delay circuit between the test terminals and the test bench, and supplying power to the circuit through the power supply section of the inverter board, controlling the on / off state of PA9 of the microcontroller. This solves the timing disorder problem caused by the relay delay when the circuit between the inverter board and the compressor is connected during the test of the inverter compressor, and ensures the normal operation of the inverter board.
[0031] It should be understood that any details not described in this utility model can be considered as conventional technology in the field.
[0032] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the technical solutions of the embodiments of this utility model.
Claims
1. A test board delay circuit, characterized by, The input end of the delay circuit is connected with a test terminal on the frequency conversion board, and the output end is connected with a test bench; the delay circuit comprises a microcontroller pre-burned with delay trigger logic, which is used to trigger the conduction of a MOS tube of the output port after a delay setting time when the test terminal is connected, so as to connect the test terminal with the test bench.
2. The test bench delay circuit of claim 1, wherein, A relay is arranged on the frequency conversion board, and when the relay is closed, the circuit between the frequency conversion board and the compressor is conducted.
3. The test bench delay circuit of claim 2, wherein, The delay time set by the delay trigger logic is related to the relay delay time.
4. The test bench delay circuit of claim 1, wherein, The gate of the MOS tube is connected with the output port of the microcontroller, the drain is connected with the burned delay trigger logic, and the source is grounded.
5. The test bench delay circuit of claim 1, wherein, The power module of the frequency conversion board is connected with the microcontroller through a multi-stage voltage stabilizer in series.
6. The test bench delay circuit of claim 5, wherein, The multi-stage voltage stabilizer comprises three three-terminal voltage stabilizers in series.
7. A frequency conversion board, characterized by The test bench delay circuit of any one of claims 1 to 6 is integrated.
8. A test device, characterized in that The frequency conversion board of claim 7 is configured.