Relay time-delay step-down holding circuit

Abstract

The utility model relates to a relay time-delay step-down holding circuit, which comprises a relay and a drive circuit connected to the controlled side of the relay. The driving circuit is used for controlling the driving voltage of the relay, and the driving circuit comprises a driving switch connected in series to the controlled side; the driving switch is used for adjusting the controlled side voltage of the adjustable relay; the controlled side is electrically connected with a logic circuit, a time delay circuit and a driving power supply, and the logic circuit is used for obtaining the controlled side voltage of the relay; the device is reasonable in design, compact in structure and convenient to use.

Description

TECHNICAL FIELD

[0001] The utility model relates to relay time delay step-down holding circuit relates to the driving circuit structure field of relay. BACKGROUND

[0002] The relay will exist environmental temperature excessively high or the self heating leads to the case of the body temperature excessively high in the use process, thereby influence the life and reliability of relay;

[0003] The relay has two kinds of working conditions of attraction voltage and holding voltage, the relay uses first to start with rated voltage and then keeps the relay contact attraction state through the mode of step-down, and the step-down holding can reduce the power consumption and temperature rise of the relay itself, thereby improving the life and reliability of the relay.

[0004] The relay time delay step-down holding circuit uses the mode of detection loop and logic gate circuit control to realize at present, and these modes have complex circuit structure and high cost. UTILITY MODEL CONTENTS

[0005] In view of the problems of high cost and low control reliability in prior art that IC TPS54233DRG4 and other chips are used to control the relay, the utility model provides a relay time delay step-down holding circuit, which comprises a relay and a driving circuit connected to the controlled side of the relay;

[0006] The driving circuit is used for controlling the driving voltage of the relay, and the driving circuit comprises a driving switch connected in series to the controlled side;The driving switch is used for adjusting the voltage of the controlled side of the adjustable relay.

[0007] The controlled side is electrically connected with a logic circuit, a delay circuit and a driving power supply, and the logic circuit is used for obtaining the voltage of the controlled side of the relay.

[0008] As a further improvement of the above technical solution:

[0009] Among them, the driving power supply comprises independent direct current power supply VCC1, VCC2;

[0010] The voltage of power supply VCC1 is always greater than the voltage of power supply VCC2.

[0011] The power supply VCC1 provides the opening voltage for the relay, and the power supply VCC2 provides the holding voltage for the relay.

[0012] The logic circuit comprises a comparison circuit.

[0013] The comparison circuit comprises a voltage reference chip U1, which provides a reference voltage.

[0014] When the control signal of the relay is greater than the reference voltage, the control signal is high level and the delay circuit voltage is lower than the reference voltage, the relay is powered by VCC1 and is in the attracted state;

[0015] When the control signal of the relay is high level and the delay circuit voltage is higher than the reference voltage, the relay is powered by VCC2 and is in the voltage reduction holding state;

[0016] The reference voltage is set according to the control signal of the relay.

[0017] The driving circuit comprises a switch tube Q1 and a resistor R1.

[0018] The switch tube Q1 is a PMOS tube.

[0019] The switch tube Q1 is used as the control switch of the driving power supply VCC1.

[0020] The first end of the switch tube Q1 is connected to the direct current power supply VCC1, the second end is connected to the first end of the triode Q6, and the third end is directly connected to the relay.

[0021] The first end of the controlled side of the relay is connected to the direct current power supply VCC2 through a diode D1 in series, and the second end is connected to the first end of the triode Q8; the second end of the triode Q8 is connected to the control signal of the relay through a resistor R3 in series and a ground, and the third end is directly grounded; meanwhile, the second end of the triode Q8 is connected to the delay circuit.

[0022] The delay circuit comprises a resistor R2 and a capacitor C1.

[0023] The second end of the triode Q8 is connected to the ground through the resistor R2 and the capacitor C1, and the other side of the resistor R2 is also connected to the comparison circuit.

[0024] The comparison end of the reference voltage chip U1 is connected between the resistor R2 and the capacitor C1 of the delay circuit, the input end is connected to the direct current power supply VCC1 through a resistor R4 in series, and the output end is directly grounded.

[0025] The first end of the triode Q6 is connected to the direct current power supply VCC1 through a resistor R1 in series, the second end is connected between the resistor R4 and the comparison end of the reference voltage chip U1 through a resistor R5 in series, and the third end is directly grounded.

[0026] The reference voltage chip provides the reference voltage.

[0027] Compared with the prior art, the relay can be kept closed and normally work after voltage reduction without a complex chip.

[0028] The single-signal voltage reduction maintaining circuit has simple structure, and has the delay voltage reduction function to ensure that the relay is reliably attracted and then voltage reduction maintaining is performed, thereby improving relay control and reliability and prolonging relay service life.

[0029] The relay voltage reduction maintaining circuit has compact structure, high stability and good use effect, can be applicable to various applicable environments, and finally can realize the voltage reduction maintaining purpose. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 The utility model relates to a circuit schematic diagram. DETAILED DESCRIPTION

[0031] As Figure 1 A relay delay voltage reduction maintaining circuit, including a drive circuit connected in the controlled side of relay, for controlling the drive voltage of relay, having a drive switch in series in the drive circuit, which can adjust the voltage of the controlled side of relay.

[0032] The relay delay voltage reduction maintaining circuit at least further includes: a logic circuit for obtaining the voltage of the controlled side of relay, a delay circuit for according to the voltage of the controlled side, and a drive power supply connected in the controlled side of relay, for controlling the maintaining voltage.

[0033] The drive power supply of relay adopts double power supply (VCC1, VCC2), and VCC1 is the opening voltage of relay, and VCC2 is the maintaining voltage of relay;

[0034] VCC1 is always greater than VCC2;

[0035] The logic circuit sets the comparison circuit, contains the reference voltage, and when the control signal of relay is greater than the reference voltage, the control signal is high level and the voltage of delay circuit is lower than the reference voltage, relay adopts VCC1 power supply, and is in the attracted state;

[0036] When the control signal of relay is high level and the voltage of delay circuit is higher than the reference voltage, relay adopts VCC2 power supply, and is in the voltage reduction maintaining state;

[0037] The reference voltage is set according to the control signal of relay.

[0038] Further, the drive circuit comprises: a switch tube Q1 (PMOS), a triode Q6 and Q8, a reference chip U1, a diode D1, a capacitor C1, resistors R1, R2, R3, R4, R5;

[0039] Wherein, the switch tube Q1 is used as the control switch of the driving power supply VCC1, and the first end of the switch tube Q1 is connected to the direct current power supply VCC1, the second end is connected to the first end of the triode Q6, and the third end is directly connected to the relay;

[0040] The first end of the controlled side of the relay is connected to the direct current power supply VCC2 through the series connection of the diode D1, and the second end is connected to the first end of the triode Q8;

[0041] The second end of the triode Q8 is connected to the control signal of the relay through the series connection of the resistor R3, and the third end is directly connected to the ground, and the second end of the triode Q8 is connected to the delay circuit;

[0042] Further, the delay circuit comprises: a resistor R2 and a capacitor C1;

[0043] Wherein, the second end of the triode Q8 is connected to the ground through the resistor R2 and the capacitor C1, and the other side of the resistor R2 is also connected to the comparison circuit;

[0044] Further, the comparison circuit comprises: a voltage reference chip U1;

[0045] Wherein, the comparison end of the reference voltage chip U1 is connected between the delay circuit R2 and C1, the input end is connected to the direct current power supply VCC1 through the series connection of the resistor R4, and the output end is directly connected to the ground;

[0046] Further, the first end of the triode Q6 is connected to the direct current power supply VCC1 through the series connection of the resistor R1, the second end is connected between the resistor R4 and the comparison end of the reference voltage chip U1 through the series connection of the resistor R5, and the third end is directly connected to the ground;

[0047] Further, the reference voltage is determined by the basic voltage chip, which is convenient for distinguishing the high and low states of the relay control signal; wherein, the logic circuit controls the on and off of the switch Q1 to select the power supply voltage of the relay through the control signal, when the control signal is low, the PMOS is in the on state, and VCC1 is used for power supply.

[0048] When the control signal is high, the PMOS is in the off state, and VCC2 is used for power supply;

[0049] As a specific working principle, first, when the system needs to open the relay, the control signal of the relay is low in the initial state, at this time, the second end of the triode Q8 is low, Q8 is in the off state, the second end of the relay is in the suspended state, at this time, the second end of the reference voltage chip U1 is low, after the comparison of the reference chip voltage, the voltage chip is high, the second end of the triode Q6 is high, Q6 is in the on state, the first end of Q6 is low;

[0050] When the second end of the switch tube Q1 is low, the switch tube is in the on state, and the direct current power supply VCC1 can be directly connected to the first end of the relay, at this time, the first end of the relay is connected to the direct current power supply VCC1, and the second end is in the suspended state;

[0051] Secondly, when the system needs to open the relay, the control signal of the relay is converted from low to high, at this time, the second end of the triode Q8 is high, Q8 is in the on state, at this time the second end of the relay immediately becomes low, at this time the first end of the relay is connected to the direct current power supply VCC1, the second end of the relay is low, the relay is immediately attracted, at this time, the conversion of the attracted state of the relay is completed; At the same time, the control signal of the relay passes through the RC delay circuit, at this time there is a time delay, the specific delay time is determined by the voltage of the relay control signal, the resistance R2 and the capacitance C1, when the capacitance C1 is full of electricity, the second end of the reference voltage chip U1 is converted from low to high, at this time, the first end of the reference voltage chip U1 outputs low;

[0052] Further, the second end of the triode Q6 becomes low, at this time the triode Q6 is in the off state, the second end of the switch tube Q1 is directly connected to the direct current power supply VCC1 through the resistance R1, at this time the switch tube Q1 is in the off state;

[0053] Further, the first end of the relay is connected to the direct current power supply VCC2 at this time, it is known that the direct current power supply VCC2 is always less than the direct current power supply VCC1, so that the voltage reduction of the relay is realized;

[0054] The specific calculation formula of the delay circuit delay time is as follows:

[0055]

[0056] Wherein, V0 is the initial voltage value of the capacitor;

[0057] V1 is the voltage value that the capacitor can finally charge to or discharge to;

[0058] V t is the voltage value at time t;

[0059] Further, for calculating the delay time t, i.e. the charging time of the capacitor C1, when V t V0=0, V1=V for the voltage of the control signal t .

[0060] The reference voltage chip U1 can be selected as a TL431 chip, and the voltage reference value of the chip is 2.5V.

[0061] The TL431 control pin voltage is controlled by the delay circuit composed of R2 and C1.

[0062] When the TL431 control pin voltage is less than 2.5V, Q6 is turned on, Q1 is turned on, and the relay power supply is provided by VCC1.

[0063] When the TL431 control pin voltage is greater than 2.5V, Q6 is turned off, Q1 is turned off, and the relay power supply is provided by VCC2.

[0064] When the control signal is high, Q8 is turned on, the relay is attracted, the TL431 control pin voltage caused by the delay circuit is less than 2.5V, and the relay attraction voltage is provided by VCC1.

[0065] When the control signal is high, and the delay circuit voltage makes the TL431 control pin voltage greater than 2.5V, the relay power supply voltage is provided by VCC2, i.e. the relay voltage reduction is realized.

[0066] For the existing relay delay voltage reduction keeping circuit, a complex circuit structure and the control resource of a single-chip microcomputer are needed to realize the voltage reduction keeping, and the control strategy provided by the utility model has the advantages and positive effects, and the specific description is as follows:

[0067] The circuit structure is simple and reliable; the circuit has a delay voltage reduction function, and can ensure that the relay is reliably attracted; and single-signal enable control is used, and the logic is simple.

[0068] The utility model fully describes in order to more clearly disclose, and for prior art will not enumerate one by one.

[0069] Finally, it should be noted that: the above examples are used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for part of the technical features; as a person skilled in the art, it is obvious to combine the technical solutions of the present application. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. The technical content not described in detail in the present application is known technology.

Claims

1. A relay delay-voltage reduction holding circuit, characterized in that: The relay and a driving circuit connected to a controlled side of the relay are included. The driving circuit includes a driving switch connected in series to the controlled side; the driving switch is used to adjust the controlled side voltage of the adjustable relay. The controlled side is connected with a logic circuit, a delay circuit and a driving power supply. The driving power supply includes independent DC power supplies VCC1 and VCC2. The voltage of the power supply VCC1 is always greater than the voltage of the power supply VCC2. The logic circuit includes a comparison circuit. The comparison circuit includes a voltage reference chip U1. The driving circuit includes a switch tube Q1 and a resistor R1 as the control switch of the driving power supply VCC1. The first end of the switch tube Q1 is connected to the DC power supply VCC1, the second end is connected to the first end of a triode Q6, and the third end is directly connected to the relay.

2. The relay delay time step-down hold circuit according to claim 1, characterized by: The power supply VCC1 provides the opening voltage for the relay, and the power supply VCC2 provides the holding voltage for the relay. The driving circuit is used to control the driving voltage of the relay.

3. The relay delay time step-down hold circuit according to claim 2, characterized by: The logic circuit is used to obtain the controlled side voltage of the relay. The voltage reference chip U1 provides a reference voltage. When the control signal of the relay is greater than the reference voltage, the control signal is high and the voltage of the delay circuit is lower than the reference voltage, the relay is powered by VCC1 and is in the attracted state. When the control signal of the relay is high and the voltage of the delay circuit is higher than the reference voltage, the relay is powered by VCC2 and is in the voltage reduction holding state. The reference voltage is set according to the control signal of the relay. The switch tube Q1 is a PMOS tube.

4. The relay delay time step-down hold circuit according to claim 3, characterized by: The first end of the controlled side of the relay is connected to the DC power supply VCC2 through a series diode D1, and the second end is connected to the first end of a triode Q8; the second end of the triode Q8 is connected to the control signal of the relay through a series resistor R3, and the third end is directly connected to the ground; at the same time, the second end of the triode Q8 is connected to the delay circuit. The delay circuit includes a resistor R2 and a capacitor C1.

5. The relay time delay step-down hold circuit according to claim 4, characterized by: The second end of the triode Q8 is connected to the ground through the resistor R2 and the capacitor C1, and the other side of the resistor R2 is also connected to the comparison circuit. The comparison end of the reference voltage chip U1 is connected between the resistor R2 and the capacitor C1 of the delay circuit, the input end is connected to the DC power supply VCC1 through a series resistor R4, and the output end is directly connected to the ground. The first end of the triode Q6 is connected to the DC power supply VCC1 through a series resistor R1, the second end is connected between the resistor R4 and the comparison end of the reference voltage chip U1 through a series resistor R5, and the third end is directly connected to the ground. The reference voltage chip provides a reference voltage. ​

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