Voltage sampling circuit of direct-current high-voltage system

Abstract

The utility model discloses a voltage sampling circuit of a direct-current high-voltage system, and the circuit comprises a voltage dividing circuit which is used for carrying out the voltage dividing of a plurality of paths of direct-current high voltages, and then outputting a voltage sampling signal; the sampling channel selection circuit is used for isolating the voltage sampling signal and then selecting an output voltage signal; and the operational amplifier isolation circuit is used for reducing the output resistance of the voltage signal and then outputting the voltage signal. The voltage sampling circuit of the direct-current high-voltage system can avoid the phenomenon that in traditional voltage sampling, the voltage of a voltage negative acquisition point deviates relative to the voltage of a high-voltage negative acquisition point, so that a sampling end which should not display no high voltage displays high voltage; the use number of optocouplers can be reduced, so that the effects of reducing the area of a single board and reducing the cost are achieved; the problem of voltage deviation of traditional voltage sampling is solved, and the cost and the space of a single board are greatly saved.

Description

Technical Field

[0001] This utility model relates to the field of voltage sampling technology for DC high voltage systems, and specifically to a voltage sampling circuit for DC high voltage systems. Background Technology

[0002] The current mainstream voltage sampling scheme for DC high-voltage systems involves dividing the high-voltage positive and negative voltages with resistors, amplifying the result by an operational amplifier, and then isolating it with optocouplers before feeding it into a DSP for processing. Typically, this scheme requires one optocoupler for each sampling point. As the number of voltage samples increases, the number of optocouplers also increases, leading to a rise in board area and cost.

[0003] Because the operational amplifier's power supply negative and high voltage negative are not at the same potential, when one part of the circuit has a high voltage input and another part does not, the voltage division by resistors causes the operational amplifier's power supply negative potential to shift relative to the high voltage negative. This results in the operational amplifier at the sampling terminal without a high voltage input still having an output voltage, causing the sampling terminal that should display no high voltage to show a high voltage. Summary of the Invention

[0004] The purpose of this invention is to provide a voltage sampling circuit for a DC high voltage system.

[0005] To achieve the above objectives, this utility model provides the following technical solution: a voltage sampling circuit for a DC high-voltage system, comprising:

[0006] A voltage divider circuit is used to divide multiple DC high voltages and output a voltage sampling signal.

[0007] The sampling channel selection circuit is used to select the output voltage signal after isolating the voltage sampling signal; and

[0008] Operational amplifier isolation circuit is used to reduce the output resistance of voltage signals before output.

[0009] Furthermore, the voltage divider circuit includes resistors R1 and R2. One end of resistor R1 is connected to one end of resistor R2 and then connected to the high voltage negative of multiple DC high voltages. The other end of resistor R1 is connected to the high voltage positive of multiple DC high voltages.

[0010] Furthermore, the voltage divider circuit also includes a capacitor C1, one end of which is connected between resistors R1 and R2, and capacitor C1 and resistor R2 are connected in parallel.

[0011] Furthermore, the voltage divider circuit also includes a diode D1, with pin 1 of the diode D1 connected to one end of the resistor R2, and pin 3 of the diode D1 connected to the other end of the resistor R2.

[0012] Furthermore, the sampling channel selection circuit includes a digital isolator U1, a multi-channel multiplexed analog switch chip U2, and resistors R12, R13, R14, R15, R16, R17, R18, and R19. Resistors R12, R13, R14, R15, R16, R17, R18, and R19 are respectively connected to the digital isolator U1, and the digital isolator U1 is connected to the multi-channel multiplexed analog switch chip U2.

[0013] Further, the operational amplifier isolation circuit includes an isolation optocoupler U4, operational amplifiers U3 and U5, resistors R20, R21, R22, R23, R25, R26, R27, and capacitor C3. One end of resistor R20 is connected to the positive input terminal of operational amplifier U3. The negative input terminal of operational amplifier U3 is connected to the positive input terminal and then connected to the isolation optocoupler U4 through resistor R22. One end of resistor R21 is connected between operational amplifier U3 and resistor R22, and the other end of resistor R21 is connected to one end of capacitor C3. The other end of capacitor C3 is connected between resistor R22 and isolation optocoupler U4. One end of resistor R23 is connected to isolation optocoupler U4, and the other end of resistor R23 is connected to the positive input terminal of operational amplifier U5 through one end of resistor R25. One end of resistor R26 is connected to isolation optocoupler U4, and the other end of resistor R26 is connected to the output terminal of operational amplifier U5 through resistor R27. The negative input terminal of operational amplifier U5 is connected between resistors R26 and R27. One end of resistor R28 is connected to the output terminal of operational amplifier U5.

[0014] As can be seen from the above technical solution, this utility model has the following beneficial effects:

[0015] The voltage sampling circuit of this DC high voltage system first obtains the signal by voltage division through resistors R1 and R2 in series, then uses capacitor C1 for filtering and diode D1 for clamping protection. Since the negative voltage sampling point of this voltage division method is directly connected to the negative high voltage, the potentials of the two will always be consistent. This method can avoid the voltage offset of the negative voltage sampling point relative to the negative high voltage in traditional voltage sampling, which would cause the sampling terminal that should not show no high voltage to show high voltage.

[0016] After acquiring signals from multiple voltage sources through a series resistor voltage divider, the signals are input to the multi-channel multiplexed analog switch chip U2. The DSP sends control signals, which are isolated by the digital isolator U1 and then sent to the multi-channel multiplexed analog switch chip U2 for channel selection. The control signals cycle in a fixed period, thus achieving 8-channel voltage signal input and 2-channel voltage signal output. This method reduces the 8 optocouplers required for traditional voltage sampling to 2 optocouplers, significantly reducing the use of optocouplers. With the reduction in optocouplers, the area and cost of the board can be significantly reduced.

[0017] The two voltage signal outputs of the multi-channel multiplexed analog switch chip U2 are first voltage followed by operational amplifier U3 and then input to isolation optocoupler U4. Optocoupler U4 isolates the output signal and sends it to operational amplifier U5. Operational amplifier U5 differentially amplifies the signal and then transmits it to the DSP for internal processing to obtain the voltage sample value. This voltage sampling method effectively solves the voltage deviation problem of traditional voltage sampling and significantly saves cost and board space. Attached Figure Description

[0018] Figure 1 This is the voltage divider circuit diagram of this utility model;

[0019] Figure 2 Circuit diagram for selecting the sampling channel of this utility model;

[0020] Figure 3 This is the circuit diagram of the operational amplifier isolation circuit of this utility model. Detailed Implementation

[0021] In the description of this utility model, it should be noted that the terms "upper," "lower," "inner," "outer," "front end," "rear end," "both ends," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0022] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," and "connected," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0023] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0024] Please see Figure 1-3This utility model provides a voltage sampling circuit for a DC high-voltage system, including a voltage divider circuit, a sampling channel selection circuit, and an operational amplifier isolation circuit. The voltage divider circuit is as follows: Figure 1 As shown, the voltage divider circuit includes resistors R1 and R2. One end of resistor R1 is connected to one end of resistor R2. The high voltage positive is input through U1_P1, and the high voltage negative is input through GND1. Since R1 and R2 are connected in series in this circuit, according to the voltage divider formula for series circuits: V1_SEN=R2*(U1_P1) / R1+R2, the value of V1_SEND after voltage division can be obtained.

[0025] A capacitor C1 is also provided in the voltage divider circuit. One end of the capacitor C1 is connected between resistors R1 and R2. The capacitor C1 and resistor R2 are connected in parallel. In order to reduce the interference of external interference signals on the circuit, the capacitor C1 is connected in parallel on the V1_SEN network to reduce the interference of external interference signals.

[0026] The voltage divider circuit also includes diode D1. Pin 1 of diode D1 is connected to one end of resistor R2, and pin 3 of diode D1 is connected to the other end of resistor R2. To prevent external voltage fluctuations from causing the value of V1_SEN to exceed the safe input range of subsequent circuits, diode D1 is added as a clamping circuit.

[0027] The DC high voltage is first obtained by voltage division through resistors R1 and R2 in series. The signal is then filtered by capacitor C1 and clamped by diode D1. Since the negative voltage sampling point of this voltage division method is directly connected to the negative high voltage, the potentials of the two will always be consistent. This method can avoid the voltage offset of the negative voltage sampling point relative to the negative high voltage in traditional voltage sampling, which would cause the sampling terminal that should not show no high voltage to show high voltage.

[0028] Diode D1 is connected to the positive terminal of the 5V power supply and the negative terminal of the high voltage, respectively. When the voltage signal is negative, diode D1 conducts through the negative high voltage to limit the voltage. When the voltage signal is higher than 5V, diode D1 conducts through the positive terminal of the 5V power supply to limit the voltage. This ensures that the voltage range of V1_SEN will not damage subsequent circuits. By arranging multiple circuits as described above, voltage sampling signals of multiple DC high voltages after voltage division can be obtained.

[0029] The sampling channel selection circuit includes a digital isolator U1, a multi-channel multiplexed analog switch chip U2, and resistors R12, R13, R14, R15, R16, R17, R18, and R19. This circuit isolates the voltage sampling signal and selects the output voltage signal. Resistors R12, R13, R14, R15, R16, R17, R18, and R19 are connected to the digital isolator U1, which is connected to the multi-channel multiplexed analog switch chip U2. The voltage sampling signal is input to the multi-channel multiplexed analog switch chip U2 after passing through the current-limiting resistors R12, R13, R14, R15, R16, R17, R18, and R19. The multi-channel multiplexed analog switch chip U2 can switch the connection relationship between the input and output pins based on the levels of two control pins. According to the chip datasheet, when the voltage levels of pins 9 and 10 (SO2, SO1) of the multi-channel multiplexed analog switch chip U2 are 00, pins 12 and 13 are connected, and pins 1 and 3 are connected. When the voltage levels of pins 10 and 9 (SO1, SO2) of the multi-channel multiplexed analog switch chip U2 are 01, pins 14 and 13 are connected, and pins 5 and 3 are connected. When the voltage levels of pins 10 and 9 (SO1, SO2) of the multi-channel multiplexed analog switch chip U2 are 10, pins 15 and 13 are connected, and pins 2 and 3 are connected. When the voltage levels of pins 10 and 9 (SO1, SO2) of the multi-channel multiplexed analog switch chip U2 are 11, pins 11 and 13 are connected, and pins 4 and 3 are connected. After the DSP sends the control signal, since the power supply ground of the DSP must be low voltage ground, the control signal is isolated by digital isolator U1 and then transmitted to the high voltage ground system of multi-channel multiplexed analog switch chip U2. The control signal sent by the DSP switches states every 2ms, and a total of 8ms completes one cycle of state switching. In this way, 8 voltage sampling signals can be integrated into 2 channels.

[0030] After acquiring signals from multiple voltage sources through a series resistor voltage divider, the signals are input to the multi-channel multiplexed analog switch chip U2. The DSP sends control signals, which are isolated by the digital isolator U1 and then sent to the multi-channel multiplexed analog switch chip U2 for channel selection. The control signals cycle in a fixed period, thus achieving 8-channel voltage signal input and 2-channel voltage signal output. This method reduces the 8 optocouplers required for traditional voltage sampling to only 2, significantly reducing the use of optocouplers. With the reduction in optocouplers, the area and cost of the board can be significantly reduced.

[0031] The operational amplifier isolation circuit includes an isolation optocoupler U4, operational amplifiers U3 and U5, resistors R20, R21, R22, R23, R25, R26, R27, and capacitor C3. One end of resistor R20 is connected to the positive input terminal of operational amplifier U3. The negative input terminal of operational amplifier U3 is connected to the positive input terminal and then connected to the isolation optocoupler U4 through resistor R22. One end of resistor R21 is connected between operational amplifier U3 and resistor R22, and the other end of resistor R21 is connected to one end of capacitor C3. The other end is connected between resistor R22 and isolation optocoupler U4. One end of resistor R23 is connected to isolation optocoupler U4, and the other end of resistor R23 is connected to the positive input terminal of operational amplifier U5 through one end of R25. One end of resistor R26 is connected to isolation optocoupler U4, and the other end of resistor R26 is connected to the output terminal of operational amplifier U5 through resistor R27. The negative input terminal of operational amplifier U5 is connected between resistors R26 and R27. One end of resistor R28 is connected to the output terminal of operational amplifier U5.

[0032] After the selected voltage signal is output from the multi-channel multiplexed analog switch chip U2, it first reaches operational amplifier U3. Operational amplifier U3 forms a voltage follower through resistor R20 and wiring. Due to the high input impedance and low output impedance of operational amplifiers, this characteristic reduces the output resistance of the voltage signal, thereby reducing voltage loss in the downstream circuitry and ensuring signal quality. The output voltage signal from operational amplifier U3 passes through pull-down resistor R21, current-limiting resistor R22, and filter capacitor C3 before being input to isolation optocoupler U4. After being isolated and converted to low voltage ground by optocoupler U4, it is transmitted to the input of operational amplifier U5. Operational amplifier U5 forms a differential operational amplifier through resistors R23, R25, R26, R27 and wiring, thereby reducing the output resistance of the voltage signal and ensuring signal quality. Finally, the voltage signal is output from operational amplifier U5 and transmitted to the DSP voltage signal detection pin, where the DSP performs the corresponding conversion calculations.

[0033] The two voltage signal outputs of the multi-channel multiplexed analog switch chip U2 are first voltage followed by operational amplifier U3 and then input to isolation optocoupler U4. Optocoupler U4 isolates the output signal and sends it to operational amplifier U5. Operational amplifier U5 differentially amplifies the signal and then transmits it to the DSP for internal processing to obtain the voltage sample value. This voltage sampling method effectively solves the voltage deviation problem of traditional voltage sampling and significantly saves cost and board space.

[0034] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A voltage sampling circuit for a DC high-voltage system, characterized in that, include: A voltage divider circuit is used to divide multiple DC high voltages and output a voltage sampling signal. The sampling channel selection circuit is used to select the output voltage signal after isolating the voltage sampling signal; as well as Operational amplifier isolation circuit is used to reduce the output resistance of voltage signals before output.

2. The voltage sampling circuit for a DC high-voltage system according to claim 1, characterized in that: The voltage divider circuit includes resistors R1 and R2. One end of resistor R1 is connected to one end of resistor R2 and then connected to the high voltage negative of multiple DC high voltage circuits. The other end of resistor R1 is connected to the high voltage positive of multiple DC high voltage circuits.

3. The voltage sampling circuit for a DC high-voltage system according to claim 2, characterized in that: The voltage divider circuit also includes a capacitor C1, one end of which is connected between resistors R1 and R2, and capacitor C1 and resistor R2 are connected in parallel.

4. The voltage sampling circuit for a DC high-voltage system according to claim 3, characterized in that: The voltage divider circuit also includes a diode D1, with pin 1 of the diode D1 connected to one end of the resistor R2 and pin 3 of the diode D1 connected to the other end of the resistor R2.

5. The voltage sampling circuit for a DC high-voltage system according to claim 1, characterized in that: The sampling channel selection circuit includes a digital isolator U1, a multi-channel multiplexed analog switch chip U2, and resistors R12, R13, R14, R15, R16, R17, R18, and R19. Resistors R12, R13, R14, R15, R16, R17, R18, and R19 are respectively connected to the digital isolator U1, and the digital isolator U1 is connected to the multi-channel multiplexed analog switch chip U2.

6. The voltage sampling circuit for a DC high-voltage system according to claim 1, characterized in that: The operational amplifier isolation circuit includes an isolation optocoupler U4, operational amplifiers U3 and U5, resistors R20, R21, R22, R23, R25, R26, R27, and capacitor C3. One end of resistor R20 is connected to the positive input terminal of operational amplifier U3. The negative input terminal of operational amplifier U3 is connected to the positive input terminal and then connected to the isolation optocoupler U4 through resistor R22. One end of resistor R21 is connected between operational amplifier U3 and resistor R22, and the other end of resistor R21 is connected to one end of capacitor C3. The other end of the resistor is connected between resistor R22 and isolation optocoupler U4. One end of resistor R23 is connected to isolation optocoupler U4, and the other end of resistor R23 is connected to the positive input terminal of operational amplifier U5 through one end of resistor R25. One end of resistor R26 is connected to isolation optocoupler U4, and the other end of resistor R26 is connected to the output terminal of operational amplifier U5 through resistor R27. The negative input terminal of operational amplifier U5 is connected between resistors R26 and R27. One end of resistor R28 is connected to the output terminal of operational amplifier U5.

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