Chip packaging structure and electronic device
By using conductive films and/or insulating films in the chip packaging structure and covering the outer surface of the conductive films with a molding layer, the problems of cumbersome processes and poor shielding effects in the prior art are solved, achieving efficient electromagnetic shielding and improved yield.
Patent Information
- Application Number
- CN202520144320.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-21
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2035-01-21
AI Technical Summary
Existing chip packaging structures suffer from cumbersome processes, mediocre shielding effectiveness, and susceptibility to detachment in terms of electromagnetic shielding, which affects product yield.
Electromagnetic shielding effects of cavity separation and conformal shielding are achieved by attaching conductive films and/or insulating films to the exposed surfaces of the substrate and chip, and covering the outer surface of the conductive films with a molding layer, while avoiding the conductive films from falling off and simplifying the process.
It improves electromagnetic shielding effectiveness, reduces manufacturing process difficulty and cost, increases product yield, and simplifies process flow.
Smart Images
Figure CN223844288U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor manufacturing technology, and in particular to a chip packaging structure and electronic device. Background Technology
[0002] With the development of System-in-Package (SiP) technology, the integration and modularization of RF front-end modules have also been further developed. Consequently, chips with different functions need to be integrated within the same SiP module. However, electromagnetic interference can easily occur between chips and between modules, affecting device performance.
[0003] Currently, common electromagnetic shielding methods are divided into cavity shielding and conformal shielding. Cavity shielding is used to improve electromagnetic interference between internal chips, while conformal shielding is used to isolate electromagnetic interference between modules. Existing cavity shielding processes use wire bonding (WB) to form metal wires between chips as a shielding structure; or laser-grooving is used to fill the grooves with metal material to form a metal isolation wall between chips to achieve shielding. However, both of these cavity shielding processes are relatively cumbersome and the shielding effect is generally limited. Furthermore, existing conformal shielding processes involve cutting the packaged structure into individual chips after packaging, exposing the chip sidewalls; then, conductive materials are coated onto the product surface using sputtering or spraying processes to form a shielding layer outside the molding compound. However, existing conformal shielding processes are not only cumbersome and difficult to implement, but also have limited adhesion between the shielding layer and the molding compound surface, making them prone to risks such as shielding layer detachment due to mismatch in the coefficient of thermal expansion (CTE). In addition, the debris from the detached shielding layer can easily cause metal contamination, affecting the product yield.
[0004] Therefore, a new chip packaging structure is urgently needed to solve the above-mentioned technical problems. Utility Model Content
[0005] The purpose of this invention is to provide a chip packaging structure and electronic device to solve the technical problem of how to improve the electromagnetic shielding effect of chips while simplifying the process flow.
[0006] To solve the above technical problems, this utility model provides a chip packaging structure, including:
[0007] A substrate; at least one chip is mounted on the substrate.
[0008] A conductive film and / or a separating film; the conductive film or the separating film is attached to the exposed surfaces of the substrate and the at least one chip;
[0009] A molding layer; the molding layer at least covers the surface of the conductive film or the insulating film.
[0010] Optionally, in the chip packaging structure, the chip packaging structure includes the conductive film, and the at least one chip includes a filter chip and a non-filter chip;
[0011] The conductive film covers the filter chip and forms a first cavity, in which the filter chip is housed; the conductive film covers the non-filter chip and forms a second cavity, in which the non-filter chip is housed; and the molding layer covers the surface of the conductive film.
[0012] Optionally, in the chip packaging structure, the chip packaging structure includes the conductive film and the isolation film, and the at least one chip includes a filter chip and a non-filter chip;
[0013] The isolation membrane covers the filter chip and forms a first cavity, in which the filter chip is housed; the isolation membrane covers the non-filter chip and forms a second cavity, in which the non-filter chip is housed; and the conductive film is attached to the surface of the isolation membrane, and the molding layer is attached to the surface of the conductive film.
[0014] Optionally, in the chip packaging structure, the chip packaging structure includes the isolation film, and the at least one chip includes a filter chip and a non-filter chip.
[0015] The isolation membrane covers the filter chip and forms a first cavity, in which the filter chip is housed; the isolation membrane covers the non-filter chip and forms a second cavity, in which the non-filter chip is housed; and the molding compound is attached to the surface of the isolation membrane.
[0016] Optionally, in the chip packaging structure, the molding layer is doped with metal particles to make the molding layer conductive; and the substrate has a ground terminal, and the molding layer is connected to the ground terminal.
[0017] Optionally, in the chip packaging structure, the molding layer is an insulating material, or the molding layer is doped with metal particles to make the molding layer conductive.
[0018] Optionally, in the chip packaging structure, the substrate has a ground terminal, and the conductive film is connected to the ground terminal.
[0019] Optionally, in the chip packaging structure, the second cavity has an opening to allow the molding layer to fill the second cavity.
[0020] Optionally, in the chip packaging structure, the second cavity has a plurality of openings, and the plurality of openings are spaced apart.
[0021] Based on the same concept, this utility model also provides an electronic device, including the aforementioned chip packaging structure.
[0022] In summary, this utility model provides a chip packaging structure and electronic device. Compared to the prior art, the chip packaging structure includes a conductive film and / or an isolation film. When the conductive film or the conductive film and the isolation film are provided, the conductive film, which plays a shielding role, is attached to the substrate and the exposed surfaces of at least one chip, simultaneously achieving electromagnetic shielding effects of cavity shielding and conformal shielding. Furthermore, by using the molding compound to cover the outer surface of the conductive film, the risk of conductive film detachment can be effectively avoided, thereby preventing metal contamination and other problems caused by conductive film detachment, which is beneficial to improving product yield. In addition, by placing the conductive film within the molding compound, the entire substrate can be cut after the molding process is completed, eliminating the need to first cut it into small device particles and then form the shielding film layer one by one, significantly reducing the difficulty of the manufacturing process and improving manufacturing efficiency.
[0023] Furthermore, when only the isolation membrane is used, the encapsulation layer covering the isolation membrane is conductive. The encapsulation layer can replace the conductive membrane to achieve the effect of electromagnetic shielding, and there is no need to form a separate shielding film layer, which not only ensures product quality but also reduces costs and simplifies the process. Attached Figure Description
[0024] Those skilled in the art will understand that the accompanying drawings are provided to better understand the present invention and do not constitute any limitation on the scope of the present invention.
[0025] Figure 1 This is a cross-sectional view of the chip packaging structure of the first example in the embodiments of this utility model.
[0026] Figure 2 This is a cross-sectional view of the chip packaging structure of the second example in the embodiments of this utility model.
[0027] Figure 3 This is a cross-sectional view of the chip packaging structure of the third example in the embodiments of this utility model.
[0028] Figure 4 The present invention has an opening. Figure 1 The diagram shows a cross-sectional view of the chip packaging structure.
[0029] Figure 5 The present invention has an opening. Figure 2 The diagram shows a cross-sectional view of the chip packaging structure.
[0030] Figure 6 The present invention has an opening. Figure 3 The diagram shows a cross-sectional view of the chip packaging structure.
[0031] Figure 7 This is a top view of the second cavity having an opening in an embodiment of the present invention.
[0032] Figure 8 This is a top view of the second cavity having two openings in an embodiment of this utility model.
[0033] Figure 9 This is a top view of the second cavity having three openings in an embodiment of this utility model.
[0034] And, in the attached image:
[0035] 100-Substrate; 100a-Electrical terminal; 100b-Ground terminal; 101-Filter chip; 101a-First connector; 102-Non-filter chip; 102-Second connector; 103-Conductive film; 104-Encapsulation layer; 105-Isolation film; K-Opening. Detailed Implementation
[0036] To make the objectives, advantages, and features of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clearly illustrate the purpose of the embodiments of this utility model. Furthermore, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may emphasize different aspects and sometimes use different scales. It should also be understood that, unless specifically stated or indicated, the terms "first," "second," "third," etc., in the specification are only used to distinguish the various components, elements, steps, etc., in the specification, and are not used to indicate the logical or sequential relationships between the various components, elements, steps, etc.
[0037] Please see Figure 1 and Figure 2 This embodiment provides a chip packaging structure, including: a substrate 100; at least one chip is mounted on the substrate 100; a conductive film 103 and / or an isolation film 105; the conductive film 103 or the isolation film 105 is attached to the exposed surfaces of the substrate 100 and the at least one chip; a molding compound 104; the molding compound 104 at least covers the surface of the conductive film 103 or the isolation film 105.
[0038] Based on this, the chip packaging structure provided in this embodiment can both simplify the process flow and improve the electromagnetic shielding effect of the chip.
[0039] The following is in conjunction with the appendix Figures 1 to 9 The chip packaging structure provided in this embodiment will be described in detail below.
[0040] Please continue reading. Figure 1 and Figure 2 The chip packaging structure provided in this embodiment includes a substrate 100, a conductive film 103 and / or an isolation film 105, and a molding compound 104. The substrate 100 serves as a carrier plate for chip packaging; the conductive film 103 has a certain conductivity and can reflect and absorb electromagnetic waves to achieve electromagnetic shielding; the isolation film 105 can support and form a stable cavity structure; the molding compound 104 is made of molding compound material and is used to protect the chip from mechanical damage and environmental influences.
[0041] Specifically, the substrate 100 includes, but is not limited to, a ceramic circuit board or a printed circuit board, which can be used to support chips, provide electrical connections, and achieve heat dissipation. The top surface of the substrate 100 has multiple electrical terminals 100a that are connected to the chips, so each chip can be mounted on the top surface of the substrate 100 and connected to the corresponding electrical terminal 100a. In this embodiment, one or more chips can be mounted on the substrate 100. For example, the substrate 100 is mounted with radio frequency (RF) chips, including filter chips 101 and non-filtered chips 102. The non-filtered chips 102 include, but are not limited to, switches, power amplifiers (PA), and low-noise amplifiers (LNA). The filter chip 101 is connected to the corresponding electrical terminal 100a on the substrate 100 via a first connector 101a, and the non-filtered chip 102 is connected to the corresponding electrical terminal 100a on the substrate 100 via a second connector 102a, to achieve electrical connections respectively. Optionally, the materials of the first connector 101a and the second connector 102a may include gold, silver, aluminum, copper, tungsten, titanium, nickel or other metal alloys.
[0042] In the first example, such as Figure 1As shown, the chip packaging structure only includes the conductive film 103 and does not include the isolation film 105. The conductive film 103 is attached to the exposed surfaces of the substrate 100 and at least one chip to achieve electromagnetic shielding. In this embodiment, the specific material of the conductive film 103 is not limited; it can be a metal material or a colloidal material mixed with metal particles. Preferably, the conductive film 103 includes a thermosetting adhesive film, and after baking, the thermosetting adhesive film can form a good bond with the substrate 100 and the surfaces of each chip, ensuring a better shielding effect and guaranteeing product stability. Based on this, the conductive film 103 attached to the outer surface of the chip not only serves as cavity shielding between chips but also as shielding between modules, i.e., conformal shielding. In other words, directly attaching the conductive film 103 to the outer surface of the chip can achieve both cavity shielding and conformal shielding electromagnetic shielding effects, not only improving the shielding effect but also simplifying the manufacturing process and making it easy to operate.
[0043] Furthermore, a filter chip 101 and a non-filter chip 102 are mounted on the substrate 100. The conductive film 103 covers the exposed surface of the substrate 100 and surrounds and covers the filter chip 101 and the non-filter chip 102. Under the surrounding effect of the conductive film 103, a first cavity is formed on the outer surface of the filter chip 101 and a second cavity is formed on the outer surface of the non-filter chip 102, so that the filter chip 101 and the non-filter chip 102 are respectively housed in their respective cavities. It should be noted that since the filter chip 101 includes an interdigital transducer, and the interdigital transducer has very high environmental requirements, when there are polluting particles or air disturbances in its environment, the interdigital transducer will be interfered with, causing the filtering frequency band to shift, thereby affecting product performance. Therefore, in this embodiment, by surrounding and sealing the filter chip 101 in the first cavity with the conductive film 103, not only electromagnetic shielding can be achieved, but also the interdigital transducer can be kept in a stable environment, which is beneficial to improving product performance. The other non-filtering chips 102 are located in the second cavity formed by the conductive film 103, which can also ensure their stable operation and enhance the overall reliability of the product.
[0044] Furthermore, a grounding terminal 100b is also provided on the top surface of the substrate 100, and the conductive film 103 is connected to the grounding terminal 100b. Figure 1In the example shown, while the conductive film 103 is attached to the surface of the substrate 100, the conductive film 103 can be directly connected to the ground terminal 100b. It is understood that connecting the conductive film 103 to the ground terminal 100b not only directs interference signals on the conductive film 103 to the ground terminal, reducing the impact of electromagnetic interference on the chip, but also provides electrostatic discharge protection, preventing damage to the chip from static electricity buildup.
[0045] Please continue reading. Figure 1 The molding compound 104 at least covers the surface of the conductive film 103. In other words, the molding compound 104 is formed on the surface of the conductive film 103 to encapsulate and cover the conductive film 103 and each chip, and even cover the entire substrate 100. The molding compound 104 can be formed using a transfer molding process or a compression molding process; and the material of the molding compound 104 includes epoxy molding compound or other similar insulating materials, which can provide insulation and protection. Compared to the prior art where the shielding film is placed on the outer surface of the molding compound 104, in this embodiment, the conductive film 103 is placed inside the molding compound 104, which can avoid problems such as the conductive film 103 falling off, thereby avoiding metal contamination caused by the detachment of the conductive film 103 and improving product yield. Furthermore, in this embodiment, after the molding compound 104 covers the conductive film 103, the entire substrate 100 is then cut to directly obtain multiple individual modules; that is, the chip packaging structure referred to in this embodiment. In contrast, existing technologies require forming the molding compound 104 and cutting the entire substrate 100 before forming shielding layers on the outer surfaces of each smaller individual module. The chip packaging structure provided in this embodiment offers a simpler and more efficient process.
[0046] In the second example, please refer to Figure 2 Since the filter chip 101 needs to operate within a stable first cavity, then in Figure 1In the structure shown, the conductive film 103 is appropriately thickened to ensure the stability of the morphology of the first cavity. To this end, this embodiment also provides a chip packaging structure, including the conductive film 103 and the isolation film 105. The isolation film 105 is used to form the first cavity and the second cavity, so the thickness of the conductive film 103 can be relatively reduced. Specifically, continuing with the example of an RF chip, the filter chip 101 and the non-filter chip 102 are mounted on the substrate 100. The isolation film 105 covers the exposed surface of the substrate 100 and the exposed surface of each chip. The isolation film 105 covers the filter chip 101 and forms a first cavity, so that the filter chip 101 is housed within the first cavity. Similarly, the isolation film 105 also covers the non-filter chip 102 and forms a second cavity, so that the non-filter chip 102 is housed within the corresponding second cavity. The isolation film 105 is a conventional coating material, and this embodiment does not limit the specific material. After baking and curing, the isolation film 105 can form a good bond with the surface of the chip and the substrate 100. Then, the conductive film 103 is attached to the outer surface of the isolation film 105, which not only achieves electromagnetic shielding but also enhances the strength of the first cavity and other second cavities, improving device reliability. Furthermore, the molding compound 104 covers and encapsulates the conductive film 103 and the substrate 100 as a protective layer for the chip packaging structure.
[0047] Furthermore, since the conductive film 103 needs to be connected to the ground terminal 100b on the substrate 100, therefore... Figure 2 As shown, before forming the conductive film 103, a through hole is first formed on the isolation film 105 at a position opposite to the ground terminal 100b to expose the ground terminal 100b. Then, when forming the conductive film 103, the material of the conductive film 103 will connect with the corresponding ground terminal 100b through the through hole, thereby achieving the connection between the conductive film 103 and the ground terminal 100b.
[0048] Furthermore, in the above Figure 1 and Figure 2 In the chip packaging structure shown, the molding compound 104 can be either an insulating material or a conductive material. Specifically, when the molding compound 104 is an insulating material, it can be epoxy resin or other similar insulating materials. When the molding compound 104 is a conductive material, metal particles can be doped into the original insulating molding compound 104 to give it high conductivity, thereby achieving double-layer electromagnetic shielding. In other words, since the molding compound 104 is also conductive, the electromagnetic shielding effect against electromagnetic interference can be further improved on the basis of the electromagnetic shielding of the conductive film 103, thus improving product performance.
[0049] In the third example, such as Figure 3 As shown, to further simplify the process and reduce costs, the chip packaging structure only contains the isolation film 105. The isolation film 105 is disposed in a manner similar to... Figure 2 The setup methods in the structures shown are the same. However, the difference is that... Figure 3 In the structure shown, the conductive film 103 is not required. Instead, metal particles are doped into the insulating molding layer 104 to give it high conductivity. That is, by utilizing the conductive molding layer 104 as an electromagnetic shielding film, a separate shielding film is unnecessary. A single molding layer 104 can achieve both molding protection and electromagnetic shielding, reducing costs and simplifying the manufacturing process. It should be noted that the conductive molding layer 104 also needs to be connected to the ground terminal 100b on the substrate 100. Similarly, laser ablation, etching, or other processes can be used to form a through-hole in the insulating film 105 at the position opposite the ground terminal 100b to expose the ground terminal 100b, allowing the molding layer 104 to connect to the ground terminal 100b through the through-hole.
[0050] Please see Figure 4 , Figure 5 and Figure 6 As described above, the filter chip 101 needs to be housed in the first cavity to ensure operational stability. However, for chips like the non-filter chip 102, it is not necessary to house them in the second cavity. If all chips are housed in their respective cavities, the outer film layers of each cavity need to be thickened to achieve good shaping of each cavity. However, this also increases the stress on each cavity. Clearly, housing all chips in their respective cavities presents many constraints on the manufacturing process. Therefore, in this embodiment, an opening K can be provided on the second cavity corresponding to the non-filter chip 102 to allow the molding compound 104 to fill the corresponding second cavity. Figure 3 As shown, after forming the conductive film 103, the opening K can be formed on the second cavity of the non-filtering chip 102 by laser ablation, etching, or other methods. Then, when forming the molding compound 104, the material of the molding compound 104 will enter the second cavity through the opening K, balancing the internal and external stresses of the second cavity. Similarly, in Figure 4 In the structure shown, after forming the isolation film 105 and the conductive film 103, the opening K can be formed on the second cavity of the non-filtering chip 102, and the opening K penetrates the isolation film 105 and the conductive film 103, so that when the molding compound 104 is formed, the material of the molding compound 104 fills the corresponding second cavity through the opening K. And, as... Figure 6 As shown, after the isolation film 105 is formed, the opening K is formed on the second cavity of the non-filter chip 102 so that when the molding layer 104 is formed, the material of the molding layer 104 fills the corresponding second cavity through the opening K.
[0051] Preferably, one, two, three, or more openings K may be provided on the second cavity corresponding to the non-filter chip 102; this embodiment does not specifically limit this. Please refer to [link / reference]. Figure 7 The second cavity corresponding to the non-filtering chip 102 is a single-sided perforated membrane. That is, only one opening K is provided, and the opening K is located on one side of the second cavity and extends along the side wall of the second cavity for a certain distance to ensure that the molding layer 104 fully fills the second cavity. Alternatively, when the second cavity has multiple openings K, the multiple openings K are distributed at intervals. Please refer to [link to relevant documentation]. Figure 8 The second cavity is a polygonal membrane structure, for example, with two openings K located on opposite sides of the second cavity. When forming the encapsulation layer 104, the encapsulating material can simultaneously enter the second cavity through both openings K, accelerating the filling of the second cavity. Also, please refer to... Figure 9 The second cavity is a dashed membrane rupture, for example, three openings K are provided on one side of the second cavity, and each opening K is spaced apart and arranged linearly.
[0052] Based on the same concept, this embodiment also provides an electronic device, including the chip packaging structure described above. For example, the electronic device is a radio frequency device.
[0053] In summary, this embodiment provides a chip packaging structure and electronic device, wherein a conductive film 103 and / or an isolation film 105 are disposed within the chip packaging structure. When the conductive film 103 or both the conductive film 103 and the isolation film 105 are disposed, the conductive film 103, which provides shielding, is attached to the substrate 100 and the exposed surfaces of at least one chip, simultaneously achieving electromagnetic shielding effects of cavity shielding and conformal shielding. Furthermore, by using the molding compound 104 to cover the outer surface of the conductive film 103, the risk of the conductive film 103 detaching can be effectively avoided, thereby preventing metal contamination and other problems caused by the detachment of the conductive film 103, which is beneficial for improving product yield. In addition, by placing the conductive film 103 within the molding compound 104, the entire substrate 100 can be cut after the molding process is completed, eliminating the need to first cut it into small device particles and then form the shielding film layer one by one, significantly reducing the difficulty of the manufacturing process and improving manufacturing efficiency. When only the isolation film 105 is provided within the chip packaging structure, the molding layer 104 covering the isolation film 105 is conductive. The molding layer 104 can replace the conductive film 103 to achieve the effect of electromagnetic shielding, thus eliminating the need to form a separate shielding film layer. Therefore, the molding layer 104 not only achieves the effects of molding protection and electromagnetic shielding, but also reduces manufacturing costs and simplifies the process.
[0054] Furthermore, it should be understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the present invention's technical solutions using the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention's technical solutions. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention's technical solutions, shall still fall within the protection scope of the present invention's technical solutions.
Claims
1. A chip packaging structure, characterized in that, include: substrate; At least one chip is mounted on the substrate; A conductive film and / or a separating film; the conductive film or the separating film is attached to the exposed surfaces of the substrate and the at least one chip; A molding layer; the molding layer at least covers the surface of the conductive film or the insulating film.
2. The chip packaging structure according to claim 1, characterized in that, The chip packaging structure includes the conductive film, and the at least one chip includes a filter chip and a non-filter chip; The conductive film covers the filter chip and forms a first cavity, in which the filter chip is housed; the conductive film covers the non-filter chip and forms a second cavity, in which the non-filter chip is housed; and the molding layer covers the surface of the conductive film.
3. The chip packaging structure according to claim 1, characterized in that, The chip packaging structure includes the conductive film and the isolation film, and the at least one chip includes a filter chip and a non-filter chip; The isolation membrane covers the filter chip and forms a first cavity, in which the filter chip is housed; the isolation membrane covers the non-filter chip and forms a second cavity, in which the non-filter chip is housed; and the conductive film is attached to the surface of the isolation membrane, and the molding layer is attached to the surface of the conductive film.
4. The chip packaging structure according to claim 1, characterized in that, The chip packaging structure includes the isolation film, and the at least one chip includes a filter chip and a non-filter chip. The isolation membrane covers the filter chip and forms a first cavity, in which the filter chip is housed; the isolation membrane covers the non-filter chip and forms a second cavity, in which the non-filter chip is housed; and the molding compound is attached to the surface of the isolation membrane.
5. The chip packaging structure according to claim 4, characterized in that, The molding layer is doped with metal particles to make it conductive; and the substrate has a ground terminal, which is connected to the molding layer.
6. The chip packaging structure according to any one of claims 1 to 3, characterized in that, The molding layer is made of an insulating material, or the molding layer contains metal particles to make the molding layer conductive.
7. The chip packaging structure according to claim 2 or 3, characterized in that, The substrate has a ground terminal, and the conductive film is connected to the ground terminal.
8. The chip packaging structure according to any one of claims 2 to 4, characterized in that, The second cavity has an opening to allow the encapsulation layer to fill the second cavity.
9. The chip packaging structure according to claim 8, characterized in that, The second cavity has a plurality of openings, and the plurality of openings are spaced apart.
10. An electronic device, characterized in that, Includes the chip packaging structure as described in any one of claims 1 to 9.