Broadband gain-controllable limiting amplifier circuit and optical module

Abstract

The embodiment of the utility model provides a broadband gain-controllable limiting amplifier circuit and an optical module. The broadband gain-controllable limiting amplifier circuit comprises a plurality of differential amplification modules which are connected in series and used for amplifying input signals step by step; the differential amplification module comprises a differential amplification circuit, a proportional current source and a current adjusting circuit, and the proportional current source is used for outputting a second current at an output end of the proportional current source according to a preset proportion and a first current input at an input end of the proportional current source to serve as a tail current of the differential amplification circuit; the current adjusting circuit comprises a plurality of parallel current sources for inputting current to the input end of the proportional current source, at least one of the parallel current sources is provided with a corresponding switch component, and the switch component is used for switching on or switching off the current input to the input end of the proportional current source by the corresponding current source so as to adjust the first current.

Description

[0001] Related Applications

[0002] The present application claims priority to the Chinese patent application No. 2024209228671, filed on April 29, 2024, entitled "Wideband gain controllable limiting amplifier circuit and optical module", the contents of which are incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The utility model relates to the field of optical communication, especially to a wideband gain controllable limiting amplifier circuit and optical module. BACKGROUND

[0004] In the field of optical communication, especially in the optical chip transceiver circuit, the signal frequency is very high, and the optical signal is usually weak. It is just because of the weak signal and high frequency band that an ultra-wideband circuit is used to process the signal in the design of the optical chip transceiver circuit. At the same time, in the transceiver circuit, especially in the analog signal part, the requirements of low noise and high linearity also need to be met. SUMMARY

[0005] Therefore, the present disclosure provides a wideband gain controllable limiting amplifier circuit and optical module.

[0006] According to a first aspect of the present disclosure, a wideband gain controllable limiting amplifier circuit is provided, which comprises: a plurality of differential amplification modules, wherein the plurality of differential amplification modules are connected in series and used for step-by-step amplification of an input signal; the differential amplification module comprises a differential amplification circuit, a proportional current source and a current adjusting circuit, wherein,

[0007] The proportional current source is used to output a second current at the proportional current source output end according to a first current input at the proportional current source input end, as a tail current of the differential amplification circuit;

[0008] The current adjusting circuit comprises a plurality of parallel current sources inputting current to the proportional current source input end, wherein at least one current source of the plurality of parallel current sources has a corresponding switching component, and the switching component is used to turn on or turn off the current input by the corresponding current source to the proportional current source input end to adjust the first current.

[0009] In some embodiments, the differential amplification circuit comprises a first transistor, a second transistor, a first resistor and a second resistor, wherein,

[0010] The first end of the first resistor, the first end of the second resistor and a power supply are connected,

[0011] The second end of the first resistor is connected with the first end of the first transistor and serves as a first output end, and the second end of the second resistor is connected with the first end of the second transistor and serves as a second output end.

[0012] The second end of the first transistor and the second end of the second transistor are connected with the output end of the proportional current source.

[0013] The control end of the first transistor serves as a first input end of the differential amplification circuit, and the control end of the second transistor serves as a second input end of the differential amplification circuit.

[0014] In some embodiments, the differential amplification circuit further comprises: a first inductor and a second inductor; wherein,

[0015] The first inductor is arranged between the first end of the first resistor and the power supply.

[0016] The second inductor is arranged between the first end of the second resistor and the power supply.

[0017] In some embodiments, the proportional current source comprises: a third transistor and a fourth transistor, wherein,

[0018] The first end of the fourth transistor and the control end of the fourth transistor are connected, and the first current is input to the input end of the proportional current source.

[0019] The first end of the third transistor serves as an output end of the proportional current source to output the second current.

[0020] The control end of the third transistor and the control end of the fourth transistor are connected.

[0021] The second end of the third transistor, the second end of the fourth transistor and the power supply are connected.

[0022] In some embodiments, the plurality of parallel current sources comprises at least one of:

[0023] A first current source directly connected with the input end of the proportional current source.

[0024] N second current sources respectively connected with the input end of the proportional current source through corresponding switching components, wherein N is an integer greater than or equal to 1.

[0025] In some embodiments, the switching component comprises a switching transistor, wherein,

[0026] The first end of the switch transistor is connected with the second current source, the second end of the switch transistor is connected with the proportional current source input end, and the control end of the switch transistor is used for inputting a control signal. The switch transistor controls the connection between the second current source and the proportional current source input end to be turned on or turned off based on the control signal.

[0027] In some embodiments, the second current source has three, and the output current ratio of the three second current sources is 1:2:4.

[0028] In some embodiments, the minimum output current of the three second current sources is equal to I times the output current of the first current source, I being an integer greater than or equal to 1; or

[0029] The minimum output current of the three second current sources is equal to J times the output current of the first current source, J being an integer greater than or equal to 1.

[0030] According to a second aspect of the embodiments of the present disclosure, a light module is provided, which comprises the wideband gain controllable limiting amplifier circuit of the first aspect.

[0031] According to the embodiments of the present disclosure, the wideband gain controllable limiting amplifier circuit comprises a plurality of differential amplification modules connected in series for performing step-by-step amplification on an input signal. The differential amplification module comprises a differential amplification circuit, a proportional current source, and a current adjusting circuit. The proportional current source is configured to output a second current at a predetermined ratio at a proportional current source output end according to a first current input at a proportional current source input end, so as to serve as a tail current of the differential amplification circuit. The current adjusting circuit comprises a plurality of parallel current sources configured to input a current to the proportional current source input end. At least one of the plurality of parallel current sources has a corresponding switch component configured to turn on or turn off the current input by the corresponding current source to the proportional current source input end, so as to adjust the first current. In this way, the first aspect realizes step-by-step amplification of a signal through the cascaded differential amplification modules. Compared with the amplification mode using a single-stage amplification module, the gain multiple of each differential amplification module in the cascaded differential amplification modules can be reduced, and the distortion problem caused by high gain can be reduced. The second aspect uses the differential amplification module to suppress common-mode noise of the signal and improve signal accuracy. The third aspect realizes amplification gain adjustment of each differential amplification module through the proportional current source and the current adjusting circuit, improves the flexibility of gain adjustment, and meets different amplification requirements of the signal. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0033] Figure 2 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0034] Figure 3 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0035] Figure 4 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0036] Figure 5 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0037] Figure 6 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0038] Figure 7 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0039] Figure 8 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0040] Figure 9 A wideband gain controllable limiting amplifier circuit structure schematic diagram according to an exemplary embodiment is shown in the figure.

[0041] Figure 10 An optical module structure schematic diagram according to an exemplary embodiment is shown in the figure. DETAILED DESCRIPTION

[0042] In order to make the technical scheme and beneficial effects of the present application more obvious and easy to understand, the following will be described in detail by means of specific embodiments. The drawings are not necessarily drawn to scale, and local features can be enlarged or reduced to more clearly show the details of local features; unless otherwise defined, the technical and scientific terms used herein have the same meaning as the technical and scientific terms in the technical field to which the present application belongs.

[0043] The embodiments of the present disclosure are not exhaustive, but only illustrate some embodiments, and are not specific limitations on the protection scope of the present disclosure. In the case of no contradiction, each step in an embodiment can be implemented as an independent embodiment, and the steps can be combined arbitrarily, for example, the scheme after removing part of the steps in an embodiment can also be implemented as an independent embodiment, and the order of the steps in an embodiment can be exchanged arbitrarily, in addition, the optional implementation manners in an embodiment can be combined arbitrarily; in addition, the embodiments can be combined arbitrarily, for example, part or all steps of different embodiments can be combined arbitrarily, an embodiment can be combined with optional implementation manners of other embodiments arbitrarily.

[0044] In each embodiment of the present disclosure, the terms and / or descriptions between the embodiments are consistent if there is no special description and logical conflict, and can be referred to each other, and the technical features in different embodiments can be combined to form a new embodiment according to the logical relationship between them.

[0045] The terms used in the embodiments of the present disclosure are only for the purpose of describing the specific embodiments, and not as a limitation on the present disclosure.

[0046] In the embodiments of the present disclosure, unless otherwise specified, the elements expressed in singular form, such as "one", "a", "the", "above", "said", "preceding", "this" and the like, can represent "one and only one", and can also represent "one or more", "at least one" and the like. For example, in the case of using articles such as "a", "an", "the" and the like in English, the noun after the article can be understood as singular expression, and can also be understood as plural expression.

[0047] In the embodiments of the present disclosure, "a plurality of" means two or more.

[0048] In some embodiments, the terms "at least one of", "one or more", "a plurality of", "multiple" and the like can be replaced with each other.

[0049] In some embodiments, the description of "at least one of A, B", "A and / or B", "A in one case, B in another", "one of A or B", etc. can include the following technical solutions according to the situation: in some embodiments, A (A is executed independently of B); in some embodiments, B (B is executed independently of A); in some embodiments, A and B are selectively executed (A and B are selectively executed); in some embodiments, A and B are executed (A and B are executed). When there are more branches such as A, B, C, etc., the above is similar.

[0050] In some embodiments, the description of "A or B" and the like can include the following technical solutions according to the situation: in some embodiments, A (A is executed independently of B); in some embodiments, B (B is executed independently of A); in some embodiments, A and B are selectively executed (A and B are selectively executed). When there are more branches such as A, B, C, etc., the above is similar.

[0051] The prefix words "first", "second" and the like in the embodiments of the present disclosure are only used to distinguish different description objects, and do not constitute a limitation on the position, order, priority, value or content of the description object. The description of the description object should refer to the description in the context of the claims or embodiments, and should not constitute an additional limitation because of the use of the prefix word. For example, the description object is "field", and the ordinal words before "field" in "first field" and "second field" do not limit the position or order between "fields", and "first" and "second" do not limit whether the "fields" modified thereby are in the same message or not, nor limit the order of "first field" and "second field". For another example, the description object is "level", and the ordinal words before "level" in "first level" and "second level" do not limit the priority between "levels". For another example, the value of the description object is not limited by the ordinal word, and can be one or more. For example, "first device", wherein the value of "device" can be one or more. In addition, the objects modified by different prefix words can be the same or different, for example, the description object is "device", and "first device" and "second device" can be the same device or different devices, and their types can be the same or different; for another example, the description object is "information", and "first information" and "second information" can be the same information or different information, and their contents can be the same or different.

[0052] In some embodiments, "including A", "containing A", "for indicating A", "carrying A" can be interpreted as directly carrying A, or indirectly indicating A.

[0053] In some embodiments, the terms "…", "determining …", "in the case of …", "when …", "when …", "if …", etc. can be replaced with each other.

[0054] In some embodiments, the terms “greater than,” “greater than or equal to,” “not less than,” “more than,” “more than or equal to,” “not less than,” “higher than,” “higher than or equal to,” “not lower than,” and “above” can be used interchangeably, as can the terms “less than,” “less than or equal to,” “not greater than,” “less than,” “less than or equal to,” “not more than,” “lower than,” “lower than or equal to,” “not higher than,” and “below”.

[0055] In some embodiments, devices, etc., can be interpreted as physical or virtual, and their names are not limited to the names recorded in the embodiments. Terms such as “device”, “equipment”, “circuit”, “network element”, “node”, “function”, “unit”, “section”, “system”, “network”, “chip”, “chip system”, “entity”, and “subject” can be used interchangeably.

[0056] Furthermore, each element, each row, or each column in the table of this disclosure can be implemented as an independent embodiment, and any combination of any element, any row, or any column can also be implemented as an independent embodiment.

[0057] like Figure 1 and Figure 2 As shown, this embodiment proposes a wideband gain controllable limiting amplifier circuit 1 (hereinafter referred to as the amplifier circuit). The wideband gain controllable limiting amplifier circuit 1 includes: multiple differential amplifier modules 10, wherein the multiple differential amplifier modules 10 are connected in series for amplifying the input signal step by step; each differential amplifier module 10 includes: a differential amplifier circuit 110, a proportional current source 120, and a current adjustment circuit 130, wherein,

[0058] The proportional current source 120 is used to output a second current at the output terminal of the proportional current source 120 according to a predetermined ratio based on the first current input at the input terminal of the proportional current source 120, so as to serve as the tail current of the differential amplifier circuit 110.

[0059] The current regulation circuit 130 includes a plurality of parallel current sources 131 that input current to the input terminal of the proportional current source 120. At least one of the plurality of parallel current sources 131 has a corresponding switching component 132. The switching component 132 is used to turn on or off the current input to the input terminal of the proportional current source 120 by the corresponding current source 131, so as to regulate the first current.

[0060] Here, the wideband gain controllable limiting amplifier circuit 1 can be applied to the field of optical communication for amplifying signals. For example, the wideband gain controllable limiting amplifier circuit 1 is used to amplify signals obtained after photoelectric conversion.

[0061] The wideband gain controllable limiting amplifier circuit 1 comprises a plurality of differential amplification modules 10, each differential amplification module 10 serving as a stage of amplification, the output signal of the previous stage differential amplification module 10 serving as the input signal of the next stage differential amplification module 10, forming a cascaded amplification circuit. Thus, the input signal is amplified step by step. The input signal can include a differential input signal.

[0062] In one possible implementation, the tail current can include a transistor current flowing through the differential pair of the differential amplification circuit 110.

[0063] In one possible implementation, the tail current is used to adjust the gain and linear input range of the differential amplification circuit 110.

[0064] In one possible implementation, the proportional current source 120 can include a current mirror.

[0065] In one possible implementation, the predetermined ratio can include 1:1.

[0066] In one possible implementation, the proportional current source 120 outputting the second current as the tail current of the differential amplification circuit 110 can include: the proportional current source 120 extracting the second current from the transistor of the differential pair of the differential amplification circuit 110 as the tail current.

[0067] The plurality of parallel current sources 131 input currents to the proportional current source 120 in parallel. That is, the first current is the sum of the currents output by the plurality of parallel current sources 131 to the proportional current source 120.

[0068] In one possible implementation, a switch component 132 can turn on or off the current output by a current source 131 to the proportional current source 120, thereby adjusting the second current, i.e., the tail current of the differential amplification circuit 110. By adjusting the tail current, the gain of the differential amplification circuit 110 can be adjusted. By the proportional current source 120 and the current adjustment circuit 130, the amplification gain of each differential amplification module 10 can be adjusted to meet different amplification requirements of signals.

[0069] In a possible implementation, one proportional current source 120 and one current regulating circuit 130 correspond to one differential amplification module 10. That is, each differential amplification module 10 has one proportional current source 120 and one current regulating circuit 130. Each differential amplification module 10 has one proportional current source 120 and one current regulating circuit 130, which can realize independent adjustment of the gain of each differential amplification module 10 and improve the flexibility of gain adjustment of each differential amplification module 10.

[0070] In this way, in the first aspect, the cascade of differential amplification modules 10 realizes cascade amplification of the signal, which can reduce the gain multiple of each differential amplification module 10 in the cascade of differential amplification modules 10, and reduce the distortion problem caused by high gain, compared with the amplification mode using a single-stage amplification module. In the second aspect, the differential amplification module 10 can suppress common-mode noise of the signal and improve the accuracy of the signal. In the third aspect, the proportional current source 120 and the current regulating circuit 130 can realize gain adjustment of each differential amplification module 10, improve the flexibility of gain adjustment, and meet different amplification requirements of the signal.

[0071] In a possible implementation, one proportional current source 120 and one current regulating circuit 130 correspond to M differential amplification modules 10. That is, the same proportional current source 120 and current regulating circuit 130 are used in the M differential amplification modules 10. The proportional current source 120 (such as a current mirror) can copy M second currents in a predetermined proportion as the tail currents of the differential amplification circuits 110 in the M differential amplification modules 10. M is an integer greater than or equal to 1. In a possible implementation, M is the total number of differential amplification modules 10. The M differential amplification modules 10 have one proportional current source 120 and one current regulating circuit 130, which can realize overall adjustment of the gain of multiple differential amplification modules 10, reduce the number of proportional current sources 120 and current regulating circuits 130, and reduce the cost.

[0072] In some embodiments, as shown in Figure 3 The differential amplification circuit 110 includes a first transistor, a second transistor, a first resistor, and a second resistor, wherein

[0073] The first end of the first resistor and the first end of the second resistor are connected to a power supply,

[0074] The second end of the first resistor is connected to the first end of the first transistor and serves as a first output end, and the second end of the second resistor is connected to the first end of the second transistor and serves as a second output end.

[0075] The second end of the first transistor and the second end of the second transistor are connected to the output end of the proportional current source 120.

[0076] The control end of the first transistor is the first input end of the differential amplifier circuit 110, and the control end of the second transistor is the second input end of the differential amplifier circuit 110.

[0077] It should be noted that the transistor in the embodiments of the present application can be a field effect transistor or a bipolar transistor. The field effect transistor can include an N-type transistor and a P-type transistor. In a specific implementation, the gate of the N-type transistor and the P-type transistor is the control electrode thereof, and according to the signal of the gate of each transistor and the type thereof, the first end thereof can be the source electrode and the second end thereof can be the drain electrode, or the first end thereof can be the drain electrode and the second end thereof can be the source electrode. In the embodiments, the N-type transistor is taken as an example for illustration without special indication, in which the control end is the gate, the first end is the drain, and the second end is the source.

[0078] In one possible implementation, the differential amplifier circuit 110 adopts a common source circuit.

[0079] Figure 3 In the differential amplifier circuit 110, the input signals INN and INP are input to the first input end and the second input end respectively, the differential amplifier circuit 110 amplifies the input signals, and outputs two output signals OUTP and OUTN at the first output end and the second output end respectively.

[0080] Figure 3 In the differential amplifier circuit 110, the second end of the first transistor is connected to the second transistor, and the third transistor generates a tail current under the control of VB.

[0081] In one possible implementation, the resistance of the first resistor is equal to the resistance of the second resistor; and the first transistor is the same as the second transistor (for example, having the same size).

[0082] Figure 4 For Figure 3 The circuit schematic diagram of one side of the differential amplifier circuit 110 is shown in FIG. 2. Figure 5 For Figure 4 The equivalent schematic diagram of the circuit is shown in FIG. 3.

[0083] Figure 4 And Figure 5 In the differential amplifier circuit 110, CL is the input capacitance of the load (for example, the next stage differential amplifier circuit 110) of the differential amplifier circuit 110. By Figure 5 It can be known that Figure 4 The transfer function of the differential amplifier circuit 110 is shown in expression (1):

[0084]

[0085] In the expression, ω represents the angular frequency of the signal, g mThe transconductance of the input transistor, C L The input capacitance of the load of the differential amplification circuit 110 (a next-stage differential amplification circuit).

[0086] The amplification circuit as shown in FIG. 4 has a pole ω p As shown in expression (2):

[0087]

[0088] That is, Figure 3 The differential amplification circuit 110 has a pole.

[0089] In some embodiments, as shown in FIG. 5, the differential amplification circuit 110 further includes a first inductor and a second inductor. Figure 6

[0090] Wherein,

[0091] The first inductor is arranged between the first end of the first resistor and the power supply.

[0092] The second inductor is arranged between the first end of the second resistor and the power supply.

[0093] In one possible implementation, the resistance of the first resistor is equal to the resistance of the second resistor; the first transistor is the same as the second transistor (e.g., having the same size); and the inductance of the first inductor is equal to the inductance of the second inductor.

[0094] Figure 7 For Figure 6 The equivalent schematic diagram of the circuit on one side of the differential amplification circuit 110.

[0095] As can be seen from Figure 7 It can be seen that Figure 6 The transfer function of the differential amplification circuit 110 on one side is shown in expression (3):

[0096]

[0097] Wherein, ω represents the angular frequency of the signal, g m The transconductance of the input transistor, C L The input capacitance of the load of the differential amplification circuit 110 (a next-stage differential amplification circuit).

[0098] It can be seen that, compared with expression (2), there is a zero point in expression (3), i.e. Figure 6 The differential amplification circuit 110 has a zero point. Compared with Figure 3 The differential amplification circuit 110 has a pole, and the gain amplitude will be attenuated when the signal frequency becomes large. Figure 6 ​The differential amplifier circuit shown introduces a zero point in the circuit as the frequency increases, thereby expanding the bandwidth at high frequencies, and when the amplifier is used in a cascade structure, the bandwidth and gain can be ensured to be constant within a certain range, thereby improving the linearity of the circuit and further ensuring the linearity of the system as a whole.

[0099] By adding an inductor in the differential amplifier circuit 110, a new zero point is introduced to compensate for the circuit poles, thereby further ensuring the stability and linearity of the differential amplifier circuit 110 within a wide frequency range, thereby effectively expanding and applying the amplifier circuit at higher frequencies.

[0100] In some embodiments, as shown in Figure 8 and Figure 9 The proportional current source 120 includes a third transistor and a fourth transistor, wherein,

[0101] The first end of the fourth transistor and the control end of the fourth transistor are connected as the input end of the proportional current source 120;

[0102] The first end of the third transistor is connected as the output end of the proportional current source 120;

[0103] The control end of the third transistor and the control end of the fourth transistor are connected;

[0104] The second end of the third transistor, the second end of the fourth transistor, and the power supply ground are connected.

[0105] As shown in Figure 8 and Figure 9 The third transistor and the fourth transistor constitute a current mirror. The third transistor can copy the first current flowing through the first end and the second end of the fourth transistor by a predetermined ratio to obtain a second current, and the second current is used as the tail current of the differential amplifier circuit 110. By changing the transconductance of the first transistor and the second transistor.

[0106] In some embodiments, the plurality of parallel current sources 131 includes at least one of:

[0107] A first current source directly connected to the input end of the proportional current source 120;

[0108] N second current sources respectively connected to the input end of the proportional current source 120 through corresponding switching components 132, wherein N is an integer greater than or equal to 1.

[0109] For example, as shown in Figure 8 and Figure 9 The plurality of parallel current sources 131 can include a first current source IB4 and three second current sources IB1, IB2, and IB3.

[0110] The currents output from IB1, IB2, and IB3 to the input of the proportional current source 120 are controlled by the switching component 132.

[0111] The output current of the second current source can be controlled to be combined with the output current of the first current source and input into the proportional current source 120 to adjust the tail current of the differential amplifier circuit 110, thereby adjusting the gain of the differential amplifier circuit 110.

[0112] In some embodiments, the switching component 132 includes a switching transistor, wherein,

[0113] The first terminal of the switching transistor is connected to the second current source, the second terminal of the switching transistor is connected to the input terminal of the proportional current source 120, the control terminal of the switching transistor is used to input a control signal, and the switching transistor turns on or off the connection between the second current source and the input terminal of the proportional current source 120 based on the control signal.

[0114] In one possible configuration, switching transistors NM7, NM6, and NM5 are respectively controlled by the control signal vb. <0> VB <1> and VB <2> Control, to enable or disable.

[0115] In one possible implementation, the control signal may be output by a controller, which can adjust the gain of the differential amplifier circuit 110 by turning the second current source on or off using the control signal.

[0116] In some embodiments, there are three second current sources, and the output current ratio of the three second current sources is 1:2:4.

[0117] In some embodiments,

[0118] The minimum output current of the three second current sources is equal to one-I of the output current of the first current source, where I is an integer greater than or equal to 1; or

[0119] The minimum output current of the three second current sources is equal to J times the output current of the first current source, where J is an integer greater than or equal to 1.

[0120] In one possible implementation, I can be 10. The output current of the second current source is smaller, and the first current can be fine-tuned based on the output current of the first current source to improve the gain control accuracy.

[0121] In one possible implementation, I can be 2. The second current source outputs a larger current, which can achieve a wider range of gain control based on the output current of the first current source, thereby improving the application range of the amplifier circuit.

[0122] The following provides several specific examples in conjunction with any of the above embodiments:

[0123] by Figure 8 This explanation will be based on an amplifier circuit.

[0124] Gain control principle description:

[0125] 1) Input control signal vb <0> VB <1> and VB <2> The currents of IB1, IB2, and IB3 are controlled separately, and the current is combined into IB4 by controlling whether the three MOSFETs NM7, NM6, and NM5 are turned on or off.

[0126] 2) The current in the NM4 transistor will be mirrored and generate a certain proportion of the current in the NM3 transistor. This current serves as the tail current in the module circuit, thereby changing the transconductance of the input pair transistors NM1 and NM2 in the limiting amplifier circuit.

[0127] 3) The amplification factor of the output signal is directly positively correlated with the magnitude of the input signal VIN and the product of the transconductances of NM1 and NM2.

[0128] Figure 8 In the input pair, transistors NM1 and NM2 are the same size, a symmetrical design; resistors R1 and R2 are the same size, a symmetrical design; inductors L1 and L2 are the same size, a symmetrical design.

[0129] Preferably, IB1, IB2, and IB3 are designed according to a certain ratio, such as 1:2:4. Their current magnitude is generally 1 / 10 of the main bias current of IB4, so that the current can be effectively fine-tuned.

[0130] Furthermore, it can also be set to 1 times the IB4 main bias current, thereby expanding to applications with a larger gain control range.

[0131] Figure 8 The equivalent circuit diagram of one side of the differential amplifier circuit 110 shown is as follows: Figure 7 As shown, its transfer function is shown in expression (3).

[0132] As can be seen from expression (3), with the increase of frequency, due to the introduction of inductor, a zero point will be added in the circuit, thereby expanding the bandwidth in the high-frequency band. Thus, when using a cascaded structure for amplification, the bandwidth and gain can be kept constant within a certain range, thereby improving the linearity of the circuit and further ensuring the linearity of the system as a whole.

[0133] On the other hand, the adjustment and control of the gain at each level are still corrected by the circuits IB1, IB2, and IB3 in the bias circuit to correct IB4, thereby ensuring the control of the transconductance of gm and thus ensuring that the overall gain of the circuit is controlled.

[0134] Figure 8 The amplifier circuit shown exhibits good symmetry, which enhances its robustness in practical operation and facilitates engineering implementation. Furthermore, it demonstrates outstanding noise performance, particularly in suppressing analog noise. Its simple structure and fewer variable factors make it easier to design and control. The gain is highly controllable, and the circuit is easily expandable.

[0135] Figure 10 This embodiment proposes an optical module 0, such as... Figure 10 As shown, optical module 0 includes: a wideband gain controllable limiting amplifier circuit 1.

[0136] Specifically, the implementation method of the wideband gain controllable limiting amplifier circuit 1 is as follows: Figures 1 to 9 As described in the examples, it will not be repeated here.

[0137] Other embodiments of the present invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the following claims.

[0138] It should be understood that this invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this invention is limited only by the appended claims.

Claims

1. A wideband gain-controllable limiting amplifier circuit, characterized by, The wideband gain controllable limiting amplifier circuit comprises a plurality of differential amplification modules connected in series for step-by-step amplification of an input signal, wherein each differential amplification module comprises a differential amplification circuit, a proportional current source and a current regulating circuit, The proportional current source is configured to output a second current at a predetermined proportion of a first current input to an input terminal of the proportional current source as a tail current of the differential amplification circuit; The current regulating circuit comprises a plurality of parallel-connected current sources configured to input currents to the input terminal of the proportional current source, wherein at least one of the plurality of parallel-connected current sources is provided with a corresponding switching component configured to turn on or off the current input to the input terminal of the proportional current source by the corresponding current source to regulate the first current.

2. The wideband gain-controllable limiting amplifier circuit of claim 1, wherein, The differential amplification circuit comprises a first transistor, a second transistor, a first resistor and a second resistor, wherein a first terminal of the first resistor and a first terminal of the second resistor are connected to a power supply, a second terminal of the first resistor and a first terminal of the second transistor are connected to a first output terminal, and a second terminal of the second resistor and a first terminal of the second transistor are connected to a second output terminal, a second terminal of the first transistor and a second terminal of the second transistor are connected to an output terminal of the proportional current source, a control terminal of the first transistor is configured as a first input terminal of the differential amplification circuit, and a control terminal of the second transistor is configured as a second input terminal of the differential amplification circuit.

3. The wideband gain-controllable limiting amplifier circuit of claim 2, wherein, The differential amplification circuit further comprises a first inductor and a second inductor, wherein the first inductor is arranged between the first terminal of the first resistor and the power supply, the second inductor is arranged between the first terminal of the second resistor and the power supply.

4. The wideband gain-controllable limiting amplifier circuit of claim 1, wherein, The proportional current source comprises a third transistor and a fourth transistor, wherein a first terminal of the fourth transistor and a control terminal of the fourth transistor are connected to input the first current to the input terminal of the proportional current source, a first terminal of the third transistor is configured as an output terminal of the proportional current source to output the second current, the control terminal of the third transistor and the control terminal of the fourth transistor are connected, a second terminal of the third transistor and a second terminal of the fourth transistor are connected to a power supply ground.

5. The wideband gain-controllable limiting amplifier circuit according to any one of claims 1 to 4, characterized in that, The plurality of parallel-connected current sources comprises at least one of the following: a first current source directly connected to the input terminal of the proportional current source, N second current sources respectively connected to the input terminal of the proportional current source through corresponding switching components, wherein N is an integer greater than or equal to 1.

6. The wideband gain-controllable limiting amplifier circuit of claim 5, wherein, The switching component comprises a switching transistor, wherein a first terminal of the switching transistor is connected to the second current source, a second terminal of the switching transistor is connected to the input terminal of the proportional current source, and a control terminal of the switching transistor is configured to input a control signal, and the switching transistor is configured to turn on or off the connection between the second current source and the input terminal of the proportional current source based on the control signal.

7. The wideband gain controllable limiting amplifier circuit according to claim 6, wherein The second current source has 3, the output current ratio of 3 second current sources is 1:2:

4.

8. The wideband gain controllable limiting amplifier circuit of claim 7, wherein, The minimum output current of the 3 second current sources is equal to I times the output current of the first current source, I being an integer greater than or equal to 1; or The minimum output current of the 3 second current sources is equal to J times the output current of the first current source, J being an integer greater than or equal to 1.

9. An optical module characterized by comprising: The optical module comprises the wideband gain controllable limiting amplifier circuit of any one of claims 1 to 8.

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