BMS weak current switch discharge port control circuit triggered by double levels

By using a dual-level triggered BMS low-voltage switch discharge port control circuit, level conversion is achieved through a combination of transistors and resistors, which solves the problem of poor compatibility in existing technologies, reduces the cost of modifying the circuit, and enhances the applicability of the circuit.

CN223872268UActive Publication Date: 2026-02-03ALI NEW ENERGY TECH (KUNSHAN) CO LTD
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Patent Information

Application Number
CN202520434348.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-13
Publication Date
2026-02-03
Estimated Expiration
2035-03-13

AI Technical Summary

Technical Problem

Most existing BMS discharge port controls use single-level detection, resulting in poor compatibility and requiring circuit modifications to meet different customer needs, thus increasing costs.

Method used

The BMS low-voltage switch discharge port control circuit adopts dual-level triggering and uses a combination of transistors and resistors to achieve level conversion, including the connection methods of PNP and NPN transistors and resistors. The power supply VCC_MCU is 5V.

Benefits of technology

It improves the compatibility of control circuits, reduces the cost of modifying circuits, and can meet the needs of various customers.

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Abstract

The utility model discloses a BMS weak current switch discharge port control circuit triggered by double levels, which comprises a triode Q17, a triode Q18, a resistor R68, a resistor R96, a resistor R95 and a resistor R97, the emitter of the triode Q17 is connected with the resistor R68 and the analog front end high voltage output CPI of a BMS, the base of the triode Q17 is connected with the other end of the resistor R68 and the resistor R96, the other end of the resistor R96 is connected with an interface CnctO, and the interface CnctO is connected with the BMS weak current switch discharge port control circuit. The collector electrode of the triode Q17 is connected with the base electrode of the triode Q18 and the resistor R97, the other end of the resistor R97 is connected with the triode Q18 and a grounding end, the collector electrode of the triode Q18 is connected with the resistor R95 and an MCU signal CnctDetc, and the other end of the resistor R95 is connected with a power supply VCCMCU.
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Description

TECHNICAL FIELD

[0001] The utility model relates to battery technology field especially relates to a double level trigger's BMS weak current switch discharge port control circuit. BACKGROUND

[0002] At present, the discharge port control of most BMS in the market is weak current switch connected with the positive pole of battery pack or the negative pole of battery pack to realize discharging, all are single level control, and the compatibility is very poor, different customers propose different demands, and the circuit needs to be modified again, and the cost is increased. SUMMARY

[0003] In order to make up for the deficiency of prior art, the double level trigger's BMS weak current switch discharge port control circuit is provided to solve the problems in the prior art.

[0004] In order to solve the above technical problems, the utility model provides the following technical scheme:

[0005] A double level trigger's BMS weak current switch discharge port control circuit, including triode Q17, triode Q18, resistance R68, resistance R96, resistance R95 and resistance R97, the emitter of triode Q17 is connected with resistance R68 and the analog front end high voltage output CPI of BMS, the base of triode Q17 is connected with the other end of resistance R68 and resistance R96, the other end of resistance R96 is connected with interface Cnct_O, the collector of triode Q17 is connected with the base of triode Q18 and resistance R97, the other end of resistance R97 is connected with triode Q18 and ground terminal, the collector of triode Q18 is connected with resistance R95 and MCU signal CnctDetc, the other end of resistance R95 is connected with power supply VCC_MCU.

[0006] As a further technical scheme of the utility model: the triode Q17 is PNP triode.

[0007] As a further technical scheme of the utility model: the triode Q18 is NPN triode.

[0008] As a further technical scheme of the utility model: the power supply VCC_MCU is 5V voltage.

[0009] One or more technical schemes provided in the embodiment of the application have at least the following technical effects or advantages:

[0010] The double level trigger's BMS weak current switch discharge port control circuit of the utility model reduces cost, enhances compatibility, and can meet the demands of all customers. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1This is the overall schematic diagram of this utility model. Detailed Implementation

[0012] The technical solutions in the embodiments of this utility model will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0013] Example 1, such as Figure 1 As shown, a dual-level triggered BMS low-voltage switch discharge port control circuit includes transistors Q17 and Q18, resistors R68, R96, R95, and R97. The emitter of transistor Q17 is connected to resistor R68 and the analog front-end high-voltage output CPI of the BMS. The base of transistor Q17 is connected to the other end of resistor R68 and resistor R96. The other end of resistor R96 is connected to interface Cnct_O. The collector of transistor Q17 is connected to the base of transistor Q18 and resistor R97. The other end of resistor R97 is connected to transistor Q18 and ground. The collector of transistor Q18 is connected to resistor R95 and the MCU signal CnctDetc. The other end of resistor R95 is connected to the power supply VCC_MCU.

[0014] The working principle is as follows:

[0015] First, when the customer needs to connect the low-voltage circuit to the positive terminal to open the discharge port: Connect Cnct_O to the positive terminal. CP1 is the analog front-end high-voltage output of the BMS, which is about 10V higher than the positive terminal. At this time, the high voltage passes through resistor R68, the base-emitter junction of transistor Q17, and resistor R96 to Cnct_O, forming a circuit. This turns on transistor Q17. The high voltage then passes through the collector-emitter junction of transistor Q17, the base-emitter junction of transistor Q18, and resistor R97 to GNDD, turning on transistor Q18. Consequently, the MCU signal CnctDetc is pulled to GNDD. CnctDetc performs level conversion, activating the discharge signal and opening the BMS discharge port. Similarly, connecting Cnct_O to the negative terminal will also open the BMS discharge port.

[0016] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention.

[0017] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment have been appropriately combined to form other embodiments that are easy for those skilled in the art to understand.

Claims

1. A dual-level triggered BMS low-voltage switch discharge port control circuit, comprising transistor Q17, transistor Q18, resistor R68, resistor R96, resistor R95, and resistor R97, characterized in that: The emitter of transistor Q17 is connected to resistor R68 and the analog front-end high-voltage output CPI of the BMS. The base of transistor Q17 is connected to the other end of resistor R68 and resistor R96. The other end of resistor R96 is connected to interface Cnct_O. The collector of transistor Q17 is connected to the base of transistor Q18 and resistor R97. The other end of resistor R97 is connected to transistor Q18 and ground. The collector of transistor Q18 is connected to resistor R95 and the MCU signal CnctDetc. The other end of resistor R95 is connected to the power supply VCC_MCU.

2. The dual-level triggered BMS low-voltage switch discharge port control circuit according to claim 1, characterized in that, The transistor Q17 is a PNP transistor.

3. The dual-level triggered BMS low-voltage switch discharge port control circuit according to claim 1, characterized in that, The transistor Q18 is an NPN transistor.

4. The dual-level triggered BMS low-voltage switch discharge port control circuit according to claim 1, characterized in that, The power supply VCC_MCU is 5V.