Chip multilayer ceramic capacitor

Abstract

The utility model relates to a chip multilayer ceramic capacitor, which comprises a laminated body and external electrodes, and is characterized in that the laminated body comprises laminated dielectric layers and inner electrode layers arranged between the dielectric layers in a staggered and opposite manner, and the dielectric layers are rectangular; the inner electrode layer comprises an effective electrode pattern area and a lead-out part, the effective electrode pattern area is rectangular, the long side direction of the effective electrode pattern area is consistent with the long side direction of the dielectric layer, and the long side of the effective electrode pattern area is not connected with the outer edge of the dielectric layer; the leading-out part is led out from any long edge or short edge of the effective electrode pattern area and extends to the edge of the dielectric layer along the width direction or the length direction of the effective electrode pattern area; the external electrode is formed on one side surface of the laminated body and covers the lead-out portion extending to the edge of the dielectric layer. The chip multilayer ceramic capacitor has the advantages that the effective mounting area of the PCB is increased, the ESR and ESL of the chip are improved, the stress of the inner electrodes is improved, the squeal problem is solved, and the product quality is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip ceramic capacitors, and particularly to an internal structure design of a chip multilayer ceramic capacitor. BACKGROUND

[0002] A conventional chip multilayer ceramic capacitor (MLCC) is prepared by the following process: a prepared ceramic slurry is coated on a PET film by a casting head to form a thin dielectric film, the dielectric film is dried in an oven, a metal inner electrode is printed on the dried dielectric film, the dielectric film with the metal inner electrode is peeled off layer by layer by a laminator and stacked together to form a raw chip, the required product is obtained by lamination, cutting, degassing, sintering and chamfering, and a basic outer electrode is attached to both ends of the chip, and then a nickel layer and a tin layer are electroplated on the outer electrode, thereby obtaining the required chip multilayer ceramic capacitor product.

[0003] As shown in FIGS. Fig. 1 and Fig. 2 In a conventional example, a chip multilayer ceramic capacitor 100 is formed by stacking dielectric films 120 with metal inner electrodes 110 together to form a stack, and the inner electrodes 110 are led out from both ends of the stack in the length direction, and outer electrodes 130 are attached to both ends of the stack.

[0004] Problems of the conventional technology are as follows:

[0005] 1. The inner electrodes of the MLCC are staggered and stacked in the length direction, and the inner electrodes are led out from both ends of the MLCC in the length direction, so that the current path must pass through one end of the MLCC to the other end in the length direction, and the current path is the longest, thereby causing the ESR and ESL of the capacitor to be the largest, and affecting the high-frequency filtering performance of the capacitor.

[0006] 2. The basic outer electrodes are attached to both ends of the MLCC first, and then the nickel layer and the tin layer are electroplated on the basic outer electrodes. In order to ensure the welding stability of the outer electrodes and the pads, the width and thickness of the outer electrodes after being attached to the ceramic must be ensured to have a certain width and thickness, so as to ensure that the basic outer electrodes have sufficient adhesion on the surface of the ceramic. If the width or thickness of the basic outer electrodes after being attached is too wide or too thick, the attachment stress of the outer electrodes and the ceramic body will be increased, causing the MLCC to crack, and the material cost of the outer electrodes is also increased. In the application end of the MLCC, only the one face in contact with the pads is the welding face, and the other four faces are non-welding faces, and the material utilization rate of the outer electrodes on the four non-welding faces is very low, causing great waste of the outer electrode materials.

[0007] 3. If the external electrodes of the substrate after soldering are too narrow, too thin, or not dense enough, they are prone to detachment during chip application, or nickel may seep in during nickel plating, affecting product reliability. In severe cases, solder bursting may even occur, causing short circuits in the external electrodes due to solder layer connections between adjacent components.

[0008] 4. The chip mounting surface is random. If the mounting surface and the stack-up surface are on the same plane, due to the piezoelectric effect unique to the dielectric, the chip capacitor will cause a "whistling" problem due to electrostriction caused by the piezoelectric effect after the chip is powered on. Utility Model Content

[0009] Based on this, this application provides a chip multilayer ceramic capacitor that can solve the above-mentioned technical problems.

[0010] The above-mentioned objective of this application is achieved through the following technical solution:

[0011] This application provides a chip-type multilayer ceramic capacitor, including a laminate and external electrodes. The laminate includes laminated dielectric layers and internal electrode layers disposed alternately between the dielectric layers. The dielectric layers are rectangular in shape.

[0012] The inner electrode layer includes an effective electrode pattern area and a lead-out portion. The effective electrode pattern area is rectangular in shape. For each inner electrode layer, the lead-out portion is led out from the side edge of the same side of its effective electrode pattern area and extends to the edge of the same side edge of the dielectric layer in a direction perpendicular to that side edge.

[0013] The external electrode is formed on one side of the laminate that exposes the lead-out portion and covers the lead-out portion that extends to the edge of the dielectric layer.

[0014] In an exemplary embodiment, at least one side of the lead-out portion forms a first arcuate transition portion between it and the side extending from the effective electrode pattern region.

[0015] In one exemplary embodiment, the angle of the first arcuate transition portion is 10° to 30°, and the radius of curvature is 0.01 mm to 0.5 mm.

[0016] In one exemplary embodiment, the corner where the effective electrode pattern region does not connect with the dielectric layer forms a second arc-shaped transition portion.

[0017] In one exemplary embodiment, the sides of the effective electrode pattern region do not coincide with the outer edge of the dielectric layer;

[0018] The lead-out portion includes a connecting portion connected to the effective electrode pattern area and an extension portion extending to the edge of the dielectric layer, and the width of the extension portion in a direction perpendicular to the extension direction of the lead-out portion is greater than the width of the connecting portion.

[0019] In one exemplary embodiment, at least one side of the extension portion is not in line with the side of the connecting portion, and a third arc-shaped transition portion is formed between the side and the side of the connecting portion.

[0020] In one exemplary embodiment, for two adjacent inner electrode layers, each of the extension portions extends to the outer edge of the adjacent other side of the dielectric layer in a direction away from the other, and the outer electrode extends from one side of the dielectric layer to the adjacent other side thereof to cover the extension portions.

[0021] In one exemplary embodiment, one side of the lead-out portion, one side of the effective electrode pattern area, and one outer edge of the dielectric layer coincide, and the lead-out portion further extends to the outer edge adjacent to the side of the dielectric layer.

[0022] The outer electrode covers two sides of the dielectric layer to cover the lead-out portion.

[0023] In one exemplary embodiment, for each of the inner electrode layers, the lead-out portion includes two, and extends to the outer edges of the opposite two sides of the dielectric layer from the opposite two sides of the effective electrode pattern area, respectively; and the outer electrode extends from one side of the dielectric layer to the adjacent other side thereof after passing through the side coinciding with the side of the effective electrode pattern area to cover the extension portions.

[0024] In one exemplary embodiment, the structure of the outer electrode is selected from any one of the following:

[0025] a one-layer outer electrode structure, a two-layer outer electrode structure, a three-layer outer electrode structure, a four-layer outer electrode structure, a five-layer outer electrode structure, and a six-layer outer electrode structure.

[0026] The present application has the following beneficial effects:

[0027] 1. The outer electrode is changed from covering the entire end to being provided only on the side where the inner electrode is exposed, which greatly saves unnecessary waste of the outer electrode on the non-soldering side of the chip.

[0028] 2. The chip is changed from exposing the outer electrode on both ends in the length direction to exposing the outer electrode on only one side of the porcelain body, which saves the size space occupied by the original outer electrode, increases the ceramic body space, and is beneficial to the development of larger capacity.

[0029] 3. The external electrode lead-out end is adjusted from the length of the chip to be led out in the width direction of the chip, or led out in one face in the length direction of the chip, improving the wiring on the PCB, reducing the distance between pads and the space occupation and the consumption of solder paste, and improving the effective mounting area of the PCB;

[0030] 4. The internal electrode exposure is changed from both ends of the chip end to only one end of one face, or led out in one face in the length direction of the chip, and the other faces are ceramic bodies, which can greatly improve the risk of nickel penetration in the electroplating process of the chip. Since there is only one soldering face soldered with the pad, the other four faces are ceramic bodies, which greatly reduces the risk of tin explosion and the risk of short circuit of the external electrode caused by the tin layer connection of adjacent components due to tin explosion;

[0031] 5. The external electrode lead-out end is adjusted from the length of the chip to be led out in the width direction of the chip, or led out in one face in the length direction of the chip, greatly shortening the current path in the chip, which can greatly improve the ESR and ESL of the chip;

[0032] 6. The external electrode lead-out end is adjusted from the length of the chip to be led out in the width direction of the chip, or led out in one face in the length direction of the chip, and the chip mounting face and the lamination face are not in the same plane, which can greatly improve the "whistling" problem caused by the piezoelectric effect of the surface-mounted capacitor;

[0033] 7. Since the attached basic external electrode is only in one direction of the chip, after soldering, only one side of the chip has soldering stress, which can relieve the mechanical stress of the chip soldering end and prevent short circuit caused by cracking due to excessive stress of the end;

[0034] 8. By changing the right angle included angle between the effective electrode pattern area and the lead-out part to a first arc-shaped transition part, this design increases the contact width of the lead-out part and the effective electrode pattern area, and the edge of the contact is smoothly transitioned, which can improve the internal stress of the local electrode;

[0035] 9. The design of the first arc-shaped transition part can improve the problem that the diaphragm cannot completely adhere at the right angle, and there is a gap in the right angle of the dielectric diaphragm, which is prone to delamination. It can also improve the problem of charge concentration at the right angle and the phenomenon of sharp end discharge caused by charge concentration at the right angle. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figs. 1-2 is a schematic structural diagram of a conventional chip multilayer ceramic capacitor;

[0037] Figs. 3-4 is a schematic structural diagram of a chip multilayer ceramic capacitor in an exemplary embodiment;

[0038] Figs. 5-13A schematic view of a structure of a dielectric layer and an internal electrode layer of a multilayer ceramic capacitor in an exemplary embodiment.

[0039] BRIEF DESCRIPTION OF DRAWINGS

[0040] 200. Multilayer ceramic capacitor

[0041] 210. Laminated body; 220. Dielectric layer; 230. Internal electrode layer; 230a. First internal electrode layer; 230b. Second internal electrode layer; 231. Effective electrode pattern area; 232. Lead-out portion; 232a. Connection portion; 232b. Extension portion; 233. First arc-shaped transition portion; 234. Second arc-shaped transition portion; 235. Third arc-shaped transition portion; 240. External electrode. DETAILED DESCRIPTION

[0042] In order to make the above objectives, features and advantages of the present application more clear and easily understood, the specific embodiments of the present application will be described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in a number of different ways without being limited to the specific embodiments described herein, and it is understood that similar improvements and modifications can be made thereto by one skilled in the art without departing from the scope of the present application. Therefore, the present application should not be limited to the following examples.

[0043] In the description of the present application, it should be understood that, if there are terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0044] In addition, if there are terms such as "first", "second", these terms are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implying the number of the technical features indicated. Therefore, the features limited by "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, if the term "plurality" appears, the meaning of "plurality" is at least two, for example, two, three, etc., unless otherwise specifically limited.

[0045] In the present application, unless specifically defined and limited otherwise, if there is any appearance of the terms "mount", "connect", "connection", "fix", and the like, these terms should be interpreted in a broad sense. For example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise specifically limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0046] In the present application, unless specifically defined and limited otherwise, if there is any appearance of the terms "mount", "connect", "connection", "fix", and the like, these terms should be interpreted in a broad sense. For example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise specifically limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0047] For the technical problems in the background art, the present application provides a chip multilayer ceramic capacitor, as shown in Figs. 3-5 In an embodiment, the chip multilayer ceramic capacitor 200 includes a laminated body 210 and an external electrode 240, wherein the laminated body 210 includes laminated dielectric layers 220 and internal electrode layers 230 arranged in an interleaved manner between the dielectric layers 220.

[0048] In the present embodiment, the dielectric layers 220 are rectangular in shape, and the laminated body 210 formed by the lamination of the dielectric layers 220 is a rectangular parallelepiped in shape. The dielectric layers 220 are usually ceramic materials and serve as insulators to ensure electrical insulation between the internal electrode layers 230. The internal electrode layers 230 are located between the dielectric layers 220 and are arranged in a specific pattern. Adjacent internal electrode layers 230 face each other but do not directly contact each other. The facing internal electrode layers 230 are connected to the positive and negative poles of the circuit to form a capacitor structure.

[0049] As shown in Figs. 3-Fig. 5 The internal electrode layers 230 include first internal electrode layers 230a and second internal electrode layers 230b interleaved and arranged in an interleaved manner between the dielectric layers 220. The patterns of the first internal electrode layers 230a and the second internal electrode layers 230b are arranged in a symmetrical manner. Each internal electrode layer 230 includes an effective electrode pattern area 231 and a lead-out portion 232.

[0050] The effective electrode pattern region 231 is rectangular in shape and located inside the dielectric layer 220. Its area is smaller than that of the dielectric layer 220, and its long side direction is consistent with that of the dielectric layer 220. In other embodiments, the two directions may be reversed. The long side of the effective electrode pattern region 231 does not coincide with the outer edge of the long side of the dielectric layer 220. The projections of the effective electrode pattern regions 231 of the first inner electrode layer 230a and the second inner electrode layer 230b in the stacking direction of the inner electrode layer 230 overlap, meaning that the first inner electrode layer 230a and the second inner electrode layer 230b have the same shape and size, and their leads 232 are symmetrically arranged on both sides.

[0051] exist Figs. 3-Fig. 5 In this embodiment, the lead-out portion 232 extends from the long side of the effective electrode pattern region 231 and extends along the width direction of the effective electrode pattern region 231 to the edge of the dielectric layer 220. Specifically, the lead-out portions 232 of the first inner electrode layer 230a and the second inner electrode layer 230b are symmetrically arranged on the left and right sides, respectively, and are led out from the left and right ends on the same side of the effective electrode pattern region 231. The projections of the two portions in the stacking direction of the inner electrode layer 230 do not overlap.

[0052] The external electrode 240 includes two electrodes, which are formed on the same side of the laminate 210 that exposes the lead-out portion 232 and cover the two lead-out portions 232 that extend to the edge of the dielectric layer 220.

[0053] Based on the same inventive principle, such as Fig. 13 As shown, in one embodiment, the lead-out portion 232 can be disposed at the short edge of the effective electrode pattern region 231 and extend along the long side of the effective electrode pattern region 231 to coincide with the outer edge of the dielectric layer 220. Other design adjustments to the lead-out portion 232 can be similarly referred to. Figs. 5 to Fig. 12 .exist Fig. 13 In one embodiment, neither of the two sides of the lead-out portion 232 is on the same straight line as the side of the effective electrode pattern area 231. The external electrode 240 is formed on the side of the laminate 210 and covers the lead-out portion 232.

[0054] In the following embodiments of this application, the example is illustrated by the lead-out portion 232 extending from the long side of the effective electrode pattern region 231. The following embodiments are also applicable to this application. Fig. 13 The scheme in which the lead-out portion 232 is led out from the short side of the effective electrode pattern area 231, and the scheme obtained by applying the additional technical features of the following embodiments to lead out the lead-out portion 232 from the short side of the effective electrode pattern area 231, are also within the protection scope of this application.

[0055] In the embodiment, by adjusting the lead-out portions 232 of the inner electrodes from the opposite edges of the chip to the same edge of the chip, the current path in the chip can be greatly reduced, and since the two outer electrodes 240 are close to each other, the mounting area of the chip can be greatly reduced, the mounting capacity of the PCB is increased, and the mounting density is improved.

[0056] Compared with the prior art, the chip multilayer ceramic capacitor has the following advantages:

[0057] 1. The outer electrode is changed from covering the end to being provided only on the side where the inner electrode is exposed, so that the unnecessary waste of the outer electrode on the non-soldering surface of the chip can be greatly saved.

[0058] 2. The chip is changed from exposing the outer electrode on both ends in the length direction to exposing the outer electrode on only one side of the ceramic body, so that the size space occupied by the original outer electrode is saved, the ceramic body space is increased, and the development of larger capacity is facilitated.

[0059] 3. Since the end outer electrode is cancelled, the wiring on the PCB is improved, the distance and space occupation between the pads and the consumption of the solder paste are reduced, and the effective mounting area of the PCB is improved.

[0060] 4. The inner electrode exposure is changed from both ends of the chip to only one end of one side, and the other sides are ceramic bodies, so that the risk of nickel penetration during electroplating is greatly improved. Since there is only one soldering surface for soldering with the pad, the other four sides are ceramic bodies, the risk of tin explosion is greatly reduced, and the risk of short circuit of the outer electrode caused by the connection of the tin layer of the adjacent components due to tin explosion is also reduced.

[0061] 5. The outer electrode lead-out end is changed from the length of the chip to the width direction of the chip or one side in the length direction of the chip, so that the current path in the chip is greatly shortened, and the ESR and ESL of the chip are greatly improved.

[0062] 6. The outer electrode lead-out end is changed from the length of the chip to the width direction of the chip or one side in the length direction of the chip, and the mounting surface and the lamination surface of the chip are not in the same plane, so that the whistling problem caused by the piezoelectric effect of the surface mount capacitor is greatly improved.

[0063] 7. Since the adhesion base outer electrode is only in one direction of the width of the chip or one end of the length, after adhesion, only one side of the chip has adhesion stress, which can relieve the mechanical stress of the chip adhesion end and prevent short circuit caused by excessive stress cracking of the end.

[0064] In specific embodiments, the specific patterns of the effective electrode pattern area 231 and the lead-out portion 232 can also have multiple settings, for example, in Figs. 3-Fig. 5In this embodiment, the long and short edges of the effective electrode pattern region 231 do not overlap with the edge of the dielectric layer 220, and the pattern of the lead-out portion 232 is rectangular, with both sides not overlapping with the short edge of the effective electrode pattern region 231. Fig. 6 In one embodiment, one side of the lead-out portion 232 is on the same straight line as one short side edge of the effective electrode pattern area 231.

[0065] like Fig. 8 and Fig. 9 As shown, in one embodiment, the lead-out portion 232 includes a connection portion 232a connected to the effective electrode pattern region 231 and an extension portion 232b extending to the edge of the dielectric layer. The width of the extension portion 232b along the long side direction of the effective electrode pattern region 232a is greater than the width of the connection portion, thereby increasing the contact area between the inner electrode layer 230 and the outer electrode 240, improving the contact resistance between the inner electrode layer 230 and the outer electrode 240, reducing ESR / ESL, and increasing the welding strength of the outer electrode 240.

[0066] exist Fig. 8 and Fig. 9 In one embodiment, the extension 232b extends in one direction of the connecting portion 232a. In other embodiments, the extension 232b may also extend in the left and right directions of the connecting portion 232a.

[0067] exist Fig. 10 In one embodiment, the extension 232b extends toward the short side of the dielectric layer 220 and extends to the outer edge of the short side. In this embodiment, the external electrode (not shown) extends from the outer edge of the long side of the dielectric layer 220 to the outer edge of the short side of the dielectric layer to cover the extension.

[0068] To adapt to more application scenarios, in another embodiment, such as Fig. 11 As shown, one of the short sides of the effective electrode pattern area 231 coincides with the outer edge of the dielectric layer 220. One side of the lead-out portion 232 is on the same straight line as the short side and coincides with the outer edge of the dielectric layer 220. The external electrode (not shown) extends from the outer edge of the long side of the dielectric layer 220 to the outer edge of the short side of the dielectric layer 220 to cover the lead-out portion 232.

[0069] Furthermore, such as Fig. 11 As shown, the lead-out portion 232 includes two parts, which extend from both sides of the long side of the effective electrode pattern area 231 to the two outer edges of the long side of the dielectric layer 220 respectively; the external electrode (not shown) extends from the outer edges of the long sides of the two dielectric layers 220 to the outer edges of the short sides of the dielectric layer, and covers the entire outer edge of the short side.

[0070] In the embodiment, the structure of the external electrode is similar to the conventional external electrode structure, but it still has the advantages of improving the contact resistance, shortening the current path of the current in the chip, and reducing the ESR and ESL.

[0071] In the preferred embodiment, as shown in Figs. 6-Fig. 10 、 Fig. 12 , one side or both sides of the lead-out portion 232 is not in line with the short edge of the effective electrode pattern area 231, and the side and the long edge of the adjacent effective electrode pattern area 231 form a first arc-shaped transition portion 233.

[0072] In the embodiment, by changing the right angle between the effective electrode pattern area 231 and the lead-out portion 232 to the first arc-shaped transition portion 233, the design increases the contact width of the lead-out portion 232 and the effective electrode pattern area 231, and the edge of the contact is smoothly transitioned, which can improve the internal stress of the local electrode; at the same time, the design of the first arc-shaped transition portion 233 can improve the problem that the film cannot completely fit at the right angle, there is a gap in the dielectric film at the right angle, and the risk of delamination is easy to occur. The first arc-shaped transition portion 233 can also improve the problem of charge concentration and improve the sharp discharge caused by charge concentration at the right angle.

[0073] In the Fig. 6 and Fig. 12 embodiments, one side of the lead-out portion 232 is in line with one short edge of the effective electrode pattern area 231, and the other side and the long edge of the effective electrode pattern area 231 form a first arc-shaped transition portion 233.

[0074] In the Figs. 7-Fig. 10 embodiment, both sides of the lead-out portion 232 are not in line with the short edges of the effective electrode pattern area 231, and the two sides of the lead-out portion 232 and the long edge of the effective electrode pattern area 231 form a first arc-shaped transition portion 233, respectively.

[0075] In some embodiments, as shown in Fig. 9 , based on the same principle, a third transition portion 235 is formed between the connecting portion 232a and the extension portion 232b of the lead-out portion 232.

[0076] Preferably, the angle of the first arc-shaped transition portion 233 and the third arc-shaped transition portion 235 is 10° to 30°, and the curvature radius is 0.01mm to 0.5mm. In the embodiment, the arc-shaped transition refers to the connection between the two adjacent sides being switched from a right angle to an arc-shaped transition.

[0077] As shown in Fig. 6As shown, in an embodiment, the effective electrode pattern area 231 forms a second arc-shaped transition part 234 at the four corners not in contact with the dielectric layer 220. In this embodiment, by changing the inner electrode traditional straight edge to an arc-shaped design, the internal stress at the four corners can be improved, and the sharp discharge caused by charge concentration at the right angle can be improved.

[0078] Preferably, the above Figs. 2-Fig. 13 The structure design, the first arc-shaped transition part 233, the second arc-shaped transition part 234, and the third arc-shaped transition part 235 can be combined in any way to achieve a more optimal design and meet application requirements.

[0079] Preferably, on the basis of the above embodiment, the outer electrode 240 can be a single-layer outer electrode structure, and the outer electrode is composed of copper, silver, palladium, or silver-palladium alloy and the like. After chamfering, the MLCC is coated with copper paste, silver paste, palladium paste, silver-palladium alloy paste, and the like on both ends, and after sintering, the outer electrode is formed by copper, silver, palladium, or silver-palladium alloy and the like.

[0080] Preferably, the outer electrode 240 can be a double-layer outer electrode structure, and the outer electrode structure can be composed of nickel, copper (silver or gold): the nickel can be formed by coating the capacitor green body with nickel paste on both ends, sintering to form a basic outer electrode, and then coating a layer of copper (silver or gold) on the outside of the basic outer electrode or electroplating a layer of copper to form a nickel-copper (silver or gold) double-layer outer electrode structure. Alternatively, the outer electrode structure can be composed of copper, copper (silver or gold): the basic outer electrode is coated with copper paste on both ends after chamfering, and after sintering the copper layer, a basic outer electrode is formed, and then a layer of copper or a layer of silver or gold is electroplated or coated on the outside of the basic outer electrode to form a copper-copper (silver or gold) double-layer outer electrode structure. Alternatively, the outer electrode structure can be composed of copper and high molecular resin: the basic outer electrode is coated with copper paste on both ends after chamfering, and after sintering the copper layer, a basic outer electrode is formed, and then a layer of high molecular resin is coated on the outside of the basic outer electrode to form a two-layer structure composed of copper and high molecular resin.

[0081] Preferably, the outer electrode 240 can be a three-layer outer electrode structure, which outer electrode structure can be formed of copper, nickel, tin (silver or gold): the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then forming a nickel layer and a tin (silver or gold) layer on the outside of the base outer electrode by electroplating, thereby forming a copper-nickel-tin (silver or gold) three-layer outer electrode structure. Alternatively, the outer electrode structure can be formed of copper, copper, tin (silver or gold): the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then forming a nickel layer and a tin (silver or gold) layer on the outside of the base outer electrode by electroplating, thereby forming a copper-copper-tin (silver or gold) three-layer outer electrode structure. Alternatively, the outer electrode structure can be formed of copper, resin silver paste (copper paste), tin (or silver or gold): the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then adhering a layer of resin silver paste (copper paste) on the outside of the base outer electrode and then solidifying, and then forming a tin (silver or gold) layer on the outside of the resin silver paste (copper paste) by electroplating, thereby forming a copper-resin silver paste-tin (or silver or gold) three-layer outer electrode structure. Alternatively, the outer electrode structure can be formed of copper, copper, high-molecular resin: the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then adhering a copper layer on the outside of the base outer electrode by sintering or electroplating, and then adhering a high-molecular resin layer on the outside of the copper layer, thereby forming a copper-copper-high-molecular resin three-layer outer electrode structure.

[0082] Preferably, the outer electrode 240 can be a four-layer outer electrode structure, which outer electrode structure can be formed of nickel, copper, nickel, tin: the base outer electrode is formed by adhering nickel paste to the two ends of the MLCC green body, and then sintering, and then adhering copper paste on the outside of the base outer electrode, and then forming a copper layer after sintering, and then forming a nickel layer and a tin layer on the copper layer by electroplating, thereby forming a nickel-copper-nickel-tin four-layer outer electrode structure. Alternatively, the outer electrode structure can be formed of copper, high-molecular resin, nickel, tin: the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then adhering a layer of high-molecular resin on the outside of the base outer electrode, and then forming a nickel layer and a tin layer by electroplating, thereby forming a copper-high-molecular resin-nickel-tin three-layer outer electrode structure. Alternatively, the outer electrode structure can be formed of copper, resin silver paste (or copper paste), nickel, tin: the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then adhering a layer of resin silver paste (or copper paste) on the outside of the base outer electrode and then solidifying, and then forming a nickel layer and a tin layer on the surface of the resin silver paste (or copper paste) by electroplating, thereby forming a copper-resin silver paste (or copper paste)-nickel-tin four-layer outer electrode structure. Alternatively, the outer electrode structure can be formed of copper, tin, nickel, tin: the base outer electrode is formed by adhering copper paste to the two ends of the MLCC after chamfering, and then forming a copper layer after sintering the copper paste, and then forming a tin layer, a nickel layer, and a tin layer on the outside of the base outer electrode by electroplating, thereby forming a copper-tin-nickel-tin four-layer outer electrode structure.

[0083] Preferably, the outer electrode 240 can be a five-layer outer electrode structure, which can be formed by copper, soft copper, soft pad, nickel, tin: the base outer electrode is formed after sintering after the copper paste is attached to the two ends of the MLCC green body, and then the soft copper and soft pad are attached to the outside of the base outer electrode, and then the nickel layer and the tin layer are electroplated on the soft pad after solidification, forming a copper-soft copper-soft pad-nickel-tin five-layer outer electrode structure.

[0084] Preferably, the outer electrode 240 can be a six-layer outer electrode structure, which can be formed by copper, soft copper, soft pad, nickel, copper(tin), and a polymer layer: the base outer electrode is formed after sintering after the copper paste is attached to the two ends of the MLCC green body, and then the soft copper and soft pad are attached to the outside of the base outer electrode, and then the nickel layer and the copper(tin) layer are electroplated on the soft pad after solidification, and then a polymer layer is wrapped outside the electroplated copper layer, forming a copper-soft copper-soft pad-nickel-copper(tin)-polymer six-layer outer electrode structure.

[0085] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described, but as long as the combinations of the technical features do not contradict, they should be considered within the scope of the present disclosure.

[0086] The above-described embodiments only express several embodiments of the present application, and the description is more specific and detailed, but it should not be understood as limiting the scope of the utility model patent. It should be noted that for ordinary skilled in the art, without departing from the concept of the present application, a number of variations and improvements can be made, which are within the scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims, and the description can be used to explain the content of the claims.

Claims

1. A multilayer ceramic capacitor chip comprising a laminate and external electrodes, characterized in that: the laminate comprises laminated dielectric layers and internal electrode layers alternately arranged between the dielectric layers, the dielectric layers being rectangular in shape; the internal electrode layers comprise effective electrode pattern regions and lead-out portions, the effective electrode pattern regions being rectangular in shape; for each of the internal electrode layers, the lead-out portion thereof is led out from a side of the effective electrode pattern region thereof and extends to an edge of a same side of the dielectric layer in a direction perpendicular to the side; and the external electrodes are formed on a side of the laminate exposing the lead-out portions and cover the lead-out portions extending to the edges of the dielectric layers.

2. The multilayer ceramic capacitor chip according to claim 1, characterized in that: at least one side of the lead-out portion and the side from which the lead-out portion is led out from the effective electrode pattern region form a first arc-shaped transition portion.

3. The multilayer ceramic capacitor chip according to claim 2, characterized in that: the first arc-shaped transition portion has an angle of 10° to 30° and a radius of curvature of 0.01 mm to 0.5 mm.

4. The multilayer ceramic capacitor chip according to claim 3, characterized in that: the effective electrode pattern region forms a second arc-shaped transition portion at a corner thereof not in contact with the dielectric layer.

5. The multilayer ceramic capacitor chip according to any one of claims 1 to 4, characterized in that: none of the sides of the effective electrode pattern region coincides with an outer edge of the dielectric layer; and the lead-out portion comprises a connecting portion connected to the effective electrode pattern region and an extending portion extending to the edge of the dielectric layer, the extending portion having a width in a direction perpendicular to the extending direction of the lead-out portion greater than a width of the connecting portion.

6. The multilayer ceramic capacitor chip according to claim 5, characterized in that: at least one side of the extending portion and a side of the connecting portion are not on the same straight line, and a third arc-shaped transition portion is formed between the side of the extending portion and the side of the connecting portion.

7. The multilayer ceramic capacitor chip according to claim 5, characterized in that: for two adjacent internal electrode layers, each of the extending portions extends to an outer edge of an adjacent other side of the dielectric layer in a direction away from the other, and the external electrodes extend from one side of the dielectric layer to an adjacent other side thereof to cover the extending portions.

8. The multilayer ceramic capacitor chip according to any one of claims 1 to 4, characterized in that: one side of the lead-out portion, one side of the effective electrode pattern region, and one outer edge of the dielectric layer coincide with each other, and the lead-out portion further extends to an outer edge of an adjacent side of the dielectric layer; and the external electrodes cover both sides of the dielectric layer to cover the lead-out portions.

9. The multilayer ceramic capacitor chip according to claim 5, characterized in that: ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ For each of the inner electrode layers, the lead-out portion includes two, and is respectively extended from the opposite two side edges of the effective electrode pattern area to the outer edges of the opposite two side edges of the dielectric layer; the outer electrode is extended from one side of the dielectric layer to the adjacent other side after the side coinciding with the side edge of the effective electrode pattern area, so as to cover the extended portion.

10. The multilayer ceramic capacitor of any one of claims 1 to 4, wherein The structure of the outer electrode is selected from any one of the following: one-layer outer electrode structure, two-layer outer electrode structure, three-layer outer electrode structure, four-layer outer electrode structure, five-layer outer electrode structure, and six-layer outer electrode structure.

Images