Chip packaging structure and radio frequency front-end module
By incorporating bonding elements and insulating materials into the packaging structure of the SAW resonator, the problem of packaging contamination caused by film rupture is solved, achieving higher packaging reliability and performance.
Patent Information
- Application Number
- CN202423323456.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2034-12-31
AI Technical Summary
In the existing technology, during the packaging process of SAW resonators, the film layer is prone to breakage, causing the molding compound to flow into the chip cavity, resulting in contamination and packaging failure, and affecting the sealing performance.
A bonding section is set in the chip packaging structure to cover the weak areas of the film layer, preventing the molding material from flowing into the packaging cavity. An insulating material is used to form a protective layer and bonding section to enhance the protective effect of the film layer.
It effectively avoids contamination of the chip by the molding material, improves the packaging effect and performance, enhances the crack resistance of the film layer, and ensures the reliability of the packaging.
Smart Images

Figure CN223885172U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to chip packaging technical field especially, relate to a chip packaging structure and radio frequency front end module. BACKGROUND
[0002] A surface acoustic wave (SAW) resonator is a device that converts an electrical signal into an acoustic signal or converts an acoustic signal into an electrical signal. The SAW resonator usually includes a piezoelectric substrate and an interdigital transducer (IDT), the IDT is formed on the piezoelectric substrate, and the IDT can be used to convert an electrical signal into an acoustic signal or convert an acoustic signal into an electrical signal. In order to ensure the normal operation of the above-mentioned device, after each functional component is prepared, the formed filter chip needs to be packaged to ensure its normal operation. In the related art, the obtained chip is usually packaged under the resin film by using the film packaging method, and then sealed by using the plastic packaging material. However, since the film layer in the device is relatively thin, when a relatively large pressure is applied during the film coating and packaging process, the thin film layer is prone to rupture, and then the plastic packaging material flows into the cavity of the chip through the crack. On the one hand, the material flowing into the cavity will directly contaminate the chip, and on the other hand, it will also directly affect the packaging of the chip, thereby reducing the sealing performance of the chip, and even causing packaging failure.
[0003] Therefore, how to further improve the packaging effect of the chip, especially to improve the packaging performance of the filter chip has become an urgent problem to be solved. UTILITY MODEL CONTENTS
[0004] The utility model provides a kind of chip packaging structure and radio frequency front end module, to improve the packaging effect and performance of chip.
[0005] To solve the above problems, the utility model embodiment provides a kind of chip packaging structure, comprising:
[0006] Substrate, at least including pad;
[0007] Packaging chip, electrically disposed on the substrate;
[0008] Protective layer, the protective layer covers the packaging chip, and part of the protective layer is disposed on the substrate, the protective layer and the packaging chip, the substrate are enclosed to form a cavity, the protective layer includes first outer side face along first direction, second outer side face along second direction, the second direction intersects with the first direction, and,
[0009] Plastic encapsulation layer, is disposed on the side of the protective layer away from the substrate;
[0010] The chip packaging structure further comprises a bonding portion and a soldering point, the bonding portion is arranged on the protective layer, the plastic packaging layer covers the bonding portion, and the number of the soldering points is greater than or equal to the number of the soldering points.
[0011] The first outer side is arranged around the packaging chip, the bonding portion is arranged on the first outer side and the second outer side, and at least the protective layer or the bonding portion is arranged as an insulating member.
[0012] Optionally, in the second direction, the bonding length of the bonding portion on the second outer side is H1, and in the first direction, the bonding length of the bonding portion on the first outer side is H2.
[0013] The H2 is less than or equal to the H1, and the second direction intersects the first direction.
[0014] Optionally, along the second direction, the thickness of the bonding portion close to the packaging chip is greater than the thickness of the bonding portion away from the packaging chip.
[0015] Optionally, the bonding portion surrounds the packaging chip and is arranged as at least one circle.
[0016] Optionally, the bonding portion comprises a first inner circle and a first outer circle arranged away from the cavity on the side of the first inner circle.
[0017] The first inner circle is arranged on the second outer side and the first outer side of the protective layer, and the first outer circle is arranged on the second outer side.
[0018] Optionally, the first inner circle is continuously arranged around the packaging chip, and the first outer circle is arranged as separated segments around the first inner circle.
[0019] Optionally, the bonding portion further comprises a transition circle arranged between the first inner circle and the first outer circle.
[0020] The transition circle is arranged in segments, the height of the transition circle is less than the height of the first inner circle and the first outer circle, and the height of the first inner circle is greater than the height of the first outer circle.
[0021] Optionally, the chip packaging structure further comprises an insulating layer arranged on the surface of the substrate, and part of the insulating layer is located in the cavity.
[0022] Optionally, along the first direction, the height of the cavity is arranged as H3, the height of the insulating layer is arranged as H4, the thickness of the protective layer arranged on the insulating layer is arranged as H5, and the height of the bonding portion is arranged as H6.
[0023] wherein H5+H4
[0024] Optionally, along the first direction, a plane where the top end of the fitting part is located is between the bottom surface of the packaging chip and the top surface of the packaging chip.
[0025] Optionally, along the first direction, the height from the top end of the fitting part to the surface of the substrate is H7.
[0026] wherein 0.5H3≤H7≤H3.
[0027] Optionally, the fitting part comprises a first sub-section and a second sub-section, the first sub-section is arranged on the second outer side of the protective layer, and the second sub-section is arranged on the first outer side of the protective layer.
[0028] wherein at least the first sub-section or the second sub-section is further provided with a micropore.
[0029] Optionally, the micropore comprises a first micropore, the thickness of the first sub-section is greater than or equal to the thickness of the second sub-section, and the first micropore is further arranged on the side of the first sub-section away from the packaging chip.
[0030] Optionally, the second sub-section is provided with a second micropore, wherein the second micropore is arranged towards the thickness direction of the packaging chip, and at least part of the second micropore is in communication with the first micropore.
[0031] Optionally, the first sub-section has a first adhesion, and the second sub-section has a second adhesion, wherein the first adhesion is less than the second adhesion.
[0032] Optionally, the fitting part further comprises a plurality of extension branches, the extension branches are arranged on the second outer side in a second direction away from the cavity.
[0033] Optionally, the micropore comprises a second micropore, the extension branches are provided with a third micropore, and part of the third micropore is in communication with the second micropore.
[0034] Optionally, the fitting part further comprises a recess, and the first sub-section and the second sub-section are arranged on two sides of the fitting part, respectively.
[0035] Optionally, further comprising a functional chip arranged on one side of the packaging chip.
[0036] wherein the functional chip and the packaging chip are arranged on the same side of the substrate, or the functional chip and the packaging chip are arranged on two sides of the substrate, respectively.
[0037] Optionally, the fitting part further comprises a third sub-section and a fourth sub-section which are arranged in layers.
[0038] The third sub-section is arranged on the side close to the cavity, the fourth sub-section is arranged on the side of the third sub-section away from the cavity, and the third sub-section and the fourth sub-section are partially arranged in layers in the first direction.
[0039] To solve the above problems, the utility model embodiment further provides a radio frequency front end module which comprises the chip packaging structure.
[0040] In the chip packaging structure and the radio frequency front end module provided in the utility model embodiment, the fitting part is arranged on the protective layer, the plastic sealing layer covers the fitting part, at least part of the fitting part is arranged around the cavity and close to the edge of the packaging chip, and at least the protective layer or the fitting part is arranged as an insulating part. By arranging the fitting part in the chip packaging structure, the fitting part effectively protects the film layer and avoids the plastic sealing material flowing into the packaging cavity, thereby avoiding the pollution of the chip and effectively improving the packaging effect and performance. BRIEF DESCRIPTION OF DRAWINGS
[0041] Figure 1 It is a chip packaging structure provided in the utility model embodiment;
[0042] Figure 2 It is another filter chip packaging structure schematic view provided in the utility model embodiment;
[0043] Figure 3 It is another chip packaging structure sectional schematic view provided in the utility model embodiment;
[0044] Figure 4 It is a sectional schematic view of the fitting part provided in the utility model embodiment;
[0045] Figure 5 It is another chip packaging structure schematic view provided in the utility model embodiment;
[0046] Figure 6 It is a top view schematic view of the chip packaging structure provided in the utility model embodiment;
[0047] Figure 7 It is still another packaging structure schematic view provided in the utility model embodiment;
[0048] Figure 8 It is still another packaging structure schematic view provided in the utility model embodiment;
[0049] Figure 9 It is another packaging structure schematic view provided in the utility model embodiment. DETAILED DESCRIPTION
[0050] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0051] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly.
[0052] It should also be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on the other component or may be connected to an intermediary component. When a component is referred to as being "connected to" another component, it can be directly connected to the other component or indirectly connected to the other component through an intermediary component.
[0053] Furthermore, the use of terms such as "first" and "second" in this application is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed in this application.
[0054] This application provides a chip packaging structure and a radio frequency front-end module. By setting a bonding portion in the chip packaging structure, the bonding portion can effectively avoid contamination of the chip body by the molding material and improve the chip packaging effect and performance.
[0055] like Figure 1 As shown, Figure 1 This application provides a chip packaging structure. The chip packaging structure provided in this application includes: a substrate 101, an insulating layer 102, a protective layer 103, a molding compound 104, a packaged chip 108, and a bonding portion 301.
[0056] Specifically, the substrate 101 can adopt a conventional circuit substrate, and driving traces are arranged in the substrate 101 to achieve the signal transmission purpose. In the substrate 101 provided in the embodiment of the present application, different specifications of circuit substrates can be selected according to the product requirements, so as to ensure the normal operation of the device.
[0057] In the embodiment of the present application, the substrate 101 includes the pads 105, which can be arranged in multiple numbers. When the pads 105 are arranged, the positions and numbers of the pads 105 correspond to the package chip 108 above. Specifically, when the pads on the package chip 108 are symmetrically arranged, the pads 105 on the substrate 101 are also symmetrically arranged correspondingly. When the package chip 108 is packaged, the pads on the package chip 108 are correspondingly and abutted to the pads 105.
[0058] Specifically, the package chip 108 is further arranged on one side of the substrate 101, and the package chip 108 can be correspondingly arranged in the flip region 20 of the substrate 101. When the package chip 108 is installed, the pads 106 on the package chip 108 are opposite to the pads 105. In the embodiment of the present application, the upper surfaces of the pads 105 can be flush with the upper surface of the substrate 101, or the upper surfaces of the pads 105 are located in the substrate 101. When the pads 105 are arranged, different pads 105 can be arranged at different positions of the substrate 101, which will be described in detail in the Figure 1 In the embodiment of the present application, only the pads 105 corresponding to the filter chip are shown, and other pads 105 can be arranged at other positions. Meanwhile, the pads 106 can be arranged as tin balls or other conductive materials to ensure the normal transmission of signals. When connected, the pads 106 can be opposite to the corresponding pads 105. In the embodiment of the present application, the number of the pads 105 is greater than or equal to the number of the pads 106, so as to ensure the connection effect and the connection between the substrate 101 and different components.
[0059] As shown in Figure 2 , Figure 2 Fig. 2 is another filter chip packaging structure provided in the embodiment of the present application, which is combined with the structure in Figure 1 . In the embodiment of the present application, when the substrate 101 is arranged, the pads 105 on the substrate 101 are exposed to the upper surface of the substrate 101, and the pads 105 protrude a certain height on the upper surface of the substrate 101. At this time, when the package chip 108 is packaged and aligned, the pads 106 on the package chip 108 are aligned with the pads 105. The packaging structure in the embodiment of the present application is suitable for the above two different substrates.
[0060] In the following embodiments, the packaging structure corresponding to the substrate provided in Figure 1 will be described in detail, and other types of substrates 101 are within the protection scope of the present application.
[0061] In the setting of the package chip 108, the package chip 108 includes a filter chip or other functional chip. Specifically, the functional chip includes at least one or more of a passive element and a non-filter chip, the passive element can include inductance, capacitance, etc., the non-filter chip can be one or more of a power amplifier, a low noise amplifier, a radio frequency switch, a coupler, a matching circuit, etc., the passive element can be one or more, and the non-filter chip can be one or more, the above-mentioned types and quantities of the package chip 108 can be set according to the product demand, so as to package different chips and meet the use demand.
[0062] Further, in the embodiment of the application, the insulating layer 102 is further arranged on the substrate 101, wherein the insulating layer 102 can be directly arranged on the surface of the substrate 101, the insulating layer 102 avoids the flip area 20 and the corresponding pad 105, such as the insulating layer 102 arranged on one side of the pad 105. Specifically, the insulating layer 102 can be tiled on the surface of the substrate 101 according to the demand, wherein the insulating layer 102 can be arranged on the upper surface or the lower surface of the substrate 101.
[0063] Wherein, in the setting of the insulating layer 102, the material of the insulating layer 102 includes insulating green paint, resin and other insulating materials, in the following embodiment, the insulating green paint is taken as an example for description, and other kinds of insulating layer materials are within the protection scope of the application. In preparation, the insulating green paint or resin is sprayed on the surface of the substrate 101, and the above-mentioned material is cured, so as to form the insulating layer 102 provided in the embodiment of the application. In this way, by arranging the insulating layer 102 on the surface of the substrate 101, on the one hand, the short circuit problem of different components can be avoided, on the other hand, the insulating layer 102 also has a certain thickness and strength, when other film layer structures are continuously arranged on the insulating layer 102, the insulating layer 102 can support them, so as to guarantee the stacking or transition purpose between different film layers.
[0064] In the embodiment of the application, in the setting of the insulating layer 102, the thickness of the insulating layer 102 can be set to 10um-30um, optionally, the thickness of the insulating layer 102 is set to any one of 10um, 15um, 20um, 25um or 30um, or other thickness values according to the specification of the substrate 101 and the size of the packaged chip, which will not be described here.
[0065] Further, a protection layer 103 is arranged on the side of the insulation layer 102 away from the substrate 101. In the embodiment of the present application, the protection layer 103 is arranged at least partially on the insulation layer 102. When the packaged chip 108 is packaged, the protection layer 103 is first coated, and then the protection layer 103 is pressed to achieve the purpose of sealing. Specifically, the protection layer 103 is formed on the first surface of the substrate 101 and covers the packaged chip 108, such as covering the sidewall and the surface away from the substrate 101 of the surface acoustic wave filter chip. In this way, part of the inner side of the protection layer 103 and the bottom surface of the packaged chip 108, the side surface of the insulation layer 102, and the upper surface of the substrate 101 form a cavity 201. The cavity 201 is a closed cavity 201, thereby achieving the sealing of the packaged chip 108.
[0066] In the embodiment of the present application, when the protection layer 103 is arranged, the protection layer 103 is arranged as an insulation material layer, such as a high molecular or polymer film material. Specifically, in the embodiment of the present application, the protection layer 103 includes one or a combination of epoxy resin, polyimide resin, benzocyclobutene resin, polyurethane, polyethylene, polypropylene, polyolefin, polyamide, polyurethane, and polyvinyl alcohol. In the embodiment of the present application, the protection layer 103 is arranged as a plastic material. The plastic material has good fluidity. On the one hand, the adhesion between the protection layer 103 and the surface acoustic wave filter chip can be ensured when the packaged chip 108 is sealed. On the other hand, the plastic material is easier to form during the packaging and pressing process, thereby reducing the process difficulty.
[0067] Further, when the protection layer 103 is arranged, the film thickness of the protection layer 103 is set to 10 um to 30 um. Specifically, the thickness of the protection layer 103 is set to one of 10 um, 15 um, 20 um, 25 um, and 30 um, or is set according to the specifications of the product and the size of the substrate to ensure that the device has high working performance after the packaging process is completed.
[0068] In the embodiment of the present application, the protection layer 103 is arranged on the surface of the protection layer 103 away from the substrate 101. The adhesion part 301 is arranged on the surface of the protection layer 103 away from the substrate 101. Details are shown in the following table. Figure 1In the embodiment, the fitting part 301 is fitted with the upper surface of the protection layer 103. In the process of setting the fitting part 301, the fitting part 301 is set near the four sides of the cavity 201, for example, at least part of the fitting part 301 is set near the edge of the packaged chip 108. Optionally, the bending area 21 of the protection layer 103 is the area where the horizontal side of the protection layer 103 intersects with the vertical side, that is, the position where the protection layer 103 gradually transitions from the horizontal plane to the vertical plane or the inclined plane. In the embodiment, the fitting part 301 is set in the bending area 21. By setting the fitting part 301 in the area, on the one hand, the height difference between the film layers can be effectively reduced, and the transition is more gentle. On the other hand, by setting more material in the bending area 21, the thickness of the protection layer 103 at the position relative to the cavity 201 is increased. When the protection layer 103 is pressed, the pressure threshold that the protection layer 103 can withstand is improved, thereby avoiding the risk of breaking the protection layer 103 in the packaging process.
[0069] Further, in the process of setting the protection layer 103, the thickness of the protection layer 103 in the bending area 21 is greater than or equal to the thickness of the protection layer 103 in other areas. In this way, the performance of the film layer in the bending area 21 can be further improved, and the problem of material flowing into the cavity 201 and polluting the packaged chip 108 due to the rupture in the packaging process can be avoided.
[0070] Further, in the embodiment, the fitting part 301 can be made of plastic material, for example, the fitting part 301 includes non-glue, green paint, silica gel, polyurethane, polyethylene, polypropylene, polyolefin, polyamide, polyurethane, or other polymer materials.
[0071] In the embodiment, at least the protection layer 103 or the fitting part 301 is set as an insulating part. Optionally, the protection layer 103 is set as a polymer film, and the fitting part 301 is set as a silica gel material. In this way, by setting the protection layer 103 and the fitting part 301 as polymer materials with good plasticity, on the one hand, the process difficulty in the packaging process can be reduced, and on the other hand, the plastic insulating material can better form a sealing effect, thereby improving the performance of the device. At the same time, in the embodiment, the fitting part 301 is set in the bending area 21 of the protection layer 103, and the fitting part 301 can effectively protect the protection layer 103 in the area, thereby avoiding the problem that the film layer in the area is broken and the material flows into the cavity 201, polluting the packaged chip 108, in the process of coating and packaging.
[0072] For details Figure 1In the embodiment, the protective layer 103 is arranged along the second direction X and the first direction Y when the protective layer 103 is arranged. In the embodiment, the second direction X can be defined as a horizontal direction, for example, the surface of the substrate 101 corresponds to the horizontal direction as the second direction X, and the direction intersecting with the second direction X is defined as the first direction Y. Optionally, the first direction Y can be a vertical direction, for example, along the thickness direction of the film layer.
[0073] For details Figure 1 In the embodiment, the protective layer 103 includes the second outer side surface 1031 and the first outer side surface 1032 connected with the second outer side surface 1031 when the protective layer 103 is arranged. The second outer side surface 1031 is arranged along the second direction X, and the first outer side surface 1032 is arranged along the first direction Y. The second outer side surface 1031 and the first outer side surface 1032 are both away from one side of the substrate 101. Specifically, the second outer side surface 1031 can be arranged parallel to the surface of the substrate 101, and the first outer side surface 1032 is arranged obliquely relative to the second outer side surface 1031, for example, vertically relative to the second outer side surface 1031. In the embodiment, the first outer side surface 1032 is actually four side surfaces in different directions, for example, when the packaged chip 108 is in a rectangular structure, one of the first outer side surfaces 1032 is arranged in each of the four different directions of the packaged chip 108. Similarly, the second outer side surface 1031 is the upper surface of the protective layer 103, which is not described herein.
[0074] In the embodiment, the fitting part 301 is fitted with the second outer side surface 1031 and the first outer side surface 1032. The fitting part 301 is arranged in the bending area 21. In this way, the fitting part 301 can be closely fitted with the second outer side surface 1031, and the second outer side surface 1031 can support and fix the fitting part 301. In addition, the first outer side surface 1032 can also strengthen the protective layer 103 in the area opposite to the cavity 201, so as to prevent the first outer side surface 1032 from being broken during packaging, and to prevent the chip in the cavity 201 from being polluted, thereby improving the packaging effect.
[0075] Further, along the second direction X, the thickness of the fitting part 301 close to the packaged chip is greater than the thickness of the fitting part 301 away from the packaged chip. In this way, the fitting part 301 close to the cavity 201 has a certain thickness, thereby better preventing the film layer from being broken.
[0076] In the embodiment, for details Figure 1In the structure shown in FIG. 3, when the bonding portion 301 is arranged, the bonding portion 301 has a bonding length H1 on the second outer side surface 1031 in the second direction X, and has a bonding length H2 on the first outer side surface 1032 in the first direction Y, where H2≤H1. Alternatively, the bonding lengths of the two are arranged to be the same length. In this way, the length of the coverage area of the bonding portion 301 on the first outer side surface 1032 can be ensured, so that the protective layer 103 in this direction can be protected and cracking thereof can be avoided.
[0077] As shown in FIG. 4, Figure 3 Figure 3 FIG. 4 is a cross-sectional schematic view of another chip packaging structure provided in an embodiment of the present application, which is combined with the structure shown in FIG. 3. Figures 1-2 In the present application, when the insulating layer 102 is arranged, the insulating layer 102 is arranged on the surface of the substrate 101, and part of the insulating layer 102 is located in the cavity 201, and part of the protective layer 103 is arranged on the insulating layer 102.
[0078] Further, in combination with FIG. 4, Figure 1 In the embodiment of the present application, the height between the bottom surface of the packaged chip 108 and the surface of the substrate 101 is defined as the cavity height, which is arranged as H3. At the same time, the thickness of the insulating layer 102 in the first direction is arranged as H4, the thickness of the protective layer arranged on the insulating layer 102 is arranged as H5, and the height of the bonding portion 301 in the first direction is arranged as H6.
[0079] In the embodiment of the present application, H4+H5<H3. Alternatively, in an embodiment, the cavity height H3=40um, and the corresponding H4=18um and H5=15um. At this time, with the same plane as the reference, the top of the cavity exceeds the sum of the heights of the insulating layer 102 and the protective layer 103. In the first direction Y, the protective layer 103 will have a spacing D with the top of the cavity 201. Because of the spacing D, when a large pressure is applied in the chip packaging process, the protective layer 103 corresponding to the spacing D is prone to cracking, thereby causing the material of the outer layer to flow into the cavity 201 through the spacing D, resulting in pollution.
[0080] Further, when the heights of the above-mentioned parts are arranged, |H5+H4+H2-H3|≤10um, and in an embodiment, H3≤H2+H4+H5. At this time, as shown in detail in FIG. 5, Figure 1 The height of the bonding portion 301 is high, which can completely cover the spacing D.
[0081] In the embodiment of the present application, the bonding portion 301 is arranged outside the protective layer 103. In an embodiment, the bonding portion 301 completely covers the interval D. At this time, the height of the bonding portion 301 is greater than D, that is, in the first direction Y, the plane where the top end of the bonding portion 301 is located is higher than the bottom surface of the packaged chip 108. Alternatively, the plane where the top end of the bonding portion is located is between the bottom surface of the packaged chip 108 and the top surface of the packaged chip 108. For details, see the height of the bonding portion 108 in Figure 1 . In this way, the bonding portion 301 can completely cover the protective layer 103 corresponding to the interval D and protect it to prevent the film layer in this area from being broken and avoid contamination in the chip.
[0082] In another embodiment, for details, see Figure 3 , in the first direction, H3≥H2+H4+H5. At this time, the height of the bonding portion 301 is small, and the bonding portion 301 cannot completely cover the protective layer 103 corresponding to the interval D.
[0083] Alternatively, 0.5H3≤H2+H4+H5≤H3, at this time, the height of the top end of the bonding portion 301 in the first direction Y is controlled to be at least greater than 0.5H3, such as H2+H4+H5=0.75H3, which can effectively ensure that the protective layer 103 in the interval D area will not be broken during packaging and cause material to flow into the cavity 201. Thus, the packaging performance of the device is ensured.
[0084] Further, in the embodiment of the present application, when the bonding portion 301 is arranged, the cross-sectional shape of the bonding portion 301 can be arranged as any one of an arc shape, a triangular shape, a trapezoidal shape, and a polygonal shape, such as Figure 3 , the cross-sectional shape of the bonding portion 301 is arranged as an arc shape, and the arc shape can be arranged according to actual needs. The shape in the present application is only an example. Alternatively, the curvature of the arc-shaped cross section gradually decreases from the top to the bottom of the bonding portion 301, so that the surface of the bonding portion 301 has a gradually transitioned arc-shaped structure. In this way, when other film layers are prepared on the bonding portion 301 subsequently, large internal stress can be avoided, and thus the performance of the packaged chip is improved.
[0085] For details, see Figure 3 , in the embodiment of the present application, when the height of the top end of the bonding portion 301 does not exceed the height of the top of the cavity 201, the bonding portion 301 further comprises at least one recessed portion 302, wherein the recessed portion 302 can be arranged at the middle position of the bonding portion 301.
[0086] At this time, the bonding portion 301 includes a recessed portion 302. On both sides of the recessed portion 302, the bonding portion 301 includes a first sub-segment 3011 and a second sub-segment 3012. The first sub-segment 3011 is disposed on the side away from the cavity 201 and is located on the first side surface of the protective layer 103. The second sub-segment 3012 is disposed between the first sub-segment 3011 and the cavity, and is at least partially bonded to the first outer surface of the protective layer 103. In this embodiment, because the second sub-segment 3012 is closer to the cavity 201, the film thickness of the second sub-segment 3012 is greater than or equal to the film thickness of the first sub-segment 3011, thereby enabling the second sub-segment 3012 to better protect the protective film 103 and prevent contamination of the cavity 201.
[0087] Thus, when the molding compound 104 continues to be provided on the protective layer 103 and the bonding portion 301, the recessed portion 302 is recessed towards the surface of the protective layer 103. When pressure is applied during the encapsulation process, the material of the molding compound 104 flows to a certain extent. It first tends to flow towards the vicinity of the recessed portion 302 and fill it completely. During the pressure application process, the recessed portion 302 can also play a role in pressure redistribution, effectively sharing the film pressure at the position not bonded by the bonding portion 301. This reduces the pressure borne by the uncovered protective layer 103 at the top region of the bonding portion 301. Thus, in this embodiment of the application, by redistributing the pressure, the problem of the protective layer 103 cracking at the cavity 201 is avoided.
[0088] Furthermore, in this embodiment, since a recess 302 is provided on the bonding portion 301, the recess 302 further enhances the contact and encapsulation effect of the molding compound 104. Under the same encapsulation pressure, the length and area of the insulating layer 102 can be effectively reduced. In this way, the volume occupied by each packaged chip can be further reduced, thereby achieving miniaturization of the packaged chip.
[0089] In this embodiment of the application, the recessed portion 302 can effectively reduce the amount of the bonding portion 301 while ensuring that the protective layer 103 does not crack, thereby improving its encapsulation effect and performance.
[0090] like Figure 4 As shown, Figure 4 This is a cross-sectional schematic diagram of the bonding portion provided in the embodiments of this application, combined with... Figures 1-3 In the membrane structure of this application embodiment, the bonding portion 301 further includes micropores 404. The micropores 404 are at least disposed on the first sub-segment 3011 or the second sub-segment 3012.
[0091] Specifically, the micropores 404 can include first micropores 1041 and second micropores 1042, the first micropores 1041 are arranged on the first sub-section 3011, and the second micropores 1042 are arranged on the second sub-section 3012. The first micropores 1041 can be arranged along the side away from the cavity 201, and the second micropores 1042 can be arranged obliquely relative to the first micropores 1041, such as the second micropores 1042 arranged along the thickness direction of the packaged chip corresponding to the first direction Y.
[0092] In the embodiments of the present application, the first micropores 1041 and the second micropores 1042 can be arranged separately, such as arranging only the first micropores 1041 on the bonding portion 301, or arranging only the second micropores 1042 on the bonding portion 301, or arranging both micropores on the bonding portion 301. In the following examples, both micropores are arranged as an example, and other examples are within the protection scope of the present application.
[0093] For details Figure 4 In the embodiments of the present application, when the micropores 404 are arranged, at least part of the micropores 404 penetrate the bonding portion 301. Specifically, part of the micropores 404 penetrate from the top of the bonding portion 301 to the bottom, thereby forming a penetrating micropore inside the bonding portion 301. At the same time, there are a certain number of micropores in the bonding portion 301 that do not penetrate. When pressure is applied during packaging and a plastic encapsulation layer 104 is arranged on the bonding portion 301, the micropores 404 will form flow channels, and part of the plastic encapsulation material will flow under the guidance of the micropores 404. In the embodiments of the present application, at least part of the openings of the micropores 404 are away from the side of the cavity, such as Figure 4 In the micropore structure in the embodiments of the present application, when under the action of pressure, the plastic encapsulation material will flow along the micropores. In this way, the micropores 404 will decompose or disperse the force originally acting in the direction of the cavity, thereby changing the stress on the protective layer 103 in the area not covered by the bonding portion 301, avoiding the protective layer 103 in this area from being broken and causing material to flow into the cavity due to excessive pressure during the packaging process. In the embodiments of the present application, the bonding portion 301 can effectively increase the pressure threshold during packaging, thereby improving the packaging effect.
[0094] In the embodiment of the present application, when the micropores 404 are arranged, the top of the bonding part 301 does not completely cover the corresponding protective layer 103 at the cavity area, so the protective layer 103 near the top of the bonding part 301 is more likely to be broken under the action of pressure. In the embodiment of the present application, when the second micropores 1042 on the second sub-section 1042 of the bonding part 301 are arranged, the second sub-section 1042 includes an inclined side surface 308, wherein the inclined side surface 308 is arranged near the top of the side surface 308. The first height of the inclined side surface 308 is used as a reference line, and the micropores and the corresponding openings are not arranged on the inclined side surface 308 above the reference line, while the micropores and the corresponding openings are arranged on the inclined side surface 308 below the reference line. In this way, there is no second micropore 1042 in the direction of the side wall, and when pressure is applied, there is no pressure in the direction of the cavity 201, thereby reducing the pressure on the side wall of the cavity 201, and avoiding the breakage of the film layer.
[0095] Further, in the embodiment of the present application, when the micropores 404 are arranged, the diameter of the second micropore 1042 is greater than or equal to the diameter of the first micropore 1041. In this way, the second micropore 1042 with a larger diameter can better share the side pressure of the film layer on the second sub-section 3012, thereby reducing the force on the protective layer 103, and preventing the protective layer 103 from being broken.
[0096] In the embodiment of the present application, when the micropores 404 are arranged, the second micropore 1042 can be one-to-one corresponding to the first micropore 1041, or a plurality of first micropores 1041 are connected to the same second micropore 1042, and the number of the first micropores 1041 is greater than or equal to the number of the second micropores 1042. In this way, the material flowing into the second micropore 1042 will continue to flow from the plurality of first micropores 1041, thereby reducing the flow resistance of the material in the micropore, and further improving the pressure at the bonding part 301 and the side wall of the cavity 201, thereby avoiding the breakage of the film layer in the weak stress area, and preventing the encapsulation material from flowing into the cavity and causing the chip to fail.
[0097] Further, as shown in Figure 4 when the second micropore 1042 is arranged, the second micropore 1042 is arranged obliquely relative to the first micropore 1041, and the outlet of the second micropore 1042 can be arranged on the top surface of the second sub-section 3012. In this way, the material can directly flow downward through the second micropore 1042, or the lateral force during plastic packaging can be directed downward, so as to avoid the pressure on the side wall of the cavity 201.
[0098] In this embodiment of the application, when setting the micropores 404, the number of micropores on each bonding part is not specifically limited. The micropore structure is used to improve the pressure distribution in the film layer during the encapsulation process, thereby effectively avoiding the problem that the film layer in the weak stress area of the cavity 201 is prone to cracking, and thus improving the encapsulation effect and performance.
[0099] Optionally, in this embodiment, the bonding portion 301 can also be configured as a three-dimensional mesh structure. Multiple meshes in different directions are distributed within the three-dimensional mesh structure, and these meshes in different directions are cross-linked to form a cross-linked structure. When other encapsulating materials are placed above the three-dimensional mesh structure, the encapsulating materials flow within the three-dimensional mesh structure. Furthermore, the three-dimensional mesh structure can further improve or redistribute the pressure within the film layer, effectively preventing film layer rupture at weak points. Simultaneously, since the bonding portion 301 has multiple micropores, these micropores can also act as adsorption agents. When other encapsulating layers 104 are placed on the bonding portion 301, the micropores can increase the contact area between the encapsulating layer 104 and the bonding portion 301, thereby improving the bonding effect. Additionally, since the bonding portion 301 can directly contact the outer surface of the protective layer 103, the micropores can effectively improve the bonding effect between the bonding portion 301 and the protective layer 103, thus preventing problems such as film layer lifting or encapsulation failure after encapsulation.
[0100] like Figure 5 As shown, Figure 5 This is a schematic diagram of another chip packaging structure provided in the embodiments of this application, combined with Figures 1-4 In the membrane layer of this application embodiment, when setting the encapsulation structure, compared with... Figure 4 Regarding the first sub-segment 3011 and the second sub-segment 3012, in Figure 4 In the first sub-segment 3011 and the second sub-segment 3012 are not stacked, but in the embodiments of this application, the bonding portion 301 can also be configured as a stacked structure, see details. Figure 5 In the process, the bonding portion 301 further includes a third sub-segment 3013 and a fourth sub-segment 3014. The third sub-segment 3013 and the fourth sub-segment 3014 are partially stacked, that is, in the first direction Y, at least a portion of the fourth sub-segment 3014 is disposed on the third sub-segment 3013.
[0101] Specifically, during the setup, the third sub-segment 3013 is positioned near the packaged chip 108, and simultaneously adheres to the first outer side surface 1032 and the second outer side surface 1031. A portion of the bottom surface of the fourth sub-segment 3014 is positioned on the first outer side surface 1032, and a portion of the fourth sub-segment 3014 is positioned on the sidewall of the third sub-segment 3013, thus partially overlapping the two. In this embodiment, since the fourth sub-segment 3014 and the third sub-segment 3013 are at least partially overlapped, the thickness or height of the bonding portion 301 is increased. When the molding compound 104 is further applied, the stacked structure can further enhance the protection effect of the protective layer 103 corresponding to the cavity 201 region, thereby preventing the protective layer 103 in this region from cracking during the packaging process and causing material to flow into the cavity 201, thus improving the packaging effect. In this embodiment, the number of stacked layers can be set according to actual needs, and is not limited to a two-layer structure; other numbers of stacked structures are within the protection scope of this application. Furthermore, when setting the third sub-segment 3013 and the fourth sub-segment 3014, a corresponding microporous structure can be provided in at least one sub-segment. Optionally, microporous structures can be provided in both the third sub-segment 3013 and the fourth sub-segment 3014, and the micropores in the third sub-segment 3013 and the fourth sub-segment 3014 are interconnected, thereby improving the flow and pressure of the internal material through the microporous structures in the two different sub-segments and improving the encapsulation effect. Alternatively, no microporous structures can be provided in either sub-segment; all of the above different structures are within the protection scope of this application.
[0102] Furthermore, in the embodiments of this application, when the third sub-segment 3013 and the fourth sub-segment 3014 are provided, the fourth sub-segment 3014 can also completely cover the third sub-segment 3013. At this time, the height of the fourth sub-segment 3014 in the first direction Y can be greater than or equal to the height of the third sub-segment 3013, thereby further improving the reliability of the encapsulation by providing multiple overlapping bonding portions.
[0103] like Figure 6 As shown, Figure 6 This is a top view of the chip packaging structure provided in the embodiments of this application. (Combined with...) Figures 1-4 In the structure described in this embodiment, when the bonding portion 301 is provided, the bonding portion 301 can be provided around the perimeter of the packaged chip 108 in at least one ring. For example... Figure 6 As shown, a bonding portion 301 is provided around the perimeter of the packaged chip 108, and the bonding portion 301 is simultaneously bonded to the second outer side 1031 and the first outer side 1032 of the protective layer 103.
[0104] In the setting, the width of the bonding part 301 on different outer sides can be set according to the above examples, which will not be repeated here. At the same time, in the setting of the bonding part 301, it can be set by the dispensing process or the spraying process. The adhesive material is coated at the corresponding position of the protective layer 103, and finally a ring of the bonding part 103 is formed. Details are shown in Figure 6 In the above structure, the bonding part 301 is arranged around the periphery of the package chip 108, and is set as a continuous ring. Figure 6 In the above structure, the bonding part 301 is arranged around the periphery of the package chip 108, and is set as a continuous ring.
[0105] Further, in the setting of the bonding part 301, two rings can also be set. At this time, the bonding part 301 includes a first inner ring 3031 and a first outer ring 3032. The first inner ring 3031 is arranged on the side close to the cavity 201, and the first outer ring 3032 is arranged on the side away from the cavity of the first inner ring 3031. At this time, the first inner ring 3031 is arranged on the second outer side and the first outer side, and the first outer ring 3032 is arranged on the second outer side. In this way, by setting two rings of the bonding part, and the height of the bonding part of the first outer ring 3032 is less than or equal to the height of the first inner ring 3031, so that a height difference is formed between the two bonding parts of different heights, which improves the bonding effect of the plastic sealing layer 104, and further improves the packaging performance.
[0106] In the embodiment of the application, the first inner ring 3031 can be set as a continuous ring, the first outer ring 3032 can be set as a continuous ring, or the first outer ring 3032 is set as a separated multi-segment structure with gaps between the multi-segment structure. At this time, the first outer ring 3032 includes a plurality of discontinuous sub-segments, wherein the distance between the adjacent two sub-segments can be set as the same distance value. When the plastic sealing layer 104 is set on the protective layer 103 and the bonding part 301, the plastic sealing layer 104 will cover the first inner ring 3031 and the first outer ring 3032, and because the gaps are set between the sub-segments of the first outer ring 3032, the corresponding material of the plastic sealing layer 104 will be bonded to the protective layer 103 through the gap, thereby increasing the bonding effect between the two layers.
[0107] Further, in the embodiment of the application, the bonding part 301 can also include a transition ring. In combination with the structure in Figure 6 The transition ring is not specifically shown, which is arranged in the blank area between the first inner ring 3031 and the first outer ring 3032, and the transition ring is arranged around the first inner ring 3031. Optionally, the transition ring can be continuously arranged, or the transition ring is set as a separated multi-segment.
[0108] In this embodiment, since the first inner ring 3031, the transition ring, and the first outer ring 3032 are all directly disposed on the protective layer 103, in order to improve the bonding effect and sealing performance of the subsequent molding layer 104 with the protective layer 103 and the bonding portion 301, the bonding portions at different locations are differentiated in this embodiment: the height of the transition ring is less than the height of the first inner ring 3031 and the first outer ring 3032, and the height of the first inner ring 3031 is greater than the height of the first outer ring 3032. In this way, the bonding portions in different areas are set with different heights, which can improve the material flow of the molding layer and make it have a better fixing effect without displacement. On the other hand, by setting multiple bonding portions 301 at different locations, the fixing effect of the bottom protective layer can also be strengthened.
[0109] Furthermore, a molding compound 104 is provided above the protective layer 103 and the bonding portion 301. The molding compound 104 can be prepared by injection molding or other coating processes, and can be made of resin materials, such as epoxy resin, polybutylene terephthalate, polyimide resin, benzocyclobutene resin, polyamide, or one or more polymeric plastic materials. In this embodiment, the thickness of the molding compound 104 can be set to 80µm to 150µm. Optionally, it can be set according to the needs of different products; for example, in this application, the thickness of the molding compound 104 is set to 85µm.
[0110] like Figure 7 As shown, Figure 7 This is a schematic diagram of another encapsulation structure provided in an embodiment of this application. Referring to the other figures above, in this embodiment, when the bonding portion 301 is provided, the bonding portion 301 further includes an extension branch 1033. The extension branch 1033 is disposed along a second direction away from the cavity 201, and is correspondingly disposed on the second outer surface. In this embodiment, the extension branch 1033 can be configured as a long strip structure or a wavy structure. Preferably, the extension branch 1033 is configured as a wavy structure, thus the extension branch has a relatively long length. When the molding layer 104 is further disposed on the extension branch 1033, the first inner ring 1031, and the first outer ring 1032, the wavy extension branch 1033 can further increase the contact area with the two side films, thereby improving the encapsulation effect.
[0111] Furthermore, when setting the extension branch 1033, one end of the extension branch 1033 can be connected to the first inner ring 1031, and the other end can be connected to or not connected to the first outer ring 1032, and the extension branch 1033 can be correspondingly set on the side of the first inner ring 1031 away from the cavity 201. Optionally, both ends of the extension branch 1033 are connected to the first inner ring 1031 and the first outer ring 1032 respectively.
[0112] Meanwhile, to improve the encapsulation effect and further reduce the pressure on the film layer on the cavity sidewall during encapsulation, in this embodiment, a third micropore is also provided in the extension branch 1033. This is not specifically shown in the figure, but the structure of the third micropore can be set with reference to the structures of the first micropore 1041 and the second micropore 1042, and will not be described in detail here. Some of the third micropores are connected to the second micropore 1042 or the first micropore 1041, thereby improving the pressure distribution on the film layer during the encapsulation process, thus avoiding the problem of easy rupture of the protective layer at the cavity sidewall and improving the encapsulation effect.
[0113] In this embodiment of the application, when the bonding portion 301 is provided, the modulus of the bonding portion 301 is less than or equal to the modulus of the protective layer 103, or the strength or hardness of the bonding portion 301 is less than or equal to the strength or hardness of the protective layer 103. In this way, since the bonding portion 301 has a lower strength than the protective layer 103, the bonding portion 301 will not damage the protective layer after being pressurized, while effectively improving the packaging effect and performance of the chip.
[0114] Furthermore, in this embodiment, the first segment has a first adhesiveness and the second segment has a second adhesiveness, wherein the first adhesiveness is less than the second adhesiveness. In this way, the first segment 1041 can fit more tightly with the protective layer 103, and will not cause displacement or other problems during the pressure application process, thereby ensuring the packaging effect of the chip provided in this embodiment.
[0115] like Figure 8 As shown, Figure 8 This is a schematic diagram of another packaging structure provided in an embodiment of this application. Referring to other figures, in this embodiment, when setting the bonding portion 301, in addition to the bonding portions 301 set on the first outer surface 1032 and the second outer surface 1031, the bonding portion 301 can also be correspondingly set on other outer surfaces of the protective layer 103. For example, the bonding portion 301 may also include a bonding portion 301 that can be correspondingly set on the upper surface 206 of the protective layer 103. In this case, the protective layer 103 can be at least set at the edge of the upper surface 206, and during setting, multiple different bonding portions 301 can be set on the upper surface 206 according to product requirements. All of the above different distribution structures are within the protection scope of this application.
[0116] Optionally, multiple adjacent bonding portions 301 can be provided on the upper surface 206, with the same spacing between adjacent bonding portions 301. At the same time, the height of the bonding portion 301 near the edge of the upper surface 206 is greater than or equal to the height of the bonding portion 301 in other areas. In this way, by providing multiple bonding portions 301 on the upper surface 206, the bonding effect of the protective layer 103 can be further enhanced. When preparing the molding layer 104, the molding effect and the stability after encapsulation can be further improved.
[0117] like Figure 9 As shown, Figure 9 This is a schematic diagram of another packaging structure provided in an embodiment of this application. (In conjunction with...) Figures 1-7 In this embodiment, the packaging structure further includes a functional chip 109. The functional chip 109 is disposed on one side of the packaged chip 108, such as at a corresponding position on at least one side of the surface acoustic wave filter chip. In this embodiment, when the functional chip 109 is disposed, a protective layer 103 may be disposed on or around the functional chip 109, or the protective layer 103 may not be disposed as required. When the protective layer 103 is not disposed, the molding compound 104 is directly used to cover it, thus sealing the functional chip 109.
[0118] Furthermore, in this embodiment, when both the surface acoustic wave filter chip and the non-filter functional chip 109 are simultaneously disposed within the packaging structure, the functional chip 109 may adversely affect the packaging of the packaged chip 108 during the packaging process, potentially causing loose packaging in the packaged chip 108 area after packaging. In this embodiment, the volume of the bonding portion 301 on the side closer to the functional chip 109 is larger than the volume of the bonding portion on the side farther from the functional chip 109.
[0119] Specifically, the height of the bonding portion 301 on the side closer to the functional chip 109 can be greater than the height of the bonding portion 301 on the side farther from the functional chip 109, so as to... Figure 7 Taking the structure in the example, a bonding portion 301 is provided at each of the four sides around the packaged chip 108. The side closer to the functional chip 109 is the first side. The height of the bonding portions on the other three sides is set to be the same, and each is less than the height of the bonding portion 301 on the first side. In this way, by increasing the height of the bonding portion on the side closer to the functional chip 109, the impact of the functional chip 109 on the packaging effect in that area is reduced, ensuring that the packaged chip 108 has the same packaging effect at different positions around the packaged chip 108.
[0120] Furthermore, when setting the functional chip 109, the functional chip 109 and the package chip 108 can be set on the same side of the substrate 101, or the functional chip 109 and the package chip 108 can be set on opposite sides of the substrate 101. Specifically, it can be set according to the usage requirements of different products, and no specific limitation is made here.
[0121] The utility model also provides a kind of radio frequency front-end module, and the radio frequency front-end module includes the packaging chip described in any one embodiment above.In radio frequency front-end module, it can also include antenna, switch, power amplifier, low noise amplifier, capacitor and inductor and other devices or chip, when the different chips are packaged, the packaging structure in the application can be used, and the application embodiment is not described here.
[0122] The technical features of the above-described embodiments can be combined arbitrarily, and to make the description concise, all possible combinations of the technical features in the above-described embodiments are not described, but as long as the combinations of the technical features do not exist contradictory, they should be considered as the scope of the present application.
[0123] The above is only a preferred embodiment of the utility model, and does not limit the utility model, and any modification, equivalent replacement and improvement within the spirit and principle of the utility model should be included in the protection scope of the utility model.
Claims
1. A chip package structure, characterized by, The chip packaging structure comprises a substrate, a packaging chip, a protective layer, and a plastic encapsulation layer. The substrate comprises at least a solder pad. The packaging chip is electrically arranged on the substrate. The protective layer covers the packaging chip and is partially arranged on the substrate. The protective layer, the packaging chip, and the substrate form a cavity. The protective layer comprises a first outer side arranged in a first direction and a second outer side arranged in a second direction intersecting the first direction. The plastic encapsulation layer is arranged on a side of the protective layer away from the substrate.
2. The chip package structure of claim 1, wherein, The chip packaging structure further comprises a bonding part and a solder point. The bonding part is arranged on the protective layer.
3. The chip package structure of claim 1, wherein, The plastic encapsulation layer covers the bonding part.
4. The chip package structure of claim 1, wherein, The number of solder pads is greater than or equal to the number of solder points. The first outer side corresponds to the four sides of the packaging chip. The bonding part is arranged on the first outer side and the second outer side.
5. The chip package structure of claim 4, wherein, At least the protective layer or the bonding part is arranged as an insulating part. In the second direction, the bonding length of the bonding part on the second outer side is H1.
6. The chip package structure of any one of claims 1-5, wherein, In the first direction, the bonding length of the bonding part on the first outer side is H2.
7. The chip package structure of claim 6, wherein, H2≤H1, and the second direction intersects the first direction. In the second direction, the thickness of the bonding part near the packaging chip is greater than the thickness of the bonding part away from the packaging chip.
8. The chip package structure of claim 7, wherein, The bonding part comprises a first inner ring and a first outer ring arranged on a side of the first inner ring away from the cavity.
9. The chip package structure of claim 7, wherein, The first inner ring corresponds to the bonding part arranged on the second outer side and the first outer side of the protective layer.
10. The chip package structure of claim 1, wherein, The first outer ring is arranged on the second outer side. The first inner ring is continuously arranged around the packaging chip. The first outer ring is arranged in multiple segments around the first inner ring. The bonding part further comprises a transition ring arranged between the first inner ring and the first outer ring. The transition ring is arranged in segments. The height of the transition ring is less than the height of the first inner ring and the first outer ring. The height of the first inner ring is greater than the height of the first outer ring. The chip packaging structure further comprises an insulating layer arranged on the surface of the substrate. In the first direction, the height of the cavity is H3, the height of the insulating layer is H4, and the thickness of the protective layer arranged on the insulating layer is H5. H5+H4 The top end of the bonding part is located between the bottom surface of the packaging chip and the top surface of the packaging chip. 0.5H3≤H2+H4+H5≤H3. The bonding part comprises a first sub-segment and a second sub-segment. The first sub-segment is arranged on a side away from the cavity. The second sub-segment is arranged between the cavity and the first sub-segment. At least the first sub-segment or the second sub-segment further comprises a micropore.
11. The chip package structure of claim 10, wherein, The micro-holes include first micro-holes, and the first sub-section has a thickness less than or equal to that of the second sub-section, and the first micro-holes are arranged on the first sub-section away from the side of the package chip.
12. The chip package structure of claim 11, wherein, The second sub-section is provided with second micro-holes, wherein the second micro-holes are arranged towards the thickness direction of the package chip, and at least part of the second micro-holes are in communication with the first micro-holes.
13. The chip package structure of claim 10, wherein, The first sub-section has a first viscosity, and the second sub-section has a second viscosity, wherein the first viscosity is less than the second viscosity.
14. The chip package structure of claim 10, wherein, The fitting part further includes a plurality of extension branches, which are arranged on the second outer side in a second direction away from the cavity.
15. The chip package structure of claim 14, wherein, The micro-holes include second micro-holes, and the extension branches are provided with third micro-holes, and part of the third micro-holes are in communication with the second micro-holes.
16. The chip package structure of claim 10, wherein, The fitting part further includes recessed parts, and the first sub-section and the second sub-section are arranged on both sides of the fitting part, respectively.
17. The chip package structure of claim 1, wherein, The package chip includes a filter chip, and further includes a functional chip arranged on one side of the filter chip. The functional chip and the filter chip are arranged on the same side of the substrate, or the functional chip and the filter chip are arranged on both sides of the substrate, respectively.
18. The chip package structure of claim 1, wherein, The fitting part is further arranged on the upper surface of the protective layer.
19. The chip package structure of claim 1, wherein, The fitting part further includes a third sub-section and a fourth sub-section arranged in layers; The third sub-section is arranged on the side close to the cavity, the fourth sub-section is arranged on the side of the third sub-section away from the cavity, and the third sub-section and the fourth sub-section are partially arranged in layers in the first direction.
20. A radio frequency front end module, comprising: The chip package structure as claimed in any one of claims 1-19.