Display substrate and display device
By designing non-circular electrical connection holes and peripheral extension lug structures, the problem of rising material costs for electronic paper screens was solved, resulting in reduced size and lower cost.
Patent Information
- Application Number
- CN202422987650.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-04
- Publication Date
- 2026-02-10
- Estimated Expiration
- 2034-12-04
AI Technical Summary
The design of electrical connection holes in existing electronic paper screens has led to an increase in the size of the electronic ink layer, protective film layer, and array substrate, resulting in increased material costs and a decrease in screen-to-body ratio.
The electrical connection hole is designed to be non-circular, with its dimension along the first direction being smaller than that along the second direction. Combined with the lug design of the peripheral extension area, the extension length of the electrical connection hole in the first direction is shortened, reducing material waste.
While ensuring electrical performance, the dimensions of the electronic ink layer, protective film layer, and array substrate were shortened, the number of cuts was increased, and the material cost was reduced.
Smart Images
Figure CN223897740U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of display technology, and in particular to a display substrate and a display device. Background Technology
[0002] Electronic paper screens are displays made using electrophoretic display technology. They achieve image display by applying driving voltages to each pixel through control circuitry on a TFT (thin-film transistor) substrate. As a reflective display, electronic paper screens can maintain the displayed image for a long time without continuous refreshing after an image is updated, resulting in very low power consumption. Due to its many advantages, including low power consumption, wide viewing angle, high contrast, and eye-friendly design, electronic paper screens are increasingly widely used in electronic price tags, e-books, and billboards. Utility Model Content
[0003] This disclosure provides a display substrate and a display device that can reduce costs.
[0004] The technical solutions provided in this disclosure are as follows:
[0005] In a first aspect, embodiments of this disclosure provide a display substrate, comprising:
[0006] Array substrate, including pixel circuitry;
[0007] An electronic ink layer is disposed on the side of the array substrate on which the pixel circuit is disposed. The electronic ink layer has a display area and a peripheral extension area extending from the display area along a first direction. An electrical connection hole is provided in the peripheral extension area, and an electrical connection point is provided at the position of the electrical connection hole. The electrical connection hole is used to electrically connect the electrode of the electronic ink layer to the pixel circuit.
[0008] A protective film layer is disposed on the side of the electronic ink layer opposite to the array substrate; wherein,
[0009] The electrical connection hole has a first dimension D along the first direction and a second dimension L along the second direction, wherein L / D is greater than 1, and the second direction is perpendicular to the first direction.
[0010] For example, the value range of the first dimension D is 0.6~2mm; the value range of the second dimension L is 1.5~6mm.
[0011] For example, the peripheral extension area includes at least one first lug that extends from the display area along the first direction, and at least one first lug is provided with the electrical connection hole.
[0012] For example, the peripheral extension area includes at least two first lugs, which are spaced apart along the second direction, and each first lug has an electrical connection hole; or, the peripheral extension area includes only one first lug.
[0013] For example, on the side where the peripheral extension area is located, in the first direction, the electronic ink layer has a first edge away from the display area, and the electrical connection hole has a second edge on the side away from the display area; wherein, the electrical connection hole is a non-closed hole, and the first edge and the second edge are flush; or, the electrical connection hole is a closed hole, and the first edge and the second edge have a first distance along the first direction.
[0014] For example, the value of the first spacing is in the range of 0.5~3.0mm.
[0015] For example, on the side where the peripheral extension area is located, the edge shape of the protective film layer is adapted to the edge shape of the electronic ink layer, and the edge of the protective film layer extends beyond the edge of the electronic ink layer.
[0016] For example, on the side where the peripheral extension area is located, there is a second spacing between the edge of the protective film layer and the edge of the electronic ink layer along the first direction, the second spacing being 0.6~2.0mm.
[0017] For example, on the side where the peripheral extension area is located, the edge of the array substrate extends beyond the edge of the protective film layer.
[0018] For example, on the side where the peripheral extension area is located, the edge of the array substrate extends beyond the edge of the protective film layer, and there is a third distance between the edge of the array substrate and the edge of the protective film layer along the first direction, the third distance being greater than or equal to 0.4 mm.
[0019] For example, the electrical connection point includes silver paste dots.
[0020] For example, the array substrate includes a bonding area located on one side of the display area, the bonding area being connected to a flexible circuit board, wherein the peripheral extension area and the bonding area are located on the same side of the display area.
[0021] For example, the array substrate includes a bonding area located on one side of the display area, the bonding area being bonded to a driver chip, wherein a protective adhesive layer is coated around the driver chip.
[0022] For example, the electronic ink layer has an edge sealing adhesive layer around its perimeter, and the edge sealing adhesive layer is at least partially located between the protective film layer and the array substrate, and at least partially located on the peripheral side of the protective film layer.
[0023] Secondly, embodiments of this disclosure also provide a display device, which includes a display substrate as described above.
[0024] The beneficial effects of the embodiments disclosed herein are as follows:
[0025] The display substrate and display device provided in this disclosure include an array substrate, an electronic ink layer, and a protective film layer. The electronic ink layer includes a display area and a peripheral extension area located on one side of the display area. The peripheral extension area has an electrical connection hole, through which the electrodes of the electronic ink layer and the pixel circuit of the array substrate can be connected. Since the electrical connection hole is used to electrically connect the electronic ink layer and the array substrate, the area of the electrical connection hole cannot be too small in order to ensure electrical performance. In the embodiments of this disclosure, the shape of the electrical connection hole is designed to be non-circular, but the dimension along the first direction is smaller than the dimension along the second direction. In this way, compared with the solution of designing the electrical connection hole as a perfect circle, the dimension of the electrical connection hole along the first direction can be shortened while ensuring that the area of the electrical connection hole meets the electrical requirements. This shortens the extension length of the peripheral extension area relative to the display area, thereby reducing the size of the electronic ink layer, the protective film layer, and the array substrate, increasing the number of cuts of the electronic ink layer, the protective film layer, and the array substrate, and reducing costs. Attached Figure Description
[0026] Figure 1 This is a schematic diagram showing the structure of a display substrate provided in some embodiments of this disclosure;
[0027] Figure 2 express Figure 1 Sectional view along line AA;
[0028] Figure 3 express Figure 2 Enlarged view of part C;
[0029] Figure 4 express Figure 1 Sectional view along the BB direction;
[0030] Figure 5 express Figure 4 Enlarged view of part of D;
[0031] Figure 6 This is a schematic diagram showing the structure of a display substrate provided in some other embodiments of this disclosure;
[0032] Figure 7 express Figure 6 Sectional view along line AA;
[0033] Figure 8 express Figure 7 Enlarged view of part C;
[0034] Figure 9 express Figure 6 Sectional view along the BB direction;
[0035] Figure 10 express Figure 9 Enlarged view of part of D. Detailed Implementation
[0036] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0037] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0038] The features such as "parallel," "perpendicular," and "identical" used in the embodiments of this disclosure include features in the strict sense of "parallel," "perpendicular," and "identical," as well as cases where "approximately parallel," "approximately perpendicular," and "approximately identical" include certain tolerances. Taking into account the measurement and the tolerances associated with the measurement of a specific quantity (e.g., limitations of the measurement system), they represent the acceptable deviation range for a specific value as determined by a person skilled in the art. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of said value.
[0039] Furthermore, throughout this document, unless otherwise defined, the terms “substantially,” “essentially,” “approximately,” and “about” are used to describe and explain small variations. When used with an event or situation, these terms can cover situations where the event or situation occurs precisely or approximately. For example, when used with a numerical value, these terms can include a range of variation of the value less than or equal to 10%, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” can refer to two surfaces arranged along the same plane within a micrometer range, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm.
[0040] It should be understood that, in the exemplary embodiments of this disclosure, when a layer or element is referred to as being on another layer or substrate, it may mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate. "A and B are set in the same layer" means that after A and B are formed using the same film deposition process to form a film layer for forming a specific pattern, the layer structure is formed in one patterning process using the same photomask.
[0041] Before providing a detailed description of the display substrate and display device provided in the embodiments of this disclosure, the related technologies will be described:
[0042] Electronic paper screens are displays made using electrophoretic display technology. They achieve image display by applying driving voltages to each pixel through control circuitry on a TFT (thin-film transistor) substrate. As a reflective display, electronic paper screens can maintain the displayed image for a long time without continuous refreshing after an image is updated, resulting in very low power consumption. Due to its many advantages, including low power consumption, wide viewing angle, high contrast, and eye-friendly design, electronic paper screens are increasingly widely used in electronic price tags, e-books, and billboards.
[0043] An electronic paper display (ESP) consists of a flip-flop (TFT), an electronic ink layer (FPL), and a protective film layer (PS). The display area (AA area) of the electronic ink layer is rectangular. In order to drive the electrodes (such as VCOM and ITO electrodes) on the electronic ink layer, a region needs to be extended outward on the electronic ink layer to form an extension area. The extension area is used to reserve electrical connection holes. Electrical connection points are set at the positions of the electrical connection holes, and the electrodes (such as VCOM electrodes) on the TFT and the electrodes (such as VCOM and ITO electrodes) on the electronic ink layer are connected through the electrical connection points.
[0044] However, due to the presence of electrical connection holes, both the electronic ink layer and the protective film layer need to extend out to a certain area, resulting in irregular shapes. This also leads to an increase in the size of the electronic ink layer, the protective film layer, and the array substrate, which widens the bezel of the electronic paper screen, reduces the screen-to-body ratio, and also reduces the number of cuts in the electronic ink layer, the protective film layer, and the array substrate of the electronic paper screen.
[0045] In the raw material production process, in order to improve efficiency and reduce costs, electronic ink layers, protective film layers, and array substrates are cut in the form of large sheets or master sheets. Several small pieces can be arranged on a large sheet or master sheet. One of the small pieces is the actual size and shape required for an electronic paper screen. The number of cuts is the maximum number of small pieces that can be arranged and cut on the large sheet. The decrease in the number of cuts for electronic ink layers, protective film layers, and array substrates of electronic paper screens leads to an increase in material costs.
[0046] However, since the electrical connection points connect the electronic ink layer and the array substrate, the size of these connection points affects the display, and the area of the connection points depends on the area of the electrical connection vias. As the industry's cost requirements increase, the distance between the electrical connection vias and the edge of the extension area on the electronic ink layer is decreasing. However, due to the on-resistance of the electrical connection points, their area cannot be made even smaller, thus preventing further cost reduction.
[0047] To address the aforementioned issues, this disclosure provides a display substrate and a display device that can reduce material costs.
[0048] like Figure 1 As shown, the display substrate provided in this embodiment includes:
[0049] Array substrate (TFT) 100, including pixel circuitry;
[0050] An electronic ink layer (FPL) 200 is disposed on the side of the array substrate 100 where the pixel circuit is located. The electronic ink layer 200 has a display area AA and a peripheral extension area 210 extending from the display area AA along a first direction X. An electrical connection hole 220 is provided in the peripheral extension area 210, and an electrical connection point 230 is provided at the position of the electrical connection hole 220. The electrical connection point 230 is used to electrically connect the electrode of the electronic ink layer 200 and the pixel circuit.
[0051] A protective film layer (PS) 300 is disposed on the side of the electronic ink layer 200 facing away from the array substrate 100; wherein,
[0052] The electrical connection hole 220 has a first dimension D along the first direction X and a second dimension L along the second direction Y, wherein L / D is greater than 1, and the second direction Y is perpendicular to the first direction X.
[0053] Since the electrical connection hole 220 is used to electrically connect the electronic ink layer 200 and the array substrate 100, in order to ensure electrical performance, the area of the electrical connection hole 220 cannot be too small. However, in this embodiment, the shape of the electrical connection hole 220 is designed to be non-circular, and the first dimension D along the first direction X is smaller than the second dimension L along the second direction Y.
[0054] In this way, compared to designs such as making the electrical connection hole 220 a perfect circle, the size of the electrical connection hole 220 along the first direction X can be shortened while ensuring that the area of the electrical connection hole 220 meets the electrical requirements. This shortens the extension length of the peripheral extension area 210 relative to the display area AA, thereby reducing the size of the electronic ink layer 200, the protective film layer 300, and the array substrate 100, increasing the number of cuts of the electronic ink layer 200, the protective film layer 300, and the array substrate 100, and reducing material costs.
[0055] Please see Figure 1 As shown, in some embodiments, the electrical connection hole 220 can be any suitable shape, such as a rectangle or a rounded rectangle. A rounded rectangle refers to a rectangular shape with rounded corners, where the right angles of its four corners are replaced by arcs. It should be noted that since the shape of the electrical connection hole 220 needs to be formed by cutting, designing the shape of the electrical connection hole 220 as a rounded rectangle makes the edge shape of the electrical connection hole 220 smoother and more conducive to the cutting operation.
[0056] In some embodiments, the electronic ink layer 200 may include two electrodes disposed opposite each other and ink microcups located between the two electrodes. Each ink microcup may contain multiple ink particles of different colors or ink particles of a single color. The ink particles in each ink microcup can move accordingly based on the pressure difference applied between the corresponding electrodes. By applying different voltages, the movement of different colored inks can be controlled, thereby displaying the desired image.
[0057] In some embodiments, the array substrate 100 may include a substrate and a pixel circuit disposed on the substrate, the pixel circuit including a plurality of thin-film transistors and a plurality of signal lines, etc.
[0058] Please see Figure 1As shown, a bonding area 110 may be provided in the peripheral area of the array substrate 100, in which a driver chip (IC) 120 can be bonded and connected via a bonding process. The bonding process refers to a process for connecting and fixing the driver chip (IC) to the circuit board. The bonding process ensures a stable connection of the driver chip 120 for normal operation. A flexible circuit board 130 is connected to the bonding area 110, and the flexible circuit board 130 is connected to an external control circuit.
[0059] The electrical connection point 230 can conduct electricity to the pixel circuit and the electrodes of the electronic ink layer 200. The conductive part in the pixel circuit used to conduct electricity to the electrical connection point 230 can be adapted to the position and shape of the electrical connection hole 220.
[0060] Furthermore, in some embodiments, the electrical connection point 230 may be a conductive adhesive dot, such as a silver adhesive dot. The conductive adhesive dot may be formed by dispensing.
[0061] Taking silver paste dots as an example, firstly, silver paste is applied to the electrical connection point 230 using a dispensing device, and then the applied silver paste is spread out under pressure. Therefore, in order to realize the dispensing process, the size of the electrical connection hole 220 can be designed with the dispensing accuracy in mind, such as the width of the dispensing and the width of the spread silver paste.
[0062] In some embodiments, the width of the silver paste after it is spread out is approximately 0.3 to 2 mm, and the first dimension D should be at least greater than or equal to the width of the silver paste after it is spread out at one point. The value of the first dimension D can be in the range of 0.6 to 2 mm.
[0063] The second dimension L is wider. In actual production, N silver paste points can be applied along the second direction Y to the electrical connection hole 220. Depending on the precision of the paste application and the area of the electrical connection hole 220, the value of the second dimension can range from 1.5 to 6 mm.
[0064] However, it should be understood that the specific dimensions of the electrical connection hole 220 are not limited thereto.
[0065] Furthermore, the peripheral extension area 210 extends from the display area AA on the electronic ink layer 200. In some embodiments, the extension length of the peripheral extension area 210 in the second direction Y can be close to or the same as that of the display area AA. However, this would result in material waste.
[0066] In other exemplary embodiments, such as Figure 1As shown, the peripheral extension area 210 includes at least one first lug 211, which extends from the display area AA along the first direction X, and the electrical connection hole 220 is provided on at least one first lug 211. Thus, the extension length of the peripheral extension area 210 along the second direction Y is less than that of the display area AA, and the lug shape of the peripheral extension area 210 reduces material waste.
[0067] like Figure 1 As shown, in some exemplary embodiments, the peripheral extension region 210 includes at least two first lugs 211. The at least two first lugs 211 are spaced apart along the second direction Y, and each first lug 211 has one of the electrical connection holes 220.
[0068] For example, with Figure 1 As shown in the example, the peripheral extension area 210 includes two first lugs 211, which are spaced apart along the second direction Y, and each first lug 211 is provided with an electrical connection hole 220.
[0069] For example, the two first lugs 211 are symmetrically distributed about the first center line of the display area AA, which is the center line of the display area AA extending along the first direction X.
[0070] When the peripheral extension area 210 includes at least two first lugs 211, the pixel circuit may include at least two circuit units, one of which is connected to an electrical connection point 230 on one of the first lugs 211.
[0071] In some other exemplary embodiments, the peripheral extension area 210 may also include only one first lug 211. For example, the first lug 211 may be located at the center or off-center of the display area AA along the second direction Y. The specific location of the first lug 211 is not limited. When the peripheral extension area 210 includes one first lug 211, the pixel circuit may include only one circuit unit, which is correspondingly connected to the electrical connection point 230 on the first lug 211.
[0072] like Figure 1 As shown, in some exemplary embodiments, on the side where the peripheral extension area 210 is located, in the first direction X, the electronic ink layer 200 has a first edge 200a away from the display area AA, and the electrical connection hole 220 has a second edge 220a on the side away from the display area AA.
[0073] In some embodiments, such as Figure 1 As shown, the electrical connection hole 220 is a closed hole, and there is a first distance d1 between the first edge 200a and the second edge 220a along the first direction X.
[0074] It should be noted that the term "closed hole" refers to a hole whose shape is geometrically closed, which usually means that the boundary of the hole forms a complete loop or closed curve.
[0075] Where the manufacturing process allows, the value of the first spacing d1 should be as small as possible to reduce cost waste. For example, considering manufacturing precision, in some embodiments, the value of the first spacing d1 can be in the range of 0.5~3.0mm. However, it is not limited to this.
[0076] In other embodiments, such as Figure 6 As shown, the electrical connection hole 220 is a non-closed hole. It should be noted that a non-closed hole means that the shape of the hole is not geometrically completely closed, and there may be openings or gaps.
[0077] Please see Figure 6 As shown, when the electrical connection hole 220 is a non-closed hole, the first edge 200a and the second edge 220a are flush. It should be noted that, here, the first edge 200a and the second edge 220a being flush means that the first spacing d1 is close to 0 within the allowable process error.
[0078] In addition, such as Figure 1 and Figure 6 As shown, in some exemplary embodiments, on the side where the peripheral extension area 210 is located, the edge shape of the protective film layer 300 matches the edge shape of the electronic ink layer 200, and the edge of the protective film layer 300 extends beyond the edge of the electronic ink layer 200. Thus, the protective film layer 300 can provide better protection for the electronic ink layer 200.
[0079] It should be noted that the edge shape of the protective film layer 300 is adapted to the edge shape of the electronic ink layer 200, specifically, the edge contour of the protective film layer 300 is similar to the edge contour of the electronic ink layer 200.
[0080] For example, such as Figure 1 As shown, the electronic ink layer 200 is provided with the first protruding ear portion 211, and the protective film layer 300 is provided with the second protruding ear portion. The outline shape and position of the second protruding ear portion correspond to those of the first protruding ear portion 211, and the orthographic projections of the second protruding ear portion and the first protruding ear portion 211 on the array substrate 100 overlap.
[0081] In some embodiments, the protective film layer 300 may include a waterproof layer (i.e., a barrier film) and an anti-glare layer (AG / PET film) stacked together. The protective film layer 300 serves to prevent glare and isolate moisture, effectively preventing moisture from entering the array substrate 100.
[0082] like Figure 1 As shown, in some exemplary embodiments, on the side where the peripheral extension area 210 is located, the edge of the protective film layer 300 extends beyond the edge of the electronic ink layer 200, and the edge of the protective film layer 300 and the edge of the electronic ink layer have a second spacing d2 along the first direction X.
[0083] Where the manufacturing process allows, the value of the second spacing d2 should be as small as possible to reduce cost waste. For example, considering manufacturing precision, in some embodiments, the value of the second spacing d2 can be in the range of 0.6~2.0mm. However, it is not limited to this.
[0084] like Figure 1 As shown, in some exemplary embodiments, on the side where the peripheral extension region 210 is located, the edge of the array substrate 100 extends beyond the edge of the protective film layer 300. Exemplarily, on the side where the peripheral extension region 210 is located, the edge of the array substrate 100 extends beyond the edge of the protective film layer 300, and a third distance d3 is formed between the edge of the array substrate 100 and the edge of the protective film layer 300 along the first direction X.
[0085] Where the process allows and performance requirements are met, the value of the third spacing d3 can be as small as possible to reduce cost waste. For example, considering process accuracy and performance requirements, in some embodiments, the value of the third spacing d3 can be ≥0.4mm. However, this is not a limitation.
[0086] In addition, such as Figure 1 and Figure 6 As shown, in some exemplary embodiments, the array substrate 100 includes a bonding area 110 located on one side of the display area AA, the bonding area 110 being connected to a flexible circuit board 130, wherein the peripheral extension area 210 and the bonding area 110 are located on the same side of the display area AA, that is, the electrical connection point 230 is located on the side where the bonding area 110 is located.
[0087] It is understood that the electrical connection point 230 can also be located on either side of the display area AA. For example, the electrical connection point 230 and the driver chip 120 can be located on different sides of the display area AA, respectively. This embodiment is not limited to this.
[0088] In addition, such as Figures 2 to 5 as well as Figures 7 to 10 As shown, in some exemplary embodiments, a protective adhesive layer 400 is applied around the driver chip 120. To extend the service life of the flexible circuit board 130, UV adhesive can be applied to the bends of the flexible circuit board 130 to prevent tearing. Additionally, a protective adhesive can be applied around the driver chip 120 to protect it. The protective adhesive can be a room temperature vulcanized silicone rubber (RTV) adhesive, i.e., PTV adhesive. However, it is not limited to this.
[0089] like Figures 2 to 5 as well as Figures 7 to 10 As shown, in some exemplary embodiments, the electronic ink layer 200 has an edge-sealing adhesive layer 500 around its perimeter, and the edge-sealing adhesive layer 500 is at least partially located between the protective film layer 300 and the array substrate 100, and at least partially located on the peripheral side of the protective film layer 300. The edge-sealing adhesive layer 500 is applied to the perimeter of the electronic ink layer 200, mainly serving to seal and prevent moisture. For example, the material of the edge-sealing adhesive layer 500 may include epoxy resin-based thermosetting adhesive, abbreviated as EC adhesive (Edge Coating).
[0090] Furthermore, this disclosure also provides a display device, which includes the display substrate provided in this disclosure. The display device includes, but is not limited to, devices with display functions such as smartphones, monitors, laptops, tablets, electronic photo frames, dashcams, and smart wearable devices. Other essential components of the display device are understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure. Since the principle by which this display device solves the problem is similar to that of the display substrate described above, the embodiments of the display device provided in this disclosure can be referred to the embodiments of the display substrate provided in this disclosure, and will not be described again here.
[0091] The following points need to be explained:
[0092] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.
[0093] (2) For clarity, the thickness of layers or regions is enlarged or reduced in the drawings used to describe embodiments of the present disclosure, i.e., these drawings are not drawn to scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being “above” or “below” another element, the element may be “directly” located “above” or “below” the other element or there may be intermediate elements.
[0094] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.
[0095] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure shall be determined by the scope of the claims.
Claims
1. A display substrate, characterized in that, include: Array substrate, including pixel circuitry; An electronic ink layer is disposed on the side of the array substrate on which the pixel circuit is disposed. The electronic ink layer has a display area and a peripheral extension area extending from the display area along a first direction. An electrical connection hole is provided in the peripheral extension area, and an electrical connection point is provided at the position of the electrical connection hole. The electrical connection point is used to electrically connect the electrode of the electronic ink layer to the pixel circuit. and A protective film layer is disposed on the side of the electronic ink layer opposite to the array substrate; The electrical connection hole has a first dimension D along the first direction and a second dimension L along the second direction, wherein L / D is greater than 1, and the second direction is perpendicular to the first direction.
2. The display substrate according to claim 1, characterized in that, The first dimension D ranges from 0.6 to 2 mm; the second dimension L ranges from 1.5 to 6 mm.
3. The display substrate according to claim 1, characterized in that, The peripheral extension area includes at least one first lug, which extends from the display area along the first direction, and the electrical connection hole is provided on at least one first lug.
4. The display substrate according to claim 3, characterized in that, The peripheral extension area includes at least two first lugs, which are spaced apart along the second direction, and each first lug has one of the electrical connection holes; or... The peripheral extension area includes only one of the first lugs.
5. The display substrate according to claim 1, characterized in that, On the side where the peripheral extension area is located, in the first direction, the electronic ink layer has a first edge away from the display area, and the electrical connection hole has a second edge on the side away from the display area; wherein, The electrical connection hole is a non-closed hole, and the first edge and the second edge are flush; Alternatively, the electrical connection hole is a closed hole, and there is a first distance between the first edge and the second edge along the first direction.
6. The display substrate according to claim 5, characterized in that, The first spacing ranges from 0.5 to 3.0 mm.
7. The display substrate according to claim 1, characterized in that, On the side where the peripheral extension area is located, the edge shape of the protective film layer is adapted to the edge shape of the electronic ink layer, and the edge of the protective film layer extends beyond the edge of the electronic ink layer.
8. The display substrate according to claim 7, characterized in that, On the side where the peripheral extension area is located, there is a second distance between the edge of the protective film layer and the edge of the electronic ink layer along the first direction, the second distance being 0.6~2.0mm.
9. The display substrate according to claim 1, characterized in that, On the side where the peripheral extension area is located, the edge of the array substrate extends beyond the edge of the protective film layer.
10. The display substrate according to claim 9, characterized in that, On the side where the peripheral extension area is located, the edge of the array substrate extends beyond the edge of the protective film layer, and there is a third distance between the edge of the array substrate and the edge of the protective film layer along the first direction, the third distance being greater than or equal to 0.4 mm.
11. The display substrate according to claim 1, characterized in that, The electrical connection points include silver paste dots.
12. The display substrate according to claim 1, characterized in that, The array substrate includes a bonding area located on one side of the display area, the bonding area being connected to a flexible circuit board, wherein the peripheral extension area and the bonding area are located on the same side of the display area.
13. The display substrate according to claim 12, characterized in that, The array substrate includes a bonding area located on one side of the display area, wherein a driver chip is bonded to the bonding area, and a protective adhesive layer is coated around the driver chip.
14. The display substrate according to claim 1, characterized in that, The electronic ink layer has an edge sealing adhesive layer around its perimeter, and the edge sealing adhesive layer is at least partially located between the protective film layer and the array substrate, and at least partially located on the peripheral side of the protective film layer.
15. A display device, characterized in that, Includes the display substrate as described in any one of claims 1 to 14.