Display device

Abstract

A display device having a first region, a second region, and a bending region between the first region and the second region includes a light emitting element, an inorganic layer disposed on the light emitting element, and a thin film encapsulation layer disposed on the inorganic layer. The inorganic layer includes a first inorganic pattern in the bending region.

Description

[0001] This application is a divisional application of the utility model patent application No. 202323316037.9 with the title of "Display device" and filed on December 6, 2023. TECHNICAL FIELD

[0002] The present disclosure relates to a display device. BACKGROUND

[0003] Recently, as interest in information display has been increasing, research and development of display devices have been continuously conducted. SUMMARY

[0004] An object of the present disclosure is to provide a display device which can reduce reflectivity and at the same time minimize buckling or cracking due to folding.

[0005] The objects of the present disclosure are not limited to the above-mentioned objects, and other technical objects not mentioned can be clearly understood by a person of ordinary skill in the art using the following description.

[0006] According to an embodiment, a display device can have a first area, a second area, and a folding area between the first area and the second area, the display device can include a light emitting element, an inorganic layer disposed on the light emitting element, and a thin film encapsulation layer disposed on the inorganic layer. The inorganic layer can include a first inorganic pattern in the folding area.

[0007] The first inorganic pattern can include an extension and a protrusion protruding from the extension.

[0008] The first inorganic pattern can include an extension and a bent portion bent from the extension.

[0009] The first inorganic pattern can include holes spaced apart from each other.

[0010] The inorganic layer can at least partially cover the light emitting element in the first area.

[0011] The first area and the second area can be spaced apart from each other in a first direction, and the folding area can extend in a second direction intersecting the first direction.

[0012] The first area can include a first edge area extending in the second direction on an edge of the first area, and the inorganic layer can further include a second inorganic pattern in the first edge area.

[0013] The second area can include a second edge area extending in the second direction on an edge of the second area, and the inorganic layer can further include a third inorganic pattern in the second edge area.

[0014] The first inorganic pattern to the third inorganic pattern can have the same pattern in a plan view.

[0015] The thin film encapsulation layer can contact the first inorganic pattern to the third inorganic pattern.

[0016] The inorganic layer can include at least one of bismuth (Bi), ytterbium (Yb), nickel (Ni), cobalt (Co), beryllium (Be), vanadium (V), titanium (Ti), zirconium (Zr), tungsten (W), tantalum (Ta), and molybdenum oxide (MoO3).

[0017] The inorganic layer can have a refractive index greater than or equal to about 1.0.

[0018] The inorganic layer can have an extinction coefficient less than or equal to about 4.0.

[0019] According to an embodiment, a display device can have a first area and a second area spaced apart from each other in a first direction, and a bending area disposed between the first area and the second area and bendable with respect to a bending axis extending in a second direction intersecting the first direction, the display device can include a light emitting element, an inorganic layer disposed on the light emitting element, and a thin film encapsulation layer disposed on the inorganic layer. The inorganic layer can include a first inorganic pattern in the bending area.

[0020] The first area can include a first edge area extending in the second direction on an edge of the first area, and the inorganic layer can further include a second inorganic pattern in the first edge area.

[0021] The second area can include a second edge area extending in the second direction on an edge of the second area, and the inorganic layer can further include a third inorganic pattern in the second edge area.

[0022] The thin film encapsulation layer can contact the first inorganic pattern to the third inorganic pattern.

[0023] The display device can further include a reflection control layer disposed on the inorganic layer.

[0024] The display device can further include a light blocking layer disposed between the inorganic layer and the reflection control layer.

[0025] The reflection control layer can include a pigment or a dye.

[0026] The characteristics of other embodiments are included in the detailed description and the drawings.

[0027] According to the above-described embodiments, the inorganic pattern can be partially formed in the folding area, the first edge area, and / or the second edge area to enhance adhesion between the inorganic layer and the thin film encapsulation layer. Accordingly, even in the case where the display device is repeatedly folded, buckling or cracking in the folding area, the first edge area, and / or the second edge area can be minimized.

[0028] Effects of the embodiments of the disclosure are not limited by the above examples, and various effects are included in the present specification. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 FIG. 1 illustrates a plan view of a folded state of a foldable electronic device according to an embodiment.

[0030] Figure 2 FIG. 2 illustrates a side view of a folded state of a foldable electronic device according to an embodiment. Figure 1

[0031] Figure 3 FIG. 4 illustrates a schematic cross-sectional view of a display panel according to an embodiment.

[0032] Figure 4 FIG. 5 illustrates a plan view of a display panel according to an embodiment.

[0033] Figure 5 FIG. 6 illustrates a schematic cross-sectional view of a display panel according to an embodiment.

[0034] Figure 6 FIG. 7 is a plan view of an inorganic pattern according to an embodiment.

[0035] Figure 7 FIG. 8 is a plan view of an inorganic pattern according to an embodiment.

[0036] Figure 8 FIG. 9 is a plan view of an inorganic pattern according to an embodiment.

[0037] Figure 9 FIG. 10 is a plan view of an inorganic pattern according to an embodiment.

[0038] Figure 10 FIG. 11 is a plan view of an inorganic pattern according to an embodiment.

[0039] Figure 11 FIG. 12 is a plan view of an inorganic pattern according to an embodiment. DETAILED DESCRIPTION

[0040] ​The advantages and features of the present disclosure and methods of accomplishing the same can be understood more readily by reference to the following detailed description of embodiments and the accompanying drawings. The present disclosure may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0041] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and "including," when used in this disclosure, specify the presence of stated elements, steps, operations, and / or apparatus, but do not preclude the presence or addition of one or more other elements, steps, operations, and / or apparatus.

[0042] The term "connected" or "coupled" can broadly mean physical and / or electrically connected or coupled. This can broadly mean directly or indirectly connected or coupled, as well as integrally or non-integrally connected or coupled.

[0043] When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it can be directly on, connected or coupled to, the other element or layer, or intervening elements or layers can be present. In contrast, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. To this end, the term "connected" can refer to physical, electrical, and / or fluidic connections with or without intervening elements. Also, when an element is referred to as being "in contact" with another element, etc., the element can be in "electrical contact" or "physical contact" with the other element; or in "indirect contact" or "direct contact" with the other element. Throughout this specification, like reference numerals refer to like constituent elements.

[0044] Although the terms "first," "second," etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Thus, a first element described below could be termed a second element without departing from the spirit of the present disclosure.

[0045] It is also noted that the terms "substantially," "approximately," and other similar terms, as used herein, are used in an approximate sense and not in a strict sense. Thus, as used herein, these terms are used to account for inherent variation in measurements, calculations, and / or other sources of variation that would be recognized by those of ordinary skill in the art.

[0046] For purposes of the present disclosure, "at least one of A and B" can be interpreted to mean only A, only B, or any combination of A and B. Also, "at least one of X, Y, and Z" or "at least one selected from the group consisting of X, Y, and Z" can be interpreted to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0047] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined in the specification.

[0048] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0049] Figure 1 A plan view illustrating an unfolded state of a foldable electronic device according to an embodiment is illustrated. Figure 2 A side view illustrating a folded state of a foldable electronic device according to an embodiment is illustrated. Figure 1 A side view illustrating a folded state of a foldable electronic device according to an embodiment is illustrated. Figure 1 A side view illustrating a folded state of a foldable electronic device according to an embodiment is illustrated. Figure 2 A plan view illustrating an unfolded state of a foldable electronic device according to an embodiment is illustrated.

[0050] Reference will now be made in detail embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Figure 1 A side view illustrating a folded state of a foldable electronic device according to an embodiment is illustrated. Figure 2 A plan view illustrating an unfolded state of a foldable electronic device according to an embodiment is illustrated. As an embodiment of a foldable electronic device, a display device (in particular, a display panel PNL included in the display device) will be described. The display panel PNL can include a first area A1, a second area A2, and / or a folding area (or a bending area) FA. The first area A1 and the second area A2 can be spaced apart from each other in a first direction (an X-axis direction). The folding area FA can be located between the first area A1 and the second area A2. The folding area FA can be folded (or bent) about a folding axis (or a bending axis) A-fold (or A-bend) extending in a second direction (a Y-axis direction) intersecting the first direction (the X-axis direction).

[0051] The first area A1 and the second area A2 can face each other in a case where the display panel PNL is folded. For example, the first area A1 and the second area A2 can be coupled to the hinge structure H located at the folding axis A to rotate with respect to the hinge structure H. The first area A1 and the second area A2 can have shapes symmetrical to each other, but the present disclosure is not necessarily limited thereto. In a case where the foldable electronic device (e.g., the display panel PNL) is unfolded, the hinge structure H can be covered by the first area A1 and the second area A2 without being exposed. In a case where the display panel PNL is folded, the hinge structure H can be at least partially exposed to the outside after the first area A1 and the second area A2 are rotated.

[0052] The first area A1 can include a first display area DA1 in which an image is displayed and a first non-display area NDA1 in which an image is not displayed. The first non-display area NDA1 can be disposed adjacent to the first display area DA1.

[0053] The second area A2 can include a second display area DA2 in which an image is displayed and a second non-display area NDA2 in which an image is not displayed. The second non-display area NDA2 can be disposed adjacent to the second display area DA2.

[0054] The first display area DA1, the second display area DA2, and / or the folding area FA can be configured on a screen on which an image is displayed, and the first non-display area NDA1 and the second non-display area NDA2 can be areas other than the first display area DA1, the second display area DA2, and / or the folding area FA.

[0055] For better understanding and ease of description, in Figure 1 In an embodiment, at least one driving circuit component (e.g., at least one of a scan driver and a data driver), a wiring, and / or a pad can be disposed in the display panel PNL.

[0056] The pixel unit PXU can be disposed in the first display area DA1, the second display area DA2, and / or the folding area FA. The pixel unit PXU can include a first pixel PXL1, a second pixel PXL2, and / or a third pixel PXL3. Hereinafter, when at least one of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 is referred to arbitrarily, or when two or more pixels thereof are referred to broadly, they will be referred to as "pixel PXL".

[0057] The pixels PXL can be arranged according to a stripe or a PENTILE TM The arrangement structure is regularly arranged. However, the arrangement structure of the pixels PXL is not limited thereto, and the pixels PXL can be arranged in various structures and / or methods in the display area DA.

[0058] In an embodiment, two or more pixels PXL emitting different colors of light can be provided in the first display area DA1, the second display area DA2, and / or the folding area FA. For example, a first pixel PXL1 emitting a first color of light, a second pixel PXL2 emitting a second color of light, and a third pixel PXL3 emitting a third color of light can be arranged in the first display area DA1, the second display area DA2, and / or the folding area FA. At least one of the first to third pixels PXL1, PXL2, and PXL3 provided adjacent to each other can form one pixel unit PXU which can emit various colors of light. For example, the first pixel PXL1 can be a red pixel emitting red light, the second pixel PXL2 can be a green pixel emitting green light, and the third pixel PXL3 can be a blue pixel emitting blue light, but the present disclosure is not limited thereto. Figure 3 The pixel unit PXU is exemplified to include one first pixel PXL1, one second pixel PXL2, and one third pixel PXL3, but the present disclosure is not necessarily limited thereto, and in an embodiment, the pixel unit PXU can include one first pixel PXL1, two second pixels PXL2, and one third pixel PXL3.

[0059] The first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 can respectively include a first light emitting element (LD1) in the first display area DA1, a second light emitting element (LD2) in the second display area DA2, and a third light emitting element (LD3) in the folding area FA as a light source, so that the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 can respectively emit a first color of light, a second color of light, and a third color of light. However, the present disclosure is not limited thereto, and the color of light emitted by each pixel PXL can be variously changed. Figure 3 Figure 3 Figure 3

[0060] Figure 3 An exemplary cross-sectional view of a display panel according to an embodiment is illustrated. Figure 3 An exemplary cross-section of a portion of the display panel PNL in the first display area DA1 or the second display area DA2 is illustrated. Figure 4 An exemplary plan view of an inorganic pattern according to an embodiment is illustrated. Figure 5 An exemplary cross-sectional view of a display panel according to an embodiment is illustrated. Figure 5 An exemplary cross-sectional view of a portion of the display panel PNL in the folding area FA, the first edge area EA1, or the second edge area EA2 is illustrated. Figure 6 to Figure 11 An exemplary plan view of an inorganic pattern according to an embodiment is illustrated.

[0061] Reference Figure 3 ​​​The first to third pixels PXL1, PXL2, and PXL3 can each include a light emitting region EMA, and a non-light emitting region NEMA can be located between the light emitting regions EMA of the first to third pixels PXL1, PXL2, and PXL3.

[0062] The first to third pixels PXL1, PXL2, and PXL3 can each include a pixel circuit layer PCL, a display element layer DPL, and a thin film encapsulation layer TFE, which are sequentially provided on the substrate SUB.

[0063] The substrate SUB can form a base surface. The substrate SUB can include a transparent insulating material to transmit light. The substrate SUB can be a rigid substrate or a flexible substrate. For example, the rigid substrate can be one of a glass substrate, a quartz substrate, a glass-ceramic substrate, and a crystalline glass substrate. The flexible substrate can be one of a film substrate including a polymer organic material and a plastic substrate. For example, the flexible substrate can include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyaromatic ester, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate, but the present disclosure is not necessarily limited thereto.

[0064] The pixel circuit layer PCL can include a pixel circuit provided on the substrate SUB. The pixel circuit layer PCL can include a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer (e.g., a protective layer) PSV, and a via layer VIA, which are sequentially stacked on the substrate SUB in the third direction (Z-axis direction).

[0065] The buffer layer BFL can be an inorganic insulating film including an inorganic material. The buffer layer BFL can include at least one of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and a metal oxide such as aluminum oxide (AlO x ). The buffer layer BFL can be provided as a single layer, or at least a double layer or more layers of a multi-layer. In the case where the buffer layer BFL is provided as a multi-layer, each layer of the multi-layer can be made of the same material or different materials. Depending on the material of the substrate SUB, process conditions, etc., the buffer layer BFL can be omitted.

[0066] The transistor T can be disposed on the buffer layer BFL. The transistor T can include an active pattern ACT, a gate electrode GE, a first transistor electrode TE1, and a second transistor electrode TE2.

[0067] An active pattern ACT can be provided on the buffer layer BFL. The active pattern ACT can include a polysilicon semiconductor. For example, the active pattern ACT can be formed by a low-temperature polysilicon process. However, the present disclosure is not necessarily limited thereto, and the active pattern ACT can be formed of an oxide semiconductor, a metal oxide semiconductor, or the like.

[0068] Each active pattern ACT can include a channel region, a first contact region connected to one end of the channel region, and a second contact region connected to the other end of the channel region. The channel region, the first contact region, and the second contact region can be formed of a semiconductor layer that is not doped with impurities or is doped with impurities. For example, the first contact region and the second contact region can be formed of a semiconductor layer doped with impurities, and the channel region can be formed of a semiconductor layer that is not doped with impurities. For example, a p-type impurity can be used as the impurity, but the present disclosure is not limited thereto. One of the first contact region and the second contact region can be a source region, and the other of the first contact region and the second contact region can be a drain region.

[0069] A gate insulating layer GI can be provided on the active pattern ACT. The gate insulating layer GI can be an inorganic film (or an inorganic insulating film) including an inorganic material. For example, the gate insulating layer GI can include at least one of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and a metal oxide such as aluminum oxide (AlO x ). However, the material of the gate insulating layer GI is not limited thereto. In an embodiment, the gate insulating layer GI can be formed as an organic film (or an organic insulating film) including an organic material. The gate insulating layer GI can be provided as a single layer or a plurality of at least two or more layers.

[0070] A gate electrode GE can be provided on the gate insulating layer GI. The gate electrode GE can overlap the channel region of the active pattern ACT in a plan view. The gate electrode GE can be formed to have a single-layer structure including a material selected from the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), aluminum neodymium (AlNd), titanium (Ti), aluminum (Al), silver (Ag), and an alloy thereof, or to have a double-layer structure or a multi-layer structure including a low-resistance material such as molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag) in order to reduce line resistance.

[0071] An interlayer insulating layer ILD can be provided on the gate electrode GE. The interlayer insulating layer ILD and the gate insulating layer GI can include the same material, or the interlayer insulating layer ILD can include one or more materials selected from the materials that can be included in the gate insulating layer GI.

[0072] The first transistor electrode TE1 and the second transistor electrode TE2 can be provided on the interlayer insulating layer ILD.

[0073] The first transistor electrode TE1 of the transistor T can contact a first contact region of one end of the active pattern ACT through a contact hole that penetrates the interlayer insulating layer ILD and the gate insulating layer GI. In a case where the first contact region is a source region, the first transistor electrode TE1 can be a first source electrode.

[0074] The second transistor electrode TE2 of the transistor T can contact a second contact region of the other end of the active pattern ACT through a contact hole that penetrates the interlayer insulating layer ILD and the gate insulating layer GI. In a case where the second contact region is a drain region, the second transistor electrode TE2 can be a second drain electrode.

[0075] Each of the first transistor electrode TE1 and the second transistor electrode TE2 and the gate electrode GE can contain the same material, or each of the first transistor electrode TE1 and the second transistor electrode TE2 can contain one or more materials selected from among materials that can be contained in the gate electrode GE.

[0076] The passivation layer PSV can be provided on the first transistor electrode TE1 and the second transistor electrode TE2. The passivation layer PSV can be an inorganic film (or an inorganic insulating film) containing an inorganic material or an organic film (or an organic insulating film) containing an organic material. The inorganic film can contain, for example, at least one of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and a metal oxide such as aluminum oxide (AlO x ). The organic film can contain, for example, at least one of polyacrylate resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0077] In an embodiment, the passivation layer PSV and the interlayer insulating layer ILD can contain the same material, but the present disclosure is not limited thereto. The passivation layer PSV can be provided as a single layer or a plurality of at least two or more layers.

[0078] The via layer VIA can be provided on the passivation layer PSV. The via layer VIA and the passivation layer PSV can contain the same material, or the via layer VIA can contain at least one selected from among materials that can be contained in the passivation layer PSV. In an embodiment, the via layer VIA can be an organic film made of an organic material.

[0079] A display element layer DPL can be disposed on the pixel circuit layer PCL. The display element layer DPL can include light emitting elements LD that emit light. The first to third pixels PXL1, PXL2, and PXL3 can include first to third light emitting elements LD1, LD2, and LD3, respectively.

[0080] The first light emitting element LD1 can include an anode electrode AE, a first light emitting layer EML1, and a cathode electrode CE. The second light emitting element LD2 can include an anode electrode AE, a second light emitting layer EML2, and a cathode electrode CE. The third light emitting element LD3 can include an anode electrode AE, a third light emitting layer EML3, and a cathode electrode CE. For example, the first to third light emitting elements LD1, LD2, and LD3 can be top emission type organic light emitting elements.

[0081] The anode electrode AE of each pixel PXL can be disposed in the light emitting area EMA and can be spaced apart from each other. The anode electrode AE of each pixel PXL can be electrically connected to the first transistor electrode TE1 of the transistor T of each pixel PXL through a contact hole that penetrates the via layer VIA and the passivation layer PSV.

[0082] The dam PDL can be disposed on the anode electrode AE and the via layer VIA. The dam PDL can define (or separate) the light emitting area EMA of each pixel PXL. The dam PDL can include an opening that partially exposes the anode electrode AE of each pixel PXL, and the opening can correspond to the light emitting area EMA of each pixel PXL.

[0083] The dam PDL can be an organic insulating layer made of an organic material. The organic material can include an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, a polyimide resin, or the like.

[0084] In an embodiment, the dam PDL can contain a light absorbing material, or can be used to absorb light introduced from the outside by a light absorber applied on the dam PDL. For example, the dam PDL can contain a carbon-based black pigment. However, the present disclosure is not necessarily limited thereto, and the dam PDL can contain an opaque metal material having a high light absorption rate, such as chromium (Cr), molybdenum (Mo), an alloy of molybdenum (Mo) and titanium (Ti) (MoTi), tungsten (W), vanadium (V), niobium (Nb), tantalum (Ta), manganese (Mn), cobalt (Co), or nickel (Ni).

[0085] The light emitting layer EML of each pixel PXL can be disposed on the anode electrode AE exposed by the dam PDL. The cathode electrode CE can be disposed on the light emitting layer EML. The cathode electrode CE can be provided as a common electrode throughout the first to third pixels PXL1, PXL2, and PXL3, but the present disclosure is not necessarily limited thereto.

[0086] The cathode CE can be formed of a metal layer comprising at least one of Ag (silver), Mg (magnesium), Al (aluminum), Pt (platinum), Pd (palladium), Au (gold), Ni (nickel), Nd (neodymium), Ir (iridium), Cr (chromium), and their alloys, and / or a transparent conductive layer comprising at least one of ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), and ITZO (indium tin zinc oxide). In embodiments, the cathode CE can be formed of multiple layers comprising two or more thin metal layers, for example, a three-layer structure of ITO / Ag / ITO.

[0087] An inorganic layer (INL) can be disposed on the cathode (CE). The inorganic layer (INL) can reduce reflectivity and increase transmittance to achieve a high-efficiency display panel (PNL). The inorganic layer (INL) can contain at least one of bismuth (Bi), ytterbium (Yb), nickel (Ni), cobalt (Co), beryllium (Be), vanadium (V), titanium (Ti), zirconium (Zr), tungsten (W), tantalum (Ta), and molybdenum oxide (MoO3). For example, the inorganic layer (INL) can be formed by depositing at least one of bismuth (Bi), ytterbium (Yb), nickel (Ni), cobalt (Co), beryllium (Be), vanadium (V), titanium (Ti), zirconium (Zr), tungsten (W), tantalum (Ta), and molybdenum oxide (MoO3) on the display element layer (DPL) (or cathode (CE)). The refractive index of the inorganic layer (INL) can be greater than or equal to about 1.0. For example, the refractive index of the inorganic layer (INL) can be in the range of about 1.0 to about 3.0. The extinction coefficient of the inorganic layer (INL) can be less than or equal to about 4.0. For example, the extinction coefficient of the inorganic layer INL can be in the range of about 0.5 to about 4.0. As described above, by providing an inorganic layer INL with a low extinction coefficient, a high-efficiency display panel PNL can be achieved by reducing reflectivity and improving transmittance through interference between the reflected light induced by the electrode layer and the inorganic layer INL. The thickness of the inorganic layer INL in the third direction (Z-axis direction) can be approximately to approximately The scope is limited to this, but this disclosure is not necessarily limited thereto.

[0088] like Figure 3 As shown, the inorganic layer INL can at least partially cover the first display area DA1 or the second display area DA2. For example, the inorganic layer INL can cover the first display area DA1 except for the first edge area ( Figure 4 The portion other than EA1 in the second display area DA2, excluding the second edge area ( Figure 4 The part other than EA2 in the text. Figure 5 As shown, the inorganic layer INL can at least partially cover the light-emitting element LD in the first region A1.

[0089] The inorganic layer INL can include an inorganic pattern PT. For example, such as Figure 4As shown in FIG. 1, in a plan view, the inorganic pattern PT can include a first inorganic pattern PT1 overlapping the folding area FA, a second inorganic pattern PT2 overlapping the first display area DA1, and / or a third inorganic pattern PT3 overlapping the second display area DA2.

[0090] The first inorganic pattern PT1 can be disposed within the folding area FA in the second direction (Y-axis direction).

[0091] The second inorganic pattern PT2 can overlap a first edge area EA1 of the first display area DA1 in a plan view. The first edge area EA1 can be an area extending in the second direction (Y-axis direction) on an edge of the first display area DA1 in the first direction (X-axis direction). The second inorganic pattern PT2 can be disposed within the first edge area EA1 in the second direction (Y-axis direction).

[0092] The third inorganic pattern PT3 can overlap a second edge area EA2 of the second display area DA2 in a plan view. The second edge area EA2 can be an area extending in the second direction (Y-axis direction) on an edge of the second display area DA2 in the first direction (X-axis direction). The third inorganic pattern PT3 can be disposed within the second edge area EA2 in the second direction (Y-axis direction).

[0093] The thin film encapsulation layer TFE disposed on the inorganic layer INL (or the inorganic pattern PT) can contact the first inorganic pattern to the third inorganic pattern PT1, PT2, and PT3. In an embodiment, the inorganic pattern PT can expose an upper surface of the light emitting element LD (or the cathode electrode CE) disposed thereunder. The thin film encapsulation layer TFE can contact the upper surface of the light emitting element LD (or the cathode electrode CE) exposed by each inorganic pattern PT.

[0094] The first inorganic pattern to the third inorganic pattern PT1, PT2, and PT3 can be formed in the same pattern. In an embodiment, the first inorganic pattern to the third inorganic pattern PT1, PT2, and PT3 can have different patterns.

[0095] Reference Figure 6 The inorganic pattern PT can include an extension portion EP and first and second protrusion portions PP1 and PP2 protruding from the extension portion EP. The extension portion EP can extend in the second direction (Y-axis direction). The first protrusion portion PP1 can protrude from the extension portion EP in the first direction (X-axis direction). The second protrusion portion PP2 can protrude from the extension portion EP in a direction opposite to the first direction (X-axis direction). In this embodiment, a width W (e.g., a distance from an end of the first protrusion portion PP1 to an end of the second protrusion portion PP2) of the inorganic pattern PT in the first direction (X-axis direction) can be in a range of about 10 μm to about 15 μm, but the present disclosure is not necessarily limited thereto.

[0096] Figure 6 This example illustrates a case where the first protrusion PP1 and the second protrusion PP2 protrude from the same position of the extension EP in opposite directions; however, this disclosure is not limited to this. For example, as... Figure 7 and Figure 8 As shown, the first protrusion PP1 and the second protrusion PP2 can be arranged alternately in the second direction (Y-axis direction) and can protrude in the first direction (X-axis direction). In the plan view, each of the first protrusion PP1 and the second protrusion PP2 can be formed in various shapes, such as a triangular shape (see...). Figure 7 ), trapezoidal shape (see Figure 8 ) and circular shape.

[0097] refer to Figure 9 The inorganic pattern PT may include multiple extensions EP1, EP2, and EP3. The first to third extensions EP1, EP2, and EP3 may each extend in a second direction (Y-axis direction) and may be spaced apart from each other in a first direction (X-axis direction). A second extension EP2 may be disposed between the first extension EP1 and the third extension EP3. A first protrusion PP1 and a second protrusion PP2 may protrude from the second extension EP2 in the first direction (X-axis direction) and intersect with either the first extension EP1 or the third extension EP3. For example, the first protrusion PP1 may protrude from the second extension EP2 in the first direction (X-axis direction) and intersect with the third extension EP3. The second protrusion PP2 may protrude from the second extension EP2 in the opposite direction to the first direction (X-axis direction) and intersect with the first extension EP1.

[0098] refer to Figure 10 The inorganic pattern PT may include an extension EP and bent portions BP1 and BP2 that bend from the extension EP. The extension EP may extend in a second direction (Y-axis direction). The first bent portion BP1 may bend from the extension EP in a first direction (X-axis direction). The second bent portion BP2 may bend from the extension EP in a direction opposite to the first direction (X-axis direction).

[0099] refer to Figure 11 The inorganic pattern PT may each include holes HL spaced apart from each other, for example, holes HL spaced apart from each other in a second direction (Y-axis direction). The inorganic pattern PT may be spaced apart from each other in the second direction (Y-axis direction), and at least one hole HL is between the inorganic pattern PT.

[0100] In the above-described embodiments, in the case where the inorganic pattern PT is partially formed in the folding area FA, the first edge area EA1, and / or the second edge area EA2, the contact area between the inorganic layer INL and the thin film encapsulation layer TFE can be increased to enhance the adhesion strength. For example, in the case where the inorganic layer INL is continuously formed in the folding area FA, the first edge area EA1, and / or the second edge area EA2, the average peeling force can be in the range of about 0.06 gram force / inch (gf / inch) to about 0.45 gf / inch, and in the case where the inorganic layer INL includes the inorganic pattern PT formed in the folding area FA, the first edge area EA1, and / or the second edge area EA2, the average peeling force can be in the range of about 0.23 gf / inch to about 0.86 gf / inch. It can be confirmed that the adhesion force can be improved by partially forming the inorganic pattern PT in the folding area FA, the first edge area EA1, and / or the second edge area EA2. Accordingly, even in the case where the folding area FA is repeatedly folded, the occurrence of buckling or cracking in the folding area FA, the first edge area EA1, and / or the second edge area EA2 can be minimized.

[0101] Reference Figure 5 The thin film encapsulation layer TFE can be disposed on the display element layer DPL. The thin film encapsulation layer TFE can have a single layer structure or a multi-layer structure. The thin film encapsulation layer TFE can include a plurality of insulating layers covering the light emitting element LD. The thin film encapsulation layer TFE can include at least one inorganic film and at least one organic film. For example, the thin film encapsulation layer TFE can have a structure in which the inorganic film and the organic film are alternately stacked with each other. In an embodiment, the thin film encapsulation layer TFE can be an encapsulation substrate which is a layer disposed on the light emitting element LD and bonded to the substrate SUB by a sealing agent.

[0102] The sensing layer TS can be disposed on the thin film encapsulation layer TFE. The sensing layer TS can include a first insulating layer INS1, a first sensing conductive layer MT1, a second insulating layer INS2, a second sensing conductive layer MT2, and / or a third insulating layer INS3.

[0103] The first insulating layer INS1 can include an inorganic insulating film including an inorganic material or an organic insulating film including an organic material. The inorganic insulating film can include an inorganic insulating material such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al x O y ), titanium oxide (TiO x ), tantalum oxide (Ta x O y ), hafnium oxide (HfO x ), or zinc oxide (ZnOx ), but the present disclosure is not necessarily limited thereto. The organic insulating film can include at least one of an acrylic resin, a methacrylic resin, a polyisoprene, a vinyl-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a silicone-based resin, a polyimide-based resin, a polyamide-based resin, and a perylene-based resin, but the present disclosure is not necessarily limited thereto. In an embodiment, the first insulating layer INS1 can be omitted, or can be configured as an uppermost layer of the thin film encapsulation layer TFE.

[0104] The first sensing conductive layer MT1 can be disposed on the first insulating layer INS1 or the thin film encapsulation layer TFE. The first sensing conductive layer MT1 can be partially open in a plan view and not overlap the light emitting element LD of each pixel PXL. For example, the first sensing conductive layer MT1 can be disposed in the non-light emitting area NEMA adjacent to the light emitting area EMA.

[0105] The first sensing conductive layer MT1 can include a metal layer or a transparent conductive layer. For example, the metal layer can include molybdenum, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer can include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), poly(3,4-ethylenedioxythiophene) (PEDOT), and a metal nanowire, but the present disclosure is not necessarily limited thereto. The first sensing conductive layer MT1 can form a connection electrode that connects sensing electrodes.

[0106] The second insulating layer INS2 can be disposed on the first sensing conductive layer MT1. The second insulating layer INS2 and the first insulating layer INS1 can include the same material, or the second insulating layer INS2 can include one or more materials selected from among the materials that can be included in the first insulating layer INS1.

[0107] The second sensing conductive layer MT2 can be disposed on the second insulating layer INS2. The second sensing conductive layer MT2 can be partially open in a plan view and not overlap the light emitting element LD of each pixel PXL. For example, the second sensing conductive layer MT2 can be disposed in the non-light emitting area NEMA adjacent to the light emitting area EMA.

[0108] The second sensing conductive layer MT2 and the first sensing conductive layer MT1 can include the same material, or the second sensing conductive layer MT2 can include one or more materials selected from among the materials that can be included in the first sensing conductive layer MT1.

[0109] The second sensing conductive layer MT2 can be electrically connected to the first sensing conductive layer MT1 through a contact hole that penetrates the second insulating layer INS2. The second sensing conductive layer MT2 can form a sensing electrode.

[0110] A third insulating layer INS3 can be disposed on the second sensing conductive layer MT2. The third insulating layer INS3 can include an organic film, but the present disclosure is not necessarily limited thereto. In an embodiment, the third insulating layer INS3 can be formed of an inorganic film, or can have a structure in which an organic film and an inorganic film are alternately stacked with each other.

[0111] A light blocking layer LBP can be disposed on the display element layer DPL, the thin film encapsulation layer TFE, and / or the sensing layer TS. The light blocking layer LBP can include an opening overlapping the light emitting element LD in a plan view. For example, the light blocking layer LBP can be disposed to overlap the non-light emitting area NEMA around the light emitting area EMA.

[0112] The light blocking layer LBP can include a light blocking material to prevent light leakage and color mixing defects. For example, the light blocking layer LBP can include a black matrix, but the present disclosure is not necessarily limited thereto. In an embodiment, the light blocking layer LBP can include carbon black (CB) and / or titanium black (TiBK).

[0113] A reflection control layer RF can be disposed on the light blocking layer LBP. The reflection control layer RF can selectively absorb light reflected from the inside of the display panel PNL according to a wavelength of the light reflected from the inside of the display panel PNL, thereby improving visibility while preventing a decrease in light efficiency of the display panel PNL. The reflection control layer RF can improve display quality by minimizing reflection of external light.

[0114] The reflection control layer RF can include a dye, a pigment, or a combination thereof. For example, the reflection control layer RF can include an oxazine compound, a cyanine compound, a tetraazaporphyrin compound, or a squarylium compound, but the present disclosure is not necessarily limited thereto.

[0115] A maximum absorption wavelength of the reflection control layer RF can be in a first wavelength range of about 490 nm to about 505 nm or in a second wavelength range of about 585 nm to about 600 nm. For example, the reflection control layer RF can absorb light having a wavelength outside a red light, a green light, or a blue light emission wavelength range, thereby implementing a display panel PNL having excellent light efficiency.

[0116] Since the reflection control layer RF is provided on the display panel PNL, a separate polarizing plate and / or a color filter can be omitted. Accordingly, light loss of the display panel PNL can be minimized while maintaining external light reflection performance. In a case in which a separate color filter is provided, a reflection color band phenomenon can generally occur, and to compensate for this, an organic layer for planarization can need to be additionally applied, thereby resulting in a thick display panel and an adverse characteristic in processing. The display panel PNL according to an embodiment can be provided with the reflection control layer RF to reduce the number of masks and implement a high-quality display device having a thin thickness.

[0117] A window WD can be provided on the reflection control layer RF. The window WD can protect the member thereunder from external impact and provide a user with an input surface and / or a display surface.

[0118] The above description is an example of technical features of the present disclosure, and those skilled in the art to which the present disclosure pertains will be able to make various modifications and changes. Therefore, the above-described embodiments of the present disclosure can be implemented alone or in combination with each other.

[0119] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The scope of protection of the present disclosure should be interpreted by the appended claims, and all technical spirits within the equivalent scope should be interpreted to be within the scope of the present disclosure.

Claims

1. A display device having a first area, a second area, and a bending area between the first area and the second area, characterized by, The display device includes: a light-emitting element; an inorganic layer provided over the light-emitting element; and a thin film encapsulation layer provided over the inorganic layer, wherein the inorganic layer includes a first inorganic pattern in the bending region, the first region and the second region are spaced apart from each other in a first direction, the bending region extends in a second direction intersecting the first direction, the first region includes a first edge region extending in the second direction on an edge of the first region, and the second region includes a second edge region extending in the second direction on an edge of the second region.

2. The display device according to claim 1, wherein The inorganic layer further includes a second inorganic pattern in the first edge region and a third inorganic pattern in the second edge region.

3. The display device according to claim 2, wherein The first inorganic pattern to the third inorganic pattern have the same pattern in a plan view.

4. The display device according to claim 2, wherein The thin film encapsulation layer contacts the first inorganic pattern to the third inorganic pattern.

5. A display device, characterized by comprising: The display device includes: a first region and a second region spaced apart from each other in a first direction; a bending region provided between the first region and the second region and bendable with respect to a bending axis extending in a second direction intersecting the first direction; a light-emitting element; an inorganic layer provided over the light-emitting element; and a thin film encapsulation layer provided over the inorganic layer, wherein the inorganic layer includes a first inorganic pattern in the bending region.

6. The display device according to claim 5, wherein: the first region includes a first edge region extending in the second direction on an edge of the first region, and the inorganic layer further includes a second inorganic pattern in the first edge region.

7. The display device according to claim 5, wherein: the second region includes a second edge region extending in the second direction on an edge of the second region, and the inorganic layer further includes a third inorganic pattern in the second edge region.

8. The display device according to claim 5, wherein The thin film encapsulation layer contacts the first inorganic pattern.

9. The display device according to claim 5, wherein The display device further includes: a reflection control layer provided over the inorganic layer.

10. The display device according to claim 9, wherein The display device further includes: a light-blocking layer provided between the inorganic layer and the reflection control layer.

11. The display device according to claim 9, wherein The reflection control layer contains a pigment or a dye.

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