High-density packaging structure based on interconnection bridge and adapter plate
The packaging structure of interconnect bridges and adapter boards solves the problems of complexity and high cost of embedding interconnect bridges in substrates in multi-chip packaging, achieving high-density interconnection and miniaturization, and improving signal transmission efficiency and product iteration convenience.
Patent Information
- Application Number
- CN202520141142.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-21
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2035-01-21
AI Technical Summary
Existing technologies for multi-chip packaging suffer from complex substrate-embedded interconnect bridge processes, high manufacturing difficulty, high cost, and difficulty in achieving high-density interconnects and miniaturization.
The high-density packaging structure of interconnect bridges and adapter boards is adopted. The vertical interconnection between the chip and the adapter board is achieved through micro solder joints and solder balls, and the horizontal high-density interconnection is achieved by using interconnect bridges. Combined with adhesive layer fixation, the manufacturing difficulty is reduced and the integration is improved.
It achieves high-density interconnection between chips, reduces manufacturing difficulty and cost, reduces package size, provides a stable and efficient signal transmission path, and improves the ease of product iteration.
Smart Images
Figure CN223912862U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the field of semiconductor manufacturing and chip packaging technology, especially to a high-density packaging structure based on interconnection bridge and adapter plate. BACKGROUND
[0002] For chip packaging, the most basic packaging process is wire-bonding packaging, which is very simple as a whole, that is, the chip is fixed to the substrate with the front face upward, then the pins of the chip are connected (bonded) with the substrate by wires, and finally the whole chip is sealed, and the sealing material is plastic, ceramic, etc. The advantages of this packaging technology are relatively simple production process and low cost, and the disadvantages are that the size of the packaged chip is much larger than that of the original chip, and the number of chip pins is limited. With the progress of technology, "flip-chip" technology has emerged, that is, the chip is bonded with the pre-prepared soldering point with the front face downward. The application of flip-chip makes the final packaging size close to the original chip and has more pins.
[0003] The above packaging is the packaging of a single chip. When multiple chips need to be packaged together, the packaging method is currently 2D, 2.5D, and 3D packaging. For 2D packaging, the interconnection between chips relies on the wiring in the substrate. The disadvantage of this method is that the wiring density on the substrate is low, so the interconnection between chips is limited. Therefore, the improved 2.5D packaging adds a layer of silicon interposer between the chip and the substrate. The chips are not directly connected to each other, but are connected to the silicon interposer, which acts as a chip-chip interconnection and a chip-substrate interconnection. Since the wiring of the silicon interposer can be directly manufactured using semiconductor technology, the wiring density can be greatly improved. The disadvantage of this packaging technology is that the silicon interposer is also manufactured using semiconductor technology, so its cost is difficult to reduce, and its area is severely limited by semiconductor technology. In order to reduce the cost of the silicon interposer, Intel uses EMIB technology to realize the interconnection between chips using a silicon bridge, and the silicon bridge is embedded in the substrate. The connection between the chip and the substrate is realized by a traditional method.
[0004] The above-mentioned substrate embedded silicon bridge technology and the substrate large-area opening technology increase the chip interconnection density, but also increase the difficulty of substrate manufacturing and the cost. UTILITY MODEL CONTENTS
[0005] The utility model aims at the deficiencies in the above background technology, and provides a scheme for realizing horizontal high-density interconnection between chips through a prefabricated interconnection bridge and realizing vertical interconnection with the substrate through an adapter plate.
[0006] In order to achieve the above object, the utility model provides a kind of high-density packaging structure based on interconnection bridge and adapter plate, at least including substrate, first chip, second chip, interconnection bridge and adapter plate, multiple micro-welding points are provided on the first chip, the second chip, the first chip, the second chip is respectively bonded by part of the micro-welding point and corresponding adapter plate welding, to form longitudinal interconnection with the adapter plate, the adapter plate is formed longitudinal interconnection with the substrate by solder ball, the first chip, the second chip is connected with the interconnection bridge by part of the micro-welding point, to form transverse high-density interconnection by the interconnection bridge, the interconnection bridge is integrated with transverse interconnection high-density fine pitch line, line width / line distance is less than the line width / line distance of the substrate.
[0007] Further, the size, spacing of the micro-welding points on the first chip and the second chip are matched with the interconnection bridge, and matched with the upper surface of the adapter plate.
[0008] Further, the material of the interconnection bridge is silicon, glass or organic material.
[0009] Further, the interconnection bridge is connected with the substrate through an adhesive layer.
[0010] Further, the material of the adhesive layer is glue or solder paste.
[0011] Further, the adapter plate is one-to-one corresponding with the first chip and the second chip.
[0012] The above scheme of the utility model has the following beneficial effects:
[0013] The high-density packaging structure provided by the utility model solves the problems of complex process and great manufacturing difficulty of substrate embedded interconnection bridge during high-density interconnection between chips, and the manufacturing process of interconnection bridge and adapter plate is relatively mature, which reduces the implementation difficulty, allows flexible combination of multiple chips, realizes high-density interconnection between chips, achieves higher integration of the entire packaging, helps to reduce the overall volume, provides relatively stable and efficient transmission path in signal transmission, and improves the convenience of product iteration.
[0014] Other beneficial effects of the utility model will be described in detail in the subsequent specific implementation mode part. BRIEF DESCRIPTION OF DRAWINGS
[0015] Figure 1 It is the overall structure front view of the utility model;
[0016] Figure 2 It is the overall structure plan view of the utility model;
[0017] Figure 3 The process step flow chart of the utility model.
[0018] [Legend of the drawing]
[0019] 1 - substrate;2 - first chip;3 - second chip;4 - interconnection bridge;5 - adapter plate;6 - micro solder joint;7 - solder ball;8 - adhesive layer;9 - filling glue. DETAILED DESCRIPTION
[0020] In order to make the technical problems, technical schemes and advantages to be solved by the utility model more clear, the following will be described in detail in combination with the drawings and specific embodiments. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the utility model. In addition, the technical features involved in different implementation manners of the utility model described below can be combined with each other as long as they do not conflict with each other.
[0021] In the description of the utility model, it needs to be explained that the orientation or position relationship indicated by the terms 'center', 'upper', 'lower', 'left', 'right','vertical', 'horizontal', 'inner', 'outer' and the like is the orientation or position relationship based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the utility model and simplifying the description, and is not indicative or suggestive of the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the utility model. In addition, the terms 'first','second', 'third' are only for the purpose of description, and cannot be understood as indicative or suggestive of relative importance.
[0022] In the description of the utility model, it needs to be explained that, unless otherwise explicitly specified and limited, the terms'mounting', 'connection', 'connection' should be understood broadly, for example, it can be locking connection, or detachable connection, or integrally connected;It can be mechanical connection, or electrical connection;It can be directly connected, or indirectly connected through an intermediate medium, or the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.
[0023] As Figure 1 , Figure 2The embodiment of the utility model provides a kind of high-density packaging structure based on interconnection bridge and adapter plate, including substrate 1, first chip 2, second chip 3, interconnection bridge 4 and adapter plate 5. Among them, first chip 2, second chip 3 are all provided with multiple micro weld points 6, and first chip 2, second chip 3 are respectively welded and bonded with corresponding adapter plate 5 by part micro weld point 6, to form longitudinal interconnection with adapter plate 5, and adapter plate 5 is again interconnected with substrate 1 by solder ball 7 to form longitudinal interconnection, to carry out interval conversion between the micro weld point 6 of chip and the sparse weld point of substrate 1. Meanwhile, first chip 2, second chip 3 are all connected with interconnection bridge 4 by part micro weld point 6, to form transverse high-density interconnection by interconnection bridge 4. Among them, multiple bonding points are densely arranged on interconnection bridge 4, and the size and spacing of bonding points are more dense compared with substrate 1, and interconnection bridge 4 is integrated with transverse interconnection high-density fine pitch line, and line width / line spacing is usually smaller than the line width / line spacing of substrate 1 (commonly 10 / 10 μm).
[0024] Therefore, by the setting of interconnection bridge 4, first chip 2 and second chip 3 can be transversely and high-density interconnected, so that the entire package can achieve higher integration, which helps to reduce the overall volume and provide a relatively stable and efficient transmission path in signal transmission. Correspondingly, micro weld points 6 are arranged on first chip 2 and second chip 3, and the size and spacing thereof are matched with interconnection bridge 4 to enable direct welding and bonding with interconnection bridge 4. By the setting of adapter plate 5, first chip 2 and second chip 3 with micro weld points 6 can be interconnected with conventional substrate 1, so that substrate 1 does not need to embed a silicon bridge or a large-area high-density opening, without significantly increasing the cost.
[0025] It should be noted that the material of interconnection bridge 4 in the embodiment can be silicon, glass or organic material (such as polyimide, ABF, etc.), and interconnection bridge 4 (bottom surface) is connected with substrate 1 through adhesive layer 8, and the material of adhesive layer 8 can be glue, solder paste, etc. By the setting of adhesive layer 8, on the one hand, interconnection bridge 4 is fixed and connected, so that interconnection bridge 4 is firmly packaged on substrate 1. Meanwhile, based on the material of adhesive layer 8, internal stress caused by packaging deformation can be effectively buffered, further improving the quality of multi-chip packaging. Since the size of interconnection bridge 4 is significantly smaller than that of the conventional 2.5D silicon adapter layer, the cost can be significantly reduced when it is manufactured by semiconductor process, and it can be prefabricated without embedding in substrate 1.
[0026] It should be noted that the adapter plate 5 in the embodiment can adopt the adapter plate 5 in the prior art, for example, a silicon adapter plate 5, and can also be glass or organic material. The chip is bonded to the upper surface of the adapter plate 5 through the micro-welding point 6, and the lower surface of the adapter plate 5 is bonded to the substrate 1. At present, the manufacturing area of the silicon adapter plate 5 is limited by the photoetching mask, and the size cannot exceed 33mm*26mm. By using the packaging structure provided in the embodiment, the size of the silicon adapter plate 5 can be relatively small, and a high-density packaging structure can still be obtained.
[0027] It should be noted that the "high-density interconnection" and "low-density interconnection" mentioned in the embodiment are relative concepts, which refer to the information transmission demand of the high-density part being greater than that of the low-density interconnection.
[0028] As described above, the high-density packaging structure based on the interconnection bridge and the adapter plate provided in the embodiment solves the problems of complex process and great manufacturing difficulty of embedding the interconnection bridge 4 into the substrate 1 when the chips are high-density interconnected, the manufacturing process of the interconnection bridge 4 and the adapter plate 5 is relatively mature, the implementation difficulty is reduced, and multiple chips can be flexibly combined, thereby realizing high-density interconnection between the chips, achieving higher integration of the entire packaging, helping to reduce the overall volume, providing a relatively stable and efficient transmission path in terms of signal transmission, and improving the convenience of product iteration.
[0029] At the same time, as shown in Figure 3 The process route of the packaging structure provided in the embodiment is as follows:
[0030] S1, placing the interconnection bridge 4 on the substrate, and fixedly connecting the interconnection bridge 4 and the substrate 1 through the adhesive layer 8 (adhesive);
[0031] S2, bonding the adapter plate 5 and the substrate 1 through thermal compression bonding or reflow process;
[0032] S3, bonding the first chip 2 and the second chip 3 and the interconnection bridge 4 through thermal compression bonding or reflow process, realizing the lateral interconnection of the first chip 2 and the second chip 3, and bonding the first chip 2 and the second chip 3 and the corresponding adapter plate 5, realizing the vertical interconnection of the first chip 2 and the second chip 3 and the substrate 1;
[0033] S4, filling and protecting the bonding positions between the first chip 2, the second chip 3, the substrate 1, the interconnection bridge 4 and the adapter plate 5 through the underfill adhesive 9.
[0034] The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, not all possible combinations of the technical features in the above embodiments are described, however, as long as the combinations of the technical features do not exist contradictory, they should be considered as the scope of the present disclosure.
[0035] The above embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the application. It should be noted that for ordinary skilled persons in the art, without departing from the concept of the present application, several modifications and improvements can be made, which are all within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.
Claims
1. An interconnect bridge and interposer based high density package structure, comprising: At least comprising a substrate, a first chip, a second chip, an interconnection bridge and a transition plate, the first chip and the second chip are respectively provided with a plurality of micro welding points, the first chip and the second chip are respectively welded and bonded with the corresponding transition plate through part of the micro welding points to form longitudinal interconnection with the transition plate, the transition plate and the substrate are connected through solder balls to form longitudinal interconnection, the first chip and the second chip are connected with the interconnection bridge through part of the micro welding points to form transverse high-density interconnection through the interconnection bridge, the interconnection bridge is integrated with transverse interconnection high-density fine pitch lines, and the line width / line spacing is smaller than that of the substrate.
2. The high-density package structure based on interconnection bridges and adapter plates according to claim 1, characterized in that, The size and spacing of the micro welding points on the first chip and the second chip are matched with the interconnection bridge and the upper surface of the transition plate.
3. The high-density package structure based on interconnection bridges and adapter plates according to claim 1, characterized in that, The material of the interconnection bridge is silicon, glass or organic material.
4. The high-density package structure based on interconnection bridges and adapter plates according to claim 1, characterized in that, The interconnection bridge is connected with the substrate through an adhesive layer.
5. The high-density package structure based on interconnection bridges and adapter plates according to claim 4, characterized in that, The material of the adhesive layer is glue or solder paste.
6. The high-density package structure based on interconnection bridges and adapter plates according to claim 1, characterized in that, The transition plate is one-to-one corresponding to the first chip and the second chip.