Multi-platform compatible motor controller HIL test system based on dSPACE

The motor controller HIL test system, which integrates an FPGA module, a multi-core real-time processor, and a PCI relay board, solves the multi-platform compatibility problem of traditional HIL test systems, realizes automated testing processes, improves testing efficiency, and reduces costs.

CN223941260UActive Publication Date: 2026-02-24EWEA-TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202520640745.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-04-08
Publication Date
2026-02-24
Estimated Expiration
2035-04-08

AI Technical Summary

Technical Problem

Traditional HIL testing systems lack multi-platform compatibility, resulting in underutilization of testing equipment resources, high testing costs, and low efficiency.

Method used

The HIL test system for multi-platform compatible motor controllers based on dSPACE is adopted. By integrating FPGA modules, multi-core real-time processors and PCI relay boards, it realizes automated switching of test objects. The PCI relay boards and FPGA modules are combined to perform signal type conversion and protocol adaptation, and the multi-core real-time processor is used for test management and data communication.

Benefits of technology

It significantly improves testing efficiency, reduces costs, enhances system flexibility and scalability, and enables compatibility testing across different platforms.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223941260U_ABST
    Figure CN223941260U_ABST
Patent Text Reader

Abstract

The utility model discloses a multi-platform compatible motor controller HIL test system based on dSPACE. Comprising at least three motor controllers which independently control corresponding motors, a PCI relay board card which is electrically connected with the at least three motor controllers through bus or hardwire signals, an FPGA module which is integrated with DI / DO, AI / AO and CAN bus interfaces and is in communication connection with the PCI relay board card, and a real-time processor which is used for operating test management software and is connected with the FPGA module. The system variable storage unit is used for storing real-time control parameters; and the PC terminal is used for adjusting system variables in the real-time processor. By integrating the FPGA module, the multi-core real-time processor and the PCI relay board card, the purpose of automatically switching test objects is achieved, and the test efficiency and reliability are remarkably improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to the field of motor controller testing technology, and in particular to a multi-platform compatible motor controller HIL testing system based on dSPACE. Background Technology

[0002] In the development of motor controllers, hardware-in-the-loop (HIL) testing is an important means of verifying their performance and reliability. However, traditional HIL testing systems are often designed for a single platform and lack multi-platform compatibility, resulting in underutilization of testing equipment resources, high testing costs, and low testing efficiency. Summary of the Invention

[0003] To address the aforementioned issues, this invention proposes a multi-platform compatible motor controller HIL test system based on dSPACE. By integrating an FPGA module, a multi-core real-time processor, and a PCI relay board, it achieves automated switching of test objects, significantly improving test efficiency and reliability.

[0004] The technical solution adopted in this utility model is as follows:

[0005] A multi-platform compatible motor controller HIL test system based on dSPACE, including

[0006] At least three motor controllers, each configured to independently control its corresponding motor;

[0007] A PCI relay board is electrically connected to the at least three motor controllers and is used to automatically switch between controllers of different test platforms.

[0008] The FPGA module integrates digital input / output interfaces (DI / DO), analog input / output interfaces (AI / AO), and a CAN bus interface. The FPGA module communicates with the PCI relay board via bus or hard-wired signals to achieve signal type conversion and protocol adaptation.

[0009] A real-time processor, connected to the FPGA module, is used to run test management software and receive test instructions, while simultaneously feeding back signals acquired by the FPGA module.

[0010] The system variable storage unit is configured to store real-time control parameters and interact with the real-time processor.

[0011] A PC terminal is connected to the real-time processor via a communication interface and is used to adjust system variables in the real-time processor and monitor the system's operating status.

[0012] Furthermore, the bus or hardwired signal includes at least one of a parallel bus or an RS-485 serial bus.

[0013] Furthermore, the FPGA module further includes: a multiplexing circuit for dynamically switching the channel allocation of the digital input / output interface and the analog input / output interface according to the signal type.

[0014] Furthermore, the real-time processor adopts a multi-core architecture, with one core dedicated to running the test management software and the other core dedicated to handling data communication with the PC terminal.

[0015] Furthermore, the system variable storage unit is a dual-port RAM, which supports simultaneous access by the real-time processor and the PC terminal.

[0016] Furthermore, the PC terminal is connected to the real-time processor via an Ethernet or USB interface.

[0017] The beneficial effects of this utility model are as follows:

[0018] 1. Improved testing efficiency: The testing cycle is significantly shortened through automated testing processes and automated switching of PCI relay boards;

[0019] 2. Reduced testing costs: No need to equip motor controllers on different platforms with dedicated testing equipment, realizing the sharing and optimization of testing resources;

[0020] 3. Enhanced flexibility and scalability of the testing system: Support for new platforms can be achieved through simple configuration and switching, reducing the difficulty of system upgrades and maintenance. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure of this utility model;

[0022] In the diagram: 1-motor controller, 2-PCI relay board, 3-FPGA module, 4-real-time processor, 5-system variable storage unit, 6-PC terminal. Detailed Implementation

[0023] The present invention will be further described below with reference to the accompanying drawings.

[0024] like Figure 1As shown, this utility model is a multi-platform compatible motor controller HIL test system based on dSPACE. The hardware includes at least three motor controllers 1, each capable of independently controlling its corresponding motor for testing. A PCI relay board 2 is electrically connected to the at least three motor controllers, used for automatically switching controllers between different test platforms. An FPGA module 3 integrates digital input / output interfaces (DI / DO), analog input / output interfaces (AI / AO), and a CAN bus interface. The FPGA module 3 communicates with the PCI relay board 2 via a parallel bus or RS-485 serial bus to achieve signal type conversion and protocol adaptation. The FPGA module 3 also includes a multiplexing circuit, capable of dynamically switching the channel allocation of the digital input / output interfaces and analog input / output interfaces according to the signal type. A real-time processor 4 is connected to the FPGA module 3 and adopts a multi-core architecture. One core is dedicated to running the dSPACE test management software and generating control commands, while also receiving status feedback signals. The other core is dedicated to processing data communication with the PC terminal 6, receiving test commands sent by the PC terminal 6, and providing feedback on the signal values ​​collected by the FPGA module 3. System variable storage unit 5 is a dual-port RAM capable of storing real-time control parameters. It supports simultaneous access by real-time processor 4 and PC terminal 6, and allows data interaction with real-time processor 4. PC terminal 6 is connected to real-time processor 4 via Ethernet or USB interface, and is used to adjust system variables in real-time processor 4, run test scripts, perform tests, and monitor system operating status.

[0025] This invention innovatively introduces a PCI relay board 2 based on the real-time processor 4 and FPGA module 3. By precisely controlling the opening and closing states of the relays through the PCI relay board 2, automated switching between controllers of different test platforms is achieved, thus enabling the test system to perform compatibility testing on multiple test devices. Combined with the automated switching function of the PCI relay board, this invention achieves full automation from test preparation to test execution, significantly improving test efficiency.

[0026] The testing system of this invention eliminates the need for dedicated testing equipment for motor controllers on different platforms; testing of multiple devices under test can be achieved simply through configuration and switching. This not only reduces testing costs but also optimizes the use of testing resources.

Claims

1. A multi-platform compatible motor controller HIL test system based on dSPACE, characterized in that, include: At least three motor controllers, each configured to independently control its corresponding motor; A PCI relay board is electrically connected to the at least three motor controllers and is used to automatically switch between controllers of different test platforms. The FPGA module integrates digital input / output interfaces (DI / DO), analog input / output interfaces (AI / AO), and a CAN bus interface. The FPGA module communicates with the PCI relay board via bus or hard-wired signals to achieve signal type conversion and protocol adaptation. A real-time processor, connected to the FPGA module, is used to run test management software and receive test instructions, while simultaneously feeding back signals acquired by the FPGA module. The system variable storage unit is configured to store real-time control parameters and interact with the real-time processor. A PC terminal is connected to the real-time processor via a communication interface and is used to adjust system variables in the real-time processor and monitor the system's operating status.

2. The HIL test system for a multi-platform compatible motor controller based on dSPACE according to claim 1, characterized in that: The bus or hardwired signal includes at least one of a parallel bus or an RS-485 serial bus.

3. The HIL test system for a multi-platform compatible motor controller based on dSPACE according to claim 1, characterized in that, The FPGA module further includes: Multiplexing circuitry is used to dynamically switch the channel allocation between the digital input / output interface and the analog input / output interface according to the signal type.

4. The HIL test system for a multi-platform compatible motor controller based on dSPACE according to claim 1, characterized in that: The real-time processor adopts a multi-core architecture, with one core dedicated to running the test management software and the other core dedicated to handling data communication with the PC terminal.

5. The HIL test system for a multi-platform compatible motor controller based on dSPACE according to claim 1, characterized in that: The system variable storage unit is a dual-port RAM, which supports simultaneous access by the real-time processor and the PC terminal.

6. The HIL test system for a multi-platform compatible motor controller based on dSPACE according to claim 1, characterized in that: The PC terminal is connected to the real-time processor via an Ethernet or USB interface.