VPX reinforcement controller

Abstract

The utility model belongs to the field of electronic control, and relates to a VPX reinforced controller which comprises a processor, a bridge piece, a VPX back plate, a VPX standard connector, a status lamp, a power management system, an intelligent management chip, a data exchange module and an IO expansion interface which are electrically connected. The bridge piece is connected with external electronic equipment through the I O expansion interface, the VPX standard connector is connected with the VPX backboard, the status lamp is connected with the power management system through the LED driving circuit, the power management system is connected with the VPX backboard through a power line, and the intelligent management chip is connected with the processor and the bridge piece through an internal bus. High efficiency and real-time performance of data transmission are ensured, and a solid foundation is provided for complex operation and high-speed data processing; seamless butt joint between systems is guaranteed, modularization and expandability of the system are improved, and later maintenance and upgrading are facilitated. And diversified application scene requirements are met.

Description

Technical Field

[0001] This utility model relates to the field of electronic control technology, and more specifically, to a VPX ruggedized controller. Background Technology

[0002] The VPX ruggedized controller is a high-performance computing device designed for harsh environments and widely used in industrial and military fields such as aerospace telemetry and control, airborne data logging, and high-speed data processing. Based on the VI TA 46 (VPX) standard, it retains compatibility with the VMEbus system and provides a switching structure supported by high-speed connectors, significantly improving system scalability and performance.

[0003] However, existing VPX rugged controllers suffer from limited interface expansion. Although the VPX standard supports various configuration options, in practical applications, the limitations in the number and type of interfaces often restrict the system's flexibility and scalability. Furthermore, with continuous technological advancements, the demand for intelligent controller management is increasing, while existing VPX rugged controllers are still lacking in this area. Utility Model Content

[0004] To address the aforementioned deficiencies in the prior art, this utility model provides a VPX ruggedized controller, comprising:

[0005] The processor, bridge chip, VPX backplane, VPX standard connector, status lights, power management system, intelligent management chip, data exchange module, and I / O expansion interface are electrically connected. The processor is connected to the bridge chip via a high-speed internal bus. The bridge chip is connected to external electronic devices via the I / O expansion interface. The VPX standard connector is connected to the VPX backplane. The status lights are connected to the power management system via an LED driver circuit. The power management system is connected to the VPX backplane via a power cable. The intelligent management chip is connected to both the processor and the bridge chip via an internal bus.

[0006] Preferably, the processor is any one of Phytium D2000, Intel Xeon D series, and AMD EPYC embedded series.

[0007] Preferably, the bridge chip is any one of the Phytium X100, Intel C246 chipset, or AMD SP510 chipset.

[0008] Preferably, the power management system includes a power monitoring module and a power distribution module.

[0009] Preferably, the intelligent management chip includes a BMC chip.

[0010] Preferably, the data exchange module includes: a field-programmable gate array and a complex programmable logic device.

[0011] Preferably, the IO expansion interface includes: PCIe, SATA, USB, UART, CAN, I2S, SPI and I2C, etc.

[0012] Preferably, the power monitoring module includes a voltage sensor, a current sensor, and a temperature sensor.

[0013] Preferably, the power distribution module includes: a power converter, a power distribution network, and a power monitoring circuit.

[0014] Preferably, the VPX rugged controller has a housing and connectors. The housing is made of aluminum alloy or stainless steel, and the connectors have heat dissipation fins, shock-absorbing pads and a reinforcement frame. The connectors are used to connect the processor, the bridge plate, the VPX backplane and the VPX standard connector.

[0015] The VPX ruggedized controller of this invention has the following advantages: The high-performance processor and bridge chip, electrically connected together, combined with a high-speed internal bus architecture, ensure efficient and real-time data transmission, providing a solid foundation for complex calculations and high-speed data processing. The use of VPX standard connectors and a backplane not only ensures seamless system integration but also enhances the system's modularity and scalability, facilitating future maintenance and upgrades. Status lights connected to the power management system via LED driver circuits enable intuitive monitoring of system status, allowing for rapid identification of anomalies and improving troubleshooting efficiency. The power management system, connected to the VPX backplane via stable power lines, ensures stable and reliable power supply for the entire system, effectively preventing data loss or system crashes due to power fluctuations. The integrated intelligent management chip, tightly connected to the processor and bridge chip via an internal bus, enables intelligent scheduling and optimization of system resources, further improving overall performance and energy efficiency. The rich I / O expansion interface design allows the controller to easily connect to various external electronic devices, meeting diverse application scenario requirements. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort. The utility model will be further described below in conjunction with the drawings and embodiments. In the drawings:

[0017] Figure 1 This is a structural schematic diagram of the VPX rugged controller of this utility model. Detailed Implementation

[0018] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0019] It should be noted that if the embodiments of this utility model involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0020] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0021] Please see Figure 1 This is a structural schematic diagram of the VPX ruggedized controller of this utility model. Figure 1 As shown, the VPX ruggedized controller provided in the first embodiment of this utility model includes at least a processor, a bridge chip, a VPX backplane, a VPX standard connector, status lights, a power management system, an intelligent management chip, a data exchange module, and an IO expansion interface, which are electrically connected. The processor is connected to the bridge chip via a high-speed internal bus, the bridge chip is connected to external electronic devices via the IO expansion interface, the VPX standard connector is connected to the VPX backplane, the status lights are connected to the power management system via an LED driver circuit, the power management system is connected to the VPX backplane via a power cable, and the intelligent management chip is connected to the processor and the bridge chip respectively via an internal bus.

[0022] In some optional implementations of this embodiment, the processor can be, but is not limited to, any of the Phytium D2000, Intel Xeon D series, and AMD EPYC embedded series. The processor provides powerful computing capabilities and low power consumption. In this embodiment, the processor is selected as the Phytium D2000. The Phytium D2000 processor integrates eight independently developed FTC663 high-efficiency processor cores, supports the 64-bit ARMv8 instruction set, and has a maximum clock speed of 2.3GHz (some sources say 2.3-2.6GHz). This processor possesses excellent computing performance, with SPECint and SPECfp scores reaching 97.45 and 94.62 respectively, and a memory bandwidth of up to 18.7GB / s. Furthermore, the Phytium D2000 also incorporates a built-in cryptographic acceleration engine, supports the PSPA 1.0 security specification, and enhances system security. Its rich I / O interfaces and good software ecosystem compatibility enable the Phytium D2000 to be widely used in various scenarios such as desktop terminals and lightweight servers.

[0023] In some optional implementations of this embodiment, the bridge chip can be, but is not limited to, any of the Phytium X100, Intel C246 chipset, or AMD SP510 chipset. The bridge chip works closely with the processor, responsible for memory control, input / output (I / O) expansion, storage interfaces, and other functions. In this embodiment, the bridge chip is selected as the Phytium X100. The Phytium X100 bridge chip integrates an 800MHz low-power GPU, supporting basic graphics processing and display output, and capable of handling H.264 / 2654K@30fps video decoding. Furthermore, the X100 bridge chip supports multiple display interfaces, such as three DP 1.4 ports, enabling three-way independent display, and also provides audio interfaces, various interface expansions (USB, SATA, PCIe, RGMII, UART, I2C, etc.), PCIe expansion, and temperature monitoring functions. These features enable the X100 bridge chip to play a crucial role in enhancing system stability and efficiency, providing comprehensive functional and interface expansion support for Phytium CPU-based systems.

[0024] The processor connects to the bridge chip via a high-speed internal bus (such as DMI or QPI) to achieve high-speed data transmission. The bridge chip connects to external electronic devices via interfaces such as PCIe, SATA, and USB to expand I / O capabilities. The processor is responsible for executing instructions and processing data, and is the core computing unit of this VPX ruggedized controller. The bridge chip is responsible for transmitting data and control signals from the processor to external electronic devices, while also managing memory access and storage operations. Together, they achieve efficient data processing and I / O expansion. By selecting a high-performance processor and bridge chip, the VPX ruggedized controller can handle complex data processing tasks while maintaining low power consumption. The bridge chip's rich I / O interfaces support various peripheral connections, improving the system's scalability and flexibility.

[0025] The VPX backplane uses a multi-layer PCB design, integrating high-speed differential signal lines (such as PCIe and SATA Express), power lines, and control signal lines. VPX standard connectors, such as P0, P1, and P2, are used for connection between the module and the VPX backplane.

[0026] The module is inserted into the VPX backplane via a standard VPX connector, enabling high-speed signal and data transmission with the VPX backplane. The VPX backplane ensures low-latency, low-loss signal transmission.

[0027] When a module is inserted into the VPX backplane, the pins on the VPX standard connector contact the copper foil on the VPX backplane, forming an electrical connection. High-speed differential signal lines are responsible for transmitting high-speed data signals such as PCIe and SATA, while power lines provide a stable power supply. Control signal lines are used to implement management functions such as synchronization and arbitration between modules.

[0028] The high-bandwidth design of the VPX backplane supports high-speed data transmission between multiple modules, improving overall system performance. The low-latency interconnect design ensures real-time data accuracy, making it suitable for time-sensitive applications. The VPX backplane also provides redundant power and signal paths, enhancing system reliability and fault tolerance.

[0029] Status lights include power indicators, system operation indicators, etc. These status lights can be located on the control panel.

[0030] The status indicator is connected to the power management system via an LED driver circuit, receiving signals of power status and system operating status. When the power management system detects power input, it illuminates the power indicator, indicating that the system has power input. When the VPX rugged controller of this invention is running, the power management system monitors the data read status of the SATA system disk and illuminates the system operating indicator.

[0031] Status lights use different colors and flashing patterns to indicate different power states and system operating states.

[0032] In practice, LED driver circuits include rectifier and filter circuits and high-frequency conversion circuits. The rectifier and filter circuit is primarily responsible for converting the input AC power into DC power and providing a relatively stable DC voltage. This circuit includes components such as a bridge rectifier and filter capacitors. The high-frequency conversion circuit utilizes power switching devices (such as MOSFETs) and components like inductors and capacitors, employing PWM (Pulse Width Modulation) technology to adjust the output current and voltage to meet the specific operating requirements of LED lights.

[0033] The integration of status lights with the power management system provides intuitive indications of power status and system operating status, facilitating troubleshooting and maintenance. The power management system also offers overvoltage, overcurrent, and short-circuit protection functions, ensuring safe and stable system operation. Through real-time monitoring and feedback from the status lights, users can promptly identify and address potential problems, improving system reliability and availability.

[0034] The power management system connects to the VPX backplane via power cables to distribute and monitor power. The power management system includes a power monitoring module and a power distribution module.

[0035] The power monitoring module includes a voltage sensor, a current sensor, and a temperature sensor.

[0036] The voltage sensor is used to monitor the input power supply voltage in real time to ensure it remains within a safe range. When the voltage exceeds a preset threshold, the voltage sensor will trigger a protection mechanism.

[0037] Current sensors monitor the current in a circuit to prevent overcurrent from damaging the system. Current sensors are typically used in conjunction with overcurrent protection circuits.

[0038] Temperature sensor: Monitors the temperature of critical components inside the power module in real time, such as power transistors and transformers. When the temperature exceeds a set threshold, it triggers an overheat protection mechanism.

[0039] Voltage, current, and temperature sensors collect real-time status information of the VPX rugged controller power supply. The processor then performs logical checks based on the collected signals to determine if the VPX rugged controller power supply is in a safe state. If an abnormality is detected (such as overvoltage, undervoltage, overcurrent, or overheating), the processor will immediately cut off the power supply, adjust the power output, or issue an alarm signal.

[0040] Heatsinks and fans are mounted on the processor and CPU bridge, and temperature sensors monitor the temperature in real time. When the temperature sensor detects a high temperature, the fan speeds up, and the heatsink helps dissipate heat, maintaining stable system operation.

[0041] The power distribution module includes a power converter, a power distribution network, and a power monitoring circuit. The power converter converts the input power of the VPX ruggedized controller into the voltage and current required by each functional module. The power converter can employ a switching power supply to improve efficiency and stability.

[0042] The power distribution network consists of multiple power rails used to distribute the converted power to various functional modules. It should be noted that the design of the power distribution network needs to consider factors such as current capacity, voltage stability, and noise suppression.

[0043] The intelligent management chip includes a BMC chip. This chip collects system operating status information, such as temperature, voltage, current, and fan speed, and transmits this information to the processor or bridge chip for processing via an internal bus. Intelligent management improves the manageability and maintainability of the VPX ruggedized controller.

[0044] BMC chips include, but are not limited to, AST2050, AST2300, AST2400, AST2520, and AST2600. BMC chips can perform power management, monitoring and controlling the power status of computer systems, including power on / off switching, monitoring of supply voltage and current, and alarming and handling of power failures. Secondly, they can perform temperature monitoring, monitoring the temperature of various critical components in the computer system in real time to enable operations such as fan speed adjustment, temperature alarms, and fault diagnosis. Furthermore, BMC chips can remotely monitor and manage server hardware, including hardware resource allocation and configuration, power control, BIOS settings, and remote restart operations.

[0045] The BMC chip also supports remote control, enabling remote control of the computer system via network, improving system manageability and maintainability. It can also monitor various hardware resources in the computer system through sensors, collecting and monitoring parameters such as temperature, fan speed, voltage, and current in real time for fault early warning and diagnosis. Simultaneously, the BMC chip has a logging function, recording the computer system's operating status and events in real time, including data center resource utilization, fault logs, and security logs, providing administrators with a basis for troubleshooting and system optimization.

[0046] The data exchange module includes a Field-Programmable Gate Array (FPGA) and a Complex Programmable Logic Device (CPLD). The FPGA, as the core control unit of the data exchange module, is responsible for data flow scheduling, protocol conversion, and error detection. Its high programmability and flexibility allow it to adapt to different data exchange requirements, optimize data paths, and improve data transmission efficiency. The CPLD assists the FPGA in completing logic control during the data exchange process, such as address decoding, signal synchronization, and interrupt management. Its low power consumption, high reliability, and ease of programming make it an indispensable component of the data exchange module.

[0047] In practical implementation, the data exchange module may also include a high-speed dual-port RAM memory control circuit. The high-speed dual-port RAM, acting as a buffer for data exchange, can simultaneously support two independent data access ports, enabling fast data reading, writing, and exchange. Its high-speed data transmission capability and low latency characteristics ensure the real-time performance and reliability of data exchange.

[0048] In practical implementation, the data exchange module may also include a Bus Low Voltage Differential Signaling (BLVDS) interface resistor matching circuit. The BLVDS interface circuit is responsible for high-speed, low-noise data signal transmission and optimizes signal quality through the resistor matching circuit, reducing attenuation and interference during transmission. Its differential signal transmission method effectively improves the anti-interference capability and stability of data transmission.

[0049] In practical implementation, the data exchange module may also include a power supply circuit. The power supply circuit provides a stable and reliable power supply to the data exchange module, ensuring the normal operation of all components. In VPX rugged controllers, the power supply circuit typically employs a rugged design to withstand the power demands of harsh environments.

[0050] The specific data exchange process in the data exchange module of the VPX ruggedized controller is as follows:

[0051] Data path design: Based on the data exchange requirements, the FPGA designs the data path, including data input, output, storage, and forwarding. Precise control and scheduling of the data flow are achieved by configuring the internal logic circuits of the FPGA.

[0052] Protocol conversion: During data exchange, the FPGA is responsible for protocol conversion, transforming data of different formats and rates into a unified exchange format and rate. This facilitates seamless connectivity and data sharing between different devices.

[0053] Data buffer: A high-speed dual-port RAM acts as a data buffer, receiving data streams from the FPGA and performing read and write operations according to control signals. Its dual-port design allows for simultaneous processing of read and write requests, improving the concurrency and efficiency of data exchange.

[0054] Signal transmission: The BLVDS interface circuit transmits the processed data signal to the target device differentially. By optimizing signal quality and transmission path, it ensures fast and accurate data transmission.

[0055] Error Detection and Recovery: During data exchange, the FPGA uses built-in error detection mechanisms, such as CRC check and parity check, to monitor the data stream in real time. Once an error is detected, a recovery mechanism is immediately triggered, such as a retransmission request or data replacement, to ensure data integrity and reliability.

[0056] Power Management: The power supply circuit provides a stable power supply to the entire data exchange module and monitors the power status in real time through the monitoring circuit. In case of power abnormalities, protective measures such as power failure protection and overvoltage and overcurrent protection are triggered in a timely manner to ensure the safe operation of the equipment.

[0057] The I / O expansion interfaces include: PCIe, SATA, USB, UART, CAN, I2S, SPI, and I2C. PCIe interfaces are used to connect high-speed storage devices, graphics cards, network cards, etc. SATA interfaces are used to connect hard drives, optical drives, and other storage devices. USB interfaces are used to connect peripherals such as keyboards, mice, and printers. UART, CAN, I2S, SPI, and I2C interfaces are used to connect various serial communication devices and sensors. These interfaces are connected to the processor via bridge chips or directly to achieve data transmission and control. Each interface supports hot-swapping and plug-and-play functionality, allowing users to flexibly configure it according to their needs.

[0058] PCIe interfaces employ high-speed differential signal transmission technology, supporting high-speed data transmission and the connection of various devices. SATA interfaces use serial transmission, improving data transmission efficiency and stability. USB interfaces transmit and control data through differential signal lines with the host controller. UART, CAN, and other interfaces use serial communication protocols to achieve low-speed, reliable data transmission.

[0059] Extensive I / O expansion supports various peripheral connections, enhancing system flexibility and scalability. Users can select appropriate interfaces and devices for configuration based on actual needs, meeting diverse application scenarios. Flexible interface configuration also supports hot-swapping and plug-and-play functionality, improving system usability and maintainability.

[0060] The VPX ruggedized controller consists of a housing and connectors. The housing is made of aluminum alloy or stainless steel, while the connectors feature heat sinks, shock absorbers, and a reinforced frame. The connectors are used to connect the processor, bridge, VPX backplane, and VPX standard connectors, forming a robust protective layer. Aluminum alloy and stainless steel materials are characterized by high strength and corrosion resistance.

[0061] Rugged design enhances a system's resistance to earthquakes and impacts by increasing the strength and thickness of materials. Structures such as heat dissipation fins and vibration damping pads help reduce the effects of temperature and vibration on the system, improving its stability and reliability.

[0062] The rugged design enhances the VPX rugged controller's ability to withstand harsh environments, enabling stable operation in complex conditions such as high and low temperatures, high humidity, and strong vibration. Through optimized heat dissipation and vibration damping designs, the system maintains lower temperatures and smaller vibration amplitudes, extending its lifespan and reliability.

[0063] The beneficial effects of this invention, through the design of the above embodiments, are as follows: The high-performance processor and bridge chip, electrically connected, combined with a high-speed internal bus architecture, ensure efficient and real-time data transmission, providing a solid foundation for complex calculations and high-speed data processing; the adoption of VPX standard connectors and backplanes not only ensures seamless interoperability between systems but also enhances the modularity and scalability of the system, facilitating future maintenance and upgrades; the status lights are connected to the power management system via LED driver circuits, enabling intuitive monitoring of system status and rapid identification of abnormalities, thereby improving troubleshooting efficiency; the power management system is connected to the VPX backplane via stable power lines, ensuring stable and reliable power supply for the entire system and effectively preventing data loss or system crashes due to power fluctuations; the integration of the intelligent management chip, tightly connected to the processor and bridge chip via the internal bus, enables intelligent scheduling and optimization of system resources, further improving overall performance and energy efficiency; the rich IO expansion interface design allows the controller to easily connect to various external electronic devices, meeting diverse application scenario requirements.

[0064] This utility model has been described based on specific embodiments, but those skilled in the art will understand that various changes and equivalent substitutions can be made without departing from the scope of this utility model. Furthermore, to adapt to specific applications of this utility model, numerous modifications can be made without departing from its protection scope. Therefore, this utility model is not limited to the specific embodiments disclosed herein, but includes all embodiments falling within the protection scope of the claims.

Claims

1. A VPX ruggedized controller, characterized in that, include: The processor, bridge chip, VPX backplane, VPX standard connector, status lights, power management system, intelligent management chip, data exchange module, and I / O expansion interface are electrically connected. The processor is connected to the bridge chip via a high-speed internal bus. The bridge chip is connected to external electronic devices via the I / O expansion interface. The VPX standard connector is connected to the VPX backplane. The status lights are connected to the power management system via an LED driver circuit. The power management system is connected to the VPX backplane via a power cable. The intelligent management chip is connected to both the processor and the bridge chip via an internal bus.

2. The VPX ruggedized controller according to claim 1, characterized in that, The processor can be any of the Phytium D2000, Intel Xeon D series, or AMD EPYC embedded series.

3. The VPX ruggedized controller according to claim 1, characterized in that, The bridge chip can be any one of the Phytium X100, Intel C246 chipset, or AMD SP510 chipset.

4. The VPX ruggedized controller according to claim 1, characterized in that, The power management system includes a power monitoring module and a power distribution module.

5. The VPX ruggedized controller according to claim 1, characterized in that, The intelligent management chip includes: a BMC chip.

6. The VPX ruggedized controller according to claim 1, characterized in that, The data exchange module includes: field-programmable gate arrays and complex programmable logic devices.

7. The VPX ruggedized controller according to claim 1, characterized in that, The I / O expansion interfaces include: PCIe, SATA, USB, UART, CAN, I2S, SPI, and I2C.

8. The VPX ruggedized controller according to claim 4, characterized in that, The power monitoring module includes a voltage sensor, a current sensor, and a temperature sensor.

9. The VPX ruggedized controller according to claim 4, characterized in that, The power distribution module includes: a power converter, a power distribution network, and a power monitoring circuit.

10. The VPX ruggedized controller according to any one of claims 1 to 9, characterized in that, The VPX rugged controller has a housing and connectors. The housing is made of aluminum alloy or stainless steel. The connectors have heat dissipation fins, shock-absorbing pads and a reinforcement frame. The connectors are used to connect the processor, the bridge plate, the VPX backplane and the VPX standard connector.

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