Multilayer chip ceramic capacitor with bending resistance

Abstract

The utility model discloses a multi-layer chip ceramic capacitor with bending resistance, which comprises a dielectric body, a plurality of first inner electrodes and a plurality of second inner electrodes, wherein the first inner electrodes and the second inner electrodes are arranged in the dielectric body in an up-down alternating lamination manner; the first end electrode and the second end electrode wrap the two sides of the dielectric body and make contact with the outer end of the first inner electrode and the outer end of the second inner electrode respectively; wherein the ratio of the margin b of the two ends of the first inner electrode and the second inner electrode to the effective electrode length a is 1: 3.5; compared with the prior art, the capacitor has the advantages that more buffer space is provided for the edge of the capacitor by increasing the margin of the inner electrode of the capacitor, the edge stress is effectively dispersed, the stress distribution of the surface of the whole capacitor is more balanced, the fracture risk caused by stress concentration is reduced, the electrical characteristics of the capacitor can be maintained, and the service life of the capacitor is prolonged. And the overall bending strength and reliability of the capacitor are improved.

Description

Technical Field

[0001] This utility model belongs to the field of electronic component manufacturing technology, and in particular relates to a multilayer ceramic chip capacitor with bending resistance. Background Technology

[0002] In the rapid development of modern electronic devices, multilayer ceramic chip capacitors (MLCCs) are widely used in various electronic products due to their advantages such as small size, large capacitance, and good high-frequency characteristics. However, as electronic devices become increasingly miniaturized and integrated, the mechanical stress that MLCCs experience in their working environment also increases. Especially in mobile devices and electric vehicles, MLCCs often face severe vibration and bending stress, which poses a serious challenge to their reliability and lifespan.

[0003] To address this technical challenge, the industry has explored various methods, including improving material formulations, optimizing internal structural design, and employing specialized mounting and welding processes. While these measures have improved the mechanical stability of MLCCs to some extent, traditional capacitor designs often prioritize maximizing capacitor area utilization, resulting in narrower edge regions (smaller internal electrode margins). This leads to stress concentration at the edges, causing the edges to bear the brunt of bending forces and making them more susceptible to damage. Therefore, an innovative solution is urgently needed that can significantly improve the bending resistance of MLCCs, especially at the capacitor edges, without sacrificing electrical performance. Summary of the Invention

[0004] The purpose of this invention is to provide a multilayer ceramic chip capacitor with bending resistance. By increasing the amount of electrode margin inside the capacitor, more buffer space is provided for the capacitor edge, effectively dispersing edge stress and making the stress distribution on the entire capacitor surface more balanced. This reduces the risk of fracture caused by stress concentration, and while maintaining its electrical characteristics, it improves the overall bending strength and reliability of the capacitor.

[0005] The technical solution of this utility model is: a multilayer chip ceramic capacitor with bending resistance, comprising a dielectric body, a plurality of first inner electrodes and second inner electrodes stacked alternately inside the dielectric body, and a first end electrode and a second end electrode wrapped around both sides of the dielectric body and in contact with the outer ends of the first inner electrode and the second inner electrode, respectively; wherein the ratio of the margin b at both ends of the first inner electrode and the second inner electrode to its effective electrode length a is 1:3.5.

[0006] As a preferred technical solution, an upper ceramic buffer layer is disposed inside the dielectric body and above the uppermost first inner electrode, and a lower ceramic buffer layer is disposed inside the dielectric body and below the lowermost second inner electrode; at the same time, the upper ceramic buffer layer and the lower ceramic buffer layer extend to both sides and exceed the inner ends of the first inner electrode and the first inner electrode.

[0007] As a preferred technical solution, an epoxy resin insulating layer is provided at both the top and bottom of the dielectric body, and the two ends of the epoxy resin insulating layer extend to the outer surfaces of the first end electrode and the second end electrode, respectively.

[0008] As a preferred technical solution, both the upper ceramic buffer layer and the lower ceramic buffer layer are zirconia ceramic layers.

[0009] As a preferred technical solution, the adjacent first inner electrode and second inner electrode, the uppermost first inner electrode and the upper ceramic buffer layer, and the lowermost second inner electrode and the lower ceramic buffer layer are stacked at equal intervals.

[0010] As a preferred technical solution, both the first end electrode and the second end electrode are flexible end electrodes.

[0011] The advantages of this utility model are:

[0012] 1. The present invention provides a multilayer ceramic chip capacitor with bending resistance by increasing the amount of electrode margin in the capacitor, which provides more buffer space for the capacitor edge, effectively disperses the edge stress, makes the stress distribution on the entire capacitor surface more balanced, reduces the risk of fracture caused by stress concentration, and can maintain its electrical characteristics while improving the overall bending strength and reliability of the capacitor.

[0013] 2. The multilayer ceramic chip capacitor with bending resistance of this utility model can not only extend its service life, but also reduce the risk of system failure and maintenance costs caused by capacitor damage, bringing better economic benefits to enterprises. It is of particular importance for application scenarios that pursue long life and high reliability (such as automotive electronics, aerospace, etc.).

[0014] 3. This utility model increases the margin of the internal electrodes of the capacitor, which allows for better control of the thickness and shape of the ceramic sheet during the production process, thereby improving the consistency and repeatability of the capacitor, achieving a higher yield and lower manufacturing cost, which is especially important for mass production. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the following description of the embodiments will be briefly introduced. The drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0017] Figure 1 This is a schematic diagram of the structure of this utility model;

[0018] Figure 2 This is a schematic diagram showing the margin allowance and effective electrode length of this utility model;

[0019] Wherein: 1 dielectric body, 2 first internal electrode, 3 second internal electrode, 4 first end electrode, 5 second end electrode, 6 upper ceramic buffer layer, 7 lower ceramic buffer layer, 8 epoxy resin insulating layer. Detailed Implementation

[0020] The above solution will be further described below with reference to specific embodiments. It should be understood that these embodiments are for illustrating the present invention and are not intended to limit the scope of the present invention. The implementation conditions used in the embodiments can be further adjusted according to the conditions of specific manufacturers, and the implementation conditions not specified are usually the conditions in conventional experiments.

[0021] Example 1: Refer to Figure 1 and Figure 2 As shown, a multilayer ceramic chip capacitor with bending resistance includes a dielectric body 1, several first inner electrodes 2 and second inner electrodes 3 alternately stacked inside the dielectric body 1, and a first end electrode 4 and a second end electrode 5 wrapped around both sides of the dielectric body 1 and in contact with the outer ends of the first inner electrodes 2 and the second inner electrodes 3, respectively. The ratio of the margin b at both ends of the first inner electrodes 2 and the second inner electrodes 3 to their effective electrode length a is 1:3.5. By increasing the margin of the capacitor's inner electrodes, more buffer space is provided for the capacitor edges, effectively dispersing edge stress and making the stress distribution on the entire capacitor surface more balanced. This reduces the risk of fracture due to stress concentration, maintaining its electrical characteristics while improving the overall bending strength and reliability of the capacitor.

[0022] Reference Figure 1 and Figure 2As shown, an upper ceramic buffer layer 6 is disposed inside the dielectric body 1 and above the uppermost first inner electrode 2, and a lower ceramic buffer layer 7 is disposed inside the dielectric body 1 and below the lowermost second inner electrode 3. At the same time, the upper ceramic buffer layer 6 and the lower ceramic buffer layer 7 extend to both sides and exceed the inner ends of the first inner electrode 2 and the first inner electrode 3. Both the upper ceramic buffer layer 6 and the lower ceramic buffer layer 7 are zirconia ceramic layers, which can effectively improve the overall bending strength of the capacitor (including the edge area and the middle area of ​​the capacitor).

[0023] Reference Figure 1 As shown, epoxy resin insulating layers 8 are provided at the top and bottom of the dielectric body 1, and the two ends of the epoxy resin insulating layer 8 extend to the outer surfaces of the first end electrode 4 and the second end electrode 5 respectively. The first end electrode 4 and the second end electrode 5 are both flexible end electrodes. The epoxy resin insulating layer 8 can not only improve the overall bending strength of the capacitor, but also effectively strengthen the connection strength between the first end electrode 4 and the second end electrode 5 and the dielectric body 1, further reducing the risk of breakage at the joint.

[0024] Reference Figure 1 and Figure 2 As shown, the adjacent first inner electrode 2 and second inner electrode 3 are stacked at equal intervals, the first inner electrode 2 located at the top layer and the upper ceramic buffer layer 6 are stacked at equal intervals, and the second inner electrode 3 located at the bottom layer and the lower ceramic buffer layer 7 are stacked at equal intervals.

[0025] Table 1 compares the performance test data of the capacitor of the present invention with those of the prior art:

[0026]

[0027] Referring to Table 1, a series of performance tests were conducted on the capacitor produced by this invention, including capacitance, dielectric loss, and insulation resistance. Simultaneously, the bending strength of the capacitor produced by this invention was tested, and the breakage rate was compared with that of existing capacitors under the same bending conditions. Experimental data showed that the capacitor of this invention exhibited a significantly lower breakage rate under the same bending conditions, demonstrating the superiority of this invention in improving the mechanical strength of the capacitor.

[0028] The above embodiments are only for illustrating the technical concept and features of this utility model, and are intended to enable those skilled in the art to understand the content of this utility model and implement it accordingly. They should not be construed as limiting the scope of protection of this utility model. All equivalent changes or modifications made in accordance with the spirit and essence of this utility model should be included within the scope of protection of this utility model.

Claims

1. A multilayer ceramic chip capacitor with bending resistance, characterized in that, It includes a dielectric body, a plurality of first inner electrodes and second inner electrodes stacked alternately inside the dielectric body, and a first end electrode and a second end electrode wrapped around both sides of the dielectric body and in contact with the outer ends of the first inner electrode and the second inner electrode, respectively; wherein the ratio of the margin b at both ends of the first inner electrode and the second inner electrode to its effective electrode length a is 1:3.

5.

2. The multilayer ceramic chip capacitor with bending resistance according to claim 1, characterized in that, An upper ceramic buffer layer is disposed inside the dielectric body and above the uppermost first inner electrode, and a lower ceramic buffer layer is disposed inside the dielectric body and below the lowermost second inner electrode; the upper ceramic buffer layer and the lower ceramic buffer layer extend to both sides and exceed the inner ends of the first inner electrode and the first inner electrode.

3. The multilayer ceramic chip capacitor with bending resistance according to claim 1, characterized in that, An epoxy resin insulating layer is provided at both the top and bottom of the dielectric body, and the two ends of the epoxy resin insulating layer extend to the outer surfaces of the first end electrode and the second end electrode, respectively.

4. The multilayer ceramic chip capacitor with bending resistance according to claim 2, characterized in that, Both the upper ceramic buffer layer and the lower ceramic buffer layer are zirconia ceramic layers.

5. The multilayer ceramic chip capacitor with bending resistance according to claim 2, characterized in that, The adjacent first inner electrode and second inner electrode, the uppermost first inner electrode and the upper ceramic buffer layer, and the lowermost second inner electrode and the lower ceramic buffer layer are stacked at equal intervals.

6. The multilayer ceramic chip capacitor with bending resistance according to claim 1, characterized in that, Both the first end electrode and the second end electrode are flexible end electrodes.

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