Digital quantity output circuit capable of configuring high and low thresholds

Abstract

The utility model discloses a digital quantity output circuit capable of configuring high and low thresholds in the technical field of industrial control, which comprises a high-level threshold comparison circuit and a low-level threshold comparison circuit, and the high-level threshold comparison circuit and the low-level threshold comparison circuit are both connected with a trigger output circuit. An external control signal is compared according to an input threshold level signal through the high level threshold comparison circuit and the low level threshold comparison circuit, a corresponding high level or low level is output, then the trigger output circuit outputs a switch control signal to a switch of external equipment so as to control the switch state of the external equipment, the response speed is high, the output is stable, and the reliability is high. High and low level thresholds can be configured, and various application scenes can be adapted.

Description

Technical Field

[0001] This utility model relates to a configurable high and low threshold digital output circuit in the field of industrial control technology. Background Technology

[0002] Digital output modules (DOs), as crucial components in industrial automation control, primarily function to effectively control digital signals. By receiving external control signals, these modules can precisely output switching signals, thereby controlling the operational status of industrial equipment, robots, and electronic devices. For example, in mechanical equipment control systems, they can be used for equipment start / stop, position control, and alarm control; in building automation control, they can achieve intelligent control of lighting, electric curtains, etc. Existing DO modules are divided into relay output type and transistor output type. While relay output types are inexpensive and have low on-state voltage drop, they suffer from short lifespan, long response time, slow operation, limited switching cycles, and are prone to contact failure. Thyristor output types offer fast response and long lifespan, but are more expensive, have poor overload capacity, and are easily damaged by overcurrent. Utility Model Content

[0003] The purpose of this invention is to provide a digital output circuit with configurable high and low thresholds, which has a fast response speed, stable output, and configurable high and low level thresholds, making it suitable for various application scenarios.

[0004] To achieve the above objectives, this utility model provides a configurable high and low threshold digital output circuit, including a high-level threshold comparison circuit and a low-level threshold comparison circuit, both of which are connected to a trigger output circuit.

[0005] Compared with the prior art, the beneficial effects of this utility model are that it compares the external control signal with the input threshold level signal through the high-level threshold comparison circuit and the low-level threshold comparison circuit, outputs the corresponding high level or low level, and then the trigger output circuit outputs the switch control signal to the switch of the external device to control its switching state. It has a fast response speed, stable output, and configurable high and low level thresholds, and can adapt to various application scenarios.

[0006] As a further improvement of this utility model, the high-level threshold comparison circuit includes amplifier U1A, pin 4 of amplifier U1A is grounded, pin 8 of amplifier U1A is connected to a 3.3V power supply, pin 3 of amplifier U1A is connected to an external control signal, a resistor R1 is connected between pin 2 and pin 1 of amplifier U1A, pin 2 of amplifier U1A is connected to pin 1 of comparator U2 via resistor R2, pin 4 of comparator U2 is grounded via capacitor C1, pins 2 and 6 of comparator U2 are grounded, pin 3 of comparator U2 is connected to pin 6 of amplifier U1B via resistor R4, pin 4 of amplifier U1B is grounded, pin 8 of amplifier U1B is connected to a 3.3V power supply, a resistor R7 is connected between pins 6 and 7 of amplifier U1B, pin 5 of amplifier U1B is connected to the high-level output terminal of the DC power supply, a resistor R6 is connected between pins 3 and 5 of comparator U2, and pin 5 of comparator U2 is connected to a trigger output circuit.

[0007] In this way, the DC power supply outputs a high-level threshold signal to amplifier U1B, while the external control signal is input to amplifier U1A. After the signal is amplified by the amplifier, the two voltage signals are compared by the comparator. When the external control signal is higher than the high-level threshold signal, the comparator outputs a low level; when the external control signal is lower than the high-level threshold signal, the comparator outputs a high level.

[0008] As a further improvement of this utility model, the low-level threshold comparison circuit includes amplifier U4A, pin 4 of amplifier U4A is grounded, pin 8 of amplifier U4A is connected to a 3.3V power supply, pin 3 of amplifier U4A is connected to the low-level output terminal of the DC power supply, a resistor R15 is connected between pin 2 and pin 1 of amplifier U4A, pin 2 of amplifier U4A is connected to pin 1 of comparator U5 via resistor R16, pin 4 of comparator U5 is grounded via capacitor C1, pins 2 and 6 of comparator U5 are grounded, pin 3 of comparator U5 is connected to pin 6 of amplifier U4B via resistor R18, pin 4 of amplifier U4B is grounded, pin 8 of amplifier U4B is connected to a 3.3V power supply, a resistor R20 is connected between pins 6 and 7 of amplifier U4B, pin 5 of amplifier U4B is connected to an external control signal, a resistor R19 is connected between pins 3 and 5 of comparator U5, and pin 5 of comparator U2 is connected to a trigger output circuit.

[0009] In this way, the DC power supply outputs a low-level threshold signal to amplifier U4A, while the external control signal is input to amplifier U4B. After the signal is amplified by the amplifier, the two voltage signals are compared by the comparator. When the external control signal is higher than the low-level threshold signal, the comparator outputs a high level; when the external control signal is lower than the low-level threshold signal, the comparator outputs a low level.

[0010] As a further improvement of this utility model, the trigger output circuit includes a JK flip-flop U3. Pin 1 of the JK flip-flop U3 is connected to a 3.3V power supply via resistor R9. Pins 2 and 3 of the JK flip-flop U3 are connected to ground via resistors R10 and R11 respectively. Pin 8 of the JK flip-flop U3 is grounded. Pins 11 and 12 of the JK flip-flop U3 are connected to ground via resistors R14 and R13 respectively. Pin 13 of the JK flip-flop U3 is connected to a 3.3V power supply via resistor R12. Pin 16 of the JK flip-flop U3 is connected to a 3.3V power supply. The PRE pin of the JK flip-flop U3 is connected to pin 5 of comparator U2. The CLK pin of the JK flip-flop U3 is connected to pin 5 of comparator U5. The Q pin of the JK flip-flop U3 is connected to a switch.

[0011] Thus, when the external control signal is higher than the two sets of thresholds, the Q pin of the trigger outputs "1". When the digital signal is lower than the high threshold or higher than the low threshold, the Q pin output of the trigger remains unchanged. When the digital signal is lower than the two sets of thresholds, the Q pin output of the trigger is "0". Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the high-level threshold comparison circuit of this utility model.

[0013] Figure 2 This is a schematic diagram of the low-level threshold comparison circuit of this utility model.

[0014] Figure 3 This is a schematic diagram of the trigger output circuit of this utility model.

[0015] Figure 4 This is a waveform diagram of the threshold comparison of this utility model. Detailed Implementation

[0016] The present invention will be further described below with reference to the accompanying drawings:

[0017] like Figure 1-4 The configurable high and low threshold digital output circuit shown includes a high-level threshold comparison circuit and a low-level threshold comparison circuit, both of which are connected to a trigger output circuit.

[0018] The high-level threshold comparator circuit includes amplifier U1A. Pin 4 of amplifier U1A is grounded, pin 8 of amplifier U1A is connected to a 3.3V power supply, pin 3 of amplifier U1A is connected to an external control signal, a resistor R1 is connected between pins 2 and 1 of amplifier U1A, pin 2 of amplifier U1A is connected to pin 1 of comparator U2 via resistor R2, pin 4 of comparator U2 is grounded via capacitor C1, pins 2 and 6 of comparator U2 are grounded, pin 3 of comparator U2 is connected to pin 6 of amplifier U1B via resistor R4, pin 4 of amplifier U1B is grounded, pin 8 of amplifier U1B is connected to a 3.3V power supply, a resistor R7 is connected between pins 6 and 7 of amplifier U1B, pin 5 of amplifier U1B is connected to the high-level output terminal of the DC power supply, a resistor R6 is connected between pins 3 and 5 of comparator U2, and pin 5 of comparator U2 is connected to the trigger output circuit.

[0019] The low-level threshold comparator circuit includes amplifier U4A. Pin 4 of amplifier U4A is grounded. Pin 8 of amplifier U4A is connected to a 3.3V power supply. Pin 3 of amplifier U4A is connected to the low-level output terminal of the DC power supply. Resistor R15 is connected between pins 2 and 1 of amplifier U4A. Pin 2 of amplifier U4A is connected to pin 1 of comparator U5 via resistor R16. Pin 4 of comparator U5 is grounded via capacitor C1. Pins 2 and 6 of comparator U5 are grounded. Pin 3 of comparator U5 is connected to pin 6 of amplifier U4B via resistor R18. Pin 4 of amplifier U4B is grounded. Pin 8 of amplifier U4B is connected to a 3.3V power supply. Resistor R20 is connected between pins 6 and 7 of amplifier U4B. Pin 5 of amplifier U4B is connected to an external control signal. Resistor R19 is connected between pins 3 and 5 of comparator U5. Pin 5 of comparator U2 is connected to the trigger output circuit.

[0020] The trigger output circuit includes a JK flip-flop U3. Pin 1 of the JK flip-flop U3 is connected to a 3.3V power supply via resistor R9. Pins 2 and 3 of the JK flip-flop U3 are connected to ground via resistors R10 and R11 respectively. Pin 8 of the JK flip-flop U3 is grounded. Pins 11 and 12 of the JK flip-flop U3 are connected to ground via resistors R14 and R13 respectively. Pin 13 of the JK flip-flop U3 is connected to a 3.3V power supply via resistor R12. Pin 16 of the JK flip-flop U3 is connected to a 3.3V power supply. The PRE pin of the JK flip-flop U3 is connected to pin 5 of comparator U2. The CLK pin of the JK flip-flop U3 is connected to pin 5 of comparator U5. The Q pin of the JK flip-flop U3 is connected to a switch.

[0021] In this invention, a high-level threshold signal ADC_H is supplied to the amplifier U1B of the high-level threshold comparison circuit via a DC power supply. When the external control signal ANALOG_FREQ is input to the amplifier U1A, it is compared by the comparator U2. When ANALOG_FREQ is higher than ADC_H, the comparator U2 outputs FREQ_H as low level; when ANALOG_FREQ is lower than ADC_H, the comparator U2 outputs FREQ_H as high level.

[0022] A DC power supply provides a low-level threshold signal ADC_L to amplifier U4A in the low-level threshold comparator circuit. When an external control signal is input to amplifier U4B from ANALOG_FREQ, it is compared by comparator U5. When ANALOG_FREQ is higher than ADC_L, comparator U5 outputs FREQ_L as high; when ANALOG_FREQ is lower than ADC_L, comparator U5 outputs FREQ_L as low.

[0023] Next, connect FREQ_H and FREQ_L to the PRE and CLR pins of JK flip-flop U3. When the external control signal ANALOG_FREQ is higher than the high-level threshold signal of ADC_H and the low-level threshold signal of ADC_L, the input value of the PRE pin of JK flip-flop U3 is "0", the input value of the CLR pin is "1", and the output value of the Q pin of JK flip-flop U3 is "1". When the digital signal ANALOG_FREQ is lower than the high-level threshold signal of ADC_H and higher than the low-level threshold signal of ADC_L, the input value of the PRE pin of JK flip-flop U3 is "1", the input value of the CLR pin is also "1", and the output value of the Q pin of JK flip-flop U3 remains unchanged. When the digital signal ANALOG_FREQ is lower than the high-level threshold signal of ADC_H and the low-level threshold signal of ADC_L, the input value of the PRE pin of JK flip-flop U3 is "1", the input value of the CLR pin is "0", and the output value of the Q pin of JK flip-flop U3 is "0".

[0024] The following is a detailed explanation using iron chain production equipment as an example.

[0025] During the chain production process, chain factories need to use sensors to measure the tensile force exerted on the chain during manufacturing. Because the tensile force varies, the voltage value of the digital signal (external control signal) output by the sensor will also vary. There is an upper limit and a lower limit to the tensile force during chain manufacturing; exceeding the upper limit requires stopping the machine, otherwise the chain may break.

[0026] The high-level threshold signal output by the DC power supply corresponds to the upper limit value, while the low-level threshold signal output by the power supply corresponds to the lower limit value. The digital signal output by the sensor is the external control signal.

[0027] When the external control signal is higher than the high-level threshold signal and the low-level threshold signal, the JK flip-flop U3 outputs a high-level switching signal, causing the device switch to open, thus ensuring that the chain will not break or deform. When the external control signal is between the high-level threshold signal and the low-level threshold signal, the switching signal output by the JK flip-flop U3 remains unchanged, that is, the switching state will not change, and it will remain in the same state as before. When the external control signal is lower than the high-level threshold signal and the low-level threshold signal, the JK flip-flop U3 outputs a low-level switching signal, and the switch is closed and turned on.

[0028] This invention uses a JK flip-flop to output high or low level signals to control the switching state of external devices. It has a fast response speed, stable output, and configurable high and low level thresholds, making it suitable for various application scenarios.

[0029] This utility model is not limited to the above embodiments. Based on the technical solutions disclosed herein, those skilled in the art can make some substitutions and modifications to some of the technical features without creative labor, and these substitutions and modifications are all within the protection scope of this utility model.

Claims

1. A configurable high and low threshold digital output circuit, characterized in that: It includes a high-level threshold comparison circuit and a low-level threshold comparison circuit, both of which are connected to the trigger output circuit; The high-level threshold comparator circuit includes amplifier U1A. Pin 4 of amplifier U1A is grounded, pin 8 of amplifier U1A is connected to a 3.3V power supply, pin 3 of amplifier U1A is connected to an external control signal, a resistor R1 is connected between pins 2 and 1 of amplifier U1A, pin 2 of amplifier U1A is connected to pin 1 of comparator U2 via resistor R2, pin 4 of comparator U2 is grounded via capacitor C1, pins 2 and 6 of comparator U2 are grounded, pin 3 of comparator U2 is connected to pin 6 of amplifier U1B via resistor R4, pin 4 of amplifier U1B is grounded, pin 8 of amplifier U1B is connected to a 3.3V power supply, a resistor R7 is connected between pins 6 and 7 of amplifier U1B, pin 5 of amplifier U1B is connected to the high-level output terminal of the DC power supply, a resistor R6 is connected between pins 3 and 5 of comparator U2, and pin 5 of comparator U2 is connected to the trigger output circuit. The low-level threshold comparator circuit includes amplifier U4A. Pin 4 of amplifier U4A is grounded. Pin 8 of amplifier U4A is connected to a 3.3V power supply. Pin 3 of amplifier U4A is connected to the low-level output terminal of the DC power supply. Resistor R15 is connected between pins 2 and 1 of amplifier U4A. Pin 2 of amplifier U4A is connected to pin 1 of comparator U5 via resistor R16. Pin 4 of comparator U5 is grounded via capacitor C1. Pins 2 and 6 of comparator U5 are grounded. Pin 3 of comparator U5 is connected to pin 6 of amplifier U4B via resistor R18. Pin 4 of amplifier U4B is grounded. Pin 8 of amplifier U4B is connected to a 3.3V power supply. Resistor R20 is connected between pins 6 and 7 of amplifier U4B. Pin 5 of amplifier U4B is connected to an external control signal. Resistor R19 is connected between pins 3 and 5 of comparator U5. Pin 5 of comparator U2 is connected to the trigger output circuit. The trigger output circuit includes a JK flip-flop U3. Pin 1 of the JK flip-flop U3 is connected to a 3.3V power supply via resistor R9. Pins 2 and 3 of the JK flip-flop U3 are connected to ground via resistors R10 and R11 respectively. Pin 8 of the JK flip-flop U3 is grounded. Pins 11 and 12 of the JK flip-flop U3 are connected to ground via resistors R14 and R13 respectively. Pin 13 of the JK flip-flop U3 is connected to a 3.3V power supply via resistor R12. Pin 16 of the JK flip-flop U3 is connected to a 3.3V power supply. The PRE pin of the JK flip-flop U3 is connected to pin 5 of comparator U2. The CLK pin of the JK flip-flop U3 is connected to pin 5 of comparator U5. The Q pin of the JK flip-flop U3 is connected to a switch.

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