Board arrangement structure for improving wiring isolation and circuit board
By designing the layout of the dielectric layer, ground plane, metal ground hole, metal layer and power dissipation device, a shielding wall is formed, which solves the problems of poor isolation improvement and high cost in the existing technology of microstrip lines, and achieves better isolation effect and low cost.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-20
- Publication Date
- 2026-03-06
AI Technical Summary
In existing technologies, methods to improve the isolation between microstrip lines are either less effective or involve more processes and higher costs.
Design a PCB structure including a dielectric layer, a ground plane, a microstrip line, a metal ground hole, a metal layer, and energy-consuming devices. By connecting and arranging these components, multiple shielding walls are formed to improve isolation, prevent the propagation of magnetic and electric fields, and consume energy.
This achieves better isolation while avoiding additional processes and reducing costs, thus improving the isolation between microstrip lines.
Smart Images
Figure CN223978808U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of wireless communication technology, and in particular to a PCB layout structure and circuit board that improves trace isolation. Background Technology
[0002] The PCB layout mainly consists of a ground plane, a dielectric layer, and two microstrip lines spaced apart from and coupled to each other for transmitting radio frequency signals. One microstrip line acts as an interference source, and the other as an interference receiver. Figure 1 As shown, the microstrip line, acting as an interference source, radiates energy into space and couples to the microstrip line of the disturbed object through the magnetoelectric effect, thereby causing interference.
[0003] Existing technologies for reducing spatial coupling of radio frequency traces and improving isolation between two microstrip lines mainly include metal ground plane and spatial metal grid methods. For example... Figure 2 As shown, the metal grounding method involves adding a metal ground plane between the interference source and the affected object. The metal ground plane is connected to the adjacent floor via ground vias, thereby transforming the microstrip line model into a coplanar waveguide model to reduce the spatial radiation of the interference source; combined with... Figure 3 and Figure 4 As shown, the spatial metal grid method is based on a metal ground plane method, with multiple arched metal lines evenly spaced at certain intervals. The distance between two adjacent arched metal lines is generally less than one-tenth of the wavelength. After the dielectric layer is encapsulated, it needs to be polished to the required thickness to form a Faraday cage, thereby blocking the propagation of unwanted signals in space. Figure 4 The arched metal line extending perpendicular to the direction of the microstrip line is only for illustrative purposes; in actual applications, the arched metal line extends parallel to the direction of the microstrip line.
[0004] While the aforementioned metal ground plane method is easy to implement, the presence of a metal shield or metal shielding layer above the microstrip line creates a cavity, which weakens the effect of the metal ground plane and enhances the spatial coupling effect, resulting in reduced isolation between the two microstrip lines and failing to achieve the desired effect. Although the aforementioned spatial metal grid method can better reduce the spatial coupling effect and improve the isolation between the two microstrip lines, it requires additional packaging processes, and the solder joints of the metal wire bonding on the dielectric layer need to be treated with nickel-palladium-gold, which increases the number of processes and costs. Utility Model Content
[0005] To address the shortcomings of the existing technology, this utility model proposes a PCB layout structure and circuit board that improves the isolation of traces, thereby solving the problem that the existing trace layout structures either have a weak improvement effect or increase the number of processes and costs in order to improve the isolation between two microstrip lines.
[0006] To address the aforementioned technical problems, in a first aspect, this utility model provides a PCB structure for improving wiring isolation, comprising a dielectric layer, two ground planes fixed to the bottom surface of the dielectric layer and spaced apart from each other, two microstrip lines fixed to the top surface of the dielectric layer and coupled to each other, a first metal ground hole and a second metal ground hole extending from the bottom surface of the dielectric layer to its top surface and spaced apart from each other, a first metal layer fixed to the top surface of the dielectric layer and positioned opposite one of the ground planes, a second metal layer fixed to the top surface of the dielectric layer and positioned opposite the other ground plane, and a power dissipation device connecting the first metal layer and the second metal ground hole; the first metal ground hole and the second metal ground hole are both located between the two microstrip lines, the first metal ground hole connecting the first metal layer and the ground plane opposite it, and the second metal ground hole connecting the second metal layer and the ground plane opposite it.
[0007] Preferably, the number of the first metal ground via, the second metal ground via, the first metal layer, the second metal layer, and the power-consuming device are the same and each includes multiple vias. The multiple first metal ground vias, the multiple second metal ground vias, the multiple first metal layers, the multiple second metal layers, and the multiple power-consuming devices are all arranged at intervals along the extension direction of the microstrip line. Each first metal ground via connects one of the first metal layers that are arranged opposite each other to the ground plane. Each second metal ground via connects one of the second metal layers that are arranged opposite each other to the ground plane. Each power-consuming device is connected to a pair of adjacent first metal layers and a pair of second metal layers.
[0008] Preferably, the power-consuming device is a wire-wound chip resistor, and the coil of the wire-wound chip resistor is perpendicular to the extension direction of the microstrip line.
[0009] Preferably, the energy-consuming device is a magnetic bead.
[0010] Preferably, both floors are rectangular; the plurality of first metal ground holes, the plurality of second metal ground holes, the plurality of first metal layers, the plurality of second metal layers, and the plurality of energy-consuming devices are arranged at equal intervals.
[0011] Preferably, each of the floorboards includes a rectangular portion and an extension formed by the rectangular portion protruding toward another floorboard, the extension of each floorboard extending between two adjacent extensions on another floorboard; the first metal layer is disposed opposite to the extension of one of the floorboards, and the second metal layer is disposed opposite to the extension of the other floorboard.
[0012] Secondly, this utility model provides a circuit board that includes the circuit board structure described above for improving trace isolation.
[0013] Compared with the prior art, the cable routing isolation improvement board structure in this utility model is designed with two mutually spaced floor panels, and the two floor panels are connected in sequence through a first metal ground hole, a first metal layer, a power dissipation device, a second metal layer, and a second metal ground hole. This makes the cable routing isolation improvement board structure have a better isolation effect than the metal flooring method, and it does not require additional processes and has a lower cost than the spatial metal grid method. Attached Figure Description
[0014] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description in conjunction with the following drawings. In the drawings:
[0015] Figure 1 A cross-sectional schematic diagram of a wiring board structure provided for the prior art;
[0016] Figure 2 A schematic cross-sectional view of a cable routing board structure using a metal flooring method, provided for existing technology;
[0017] Figure 3 A cross-sectional schematic diagram of the wiring board structure before encapsulation in the existing space metal grid method;
[0018] Figure 4 A cross-sectional schematic diagram of a wiring board structure provided by the prior art, after encapsulation and polishing;
[0019] Figure 5 A cross-sectional schematic diagram of a fabric plate structure for improving cable isolation provided in an embodiment of this utility model;
[0020] Figure 6 A schematic diagram of a first arrangement of the floor, microstrip line, first metal ground hole, second metal ground hole, and energy-consuming device in a PCB layout structure for improving trace isolation provided in an embodiment of this utility model;
[0021] Figure 7 This is a schematic diagram of a second arrangement of the floor, microstrip line, first metal ground hole, second metal ground hole, and energy-consuming device in a PCB structure for improving trace isolation provided in an embodiment of this utility model.
[0022] Among them, 100 is a PCB structure that improves the isolation of traces; 1 is a dielectric layer; 2 is a ground plane; 21 is a rectangular section; 22 is an extension section; 3 is a microstrip line; 4 is a first metal ground hole; 5 is a second metal ground hole; 6 is a first metal layer; 7 is a second metal layer; 8 is a power-consuming device; and 9 is a package. Detailed Implementation
[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings of this application, are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings of this application are used to distinguish different objects, not to describe a particular order.
[0024] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0026] Example 1
[0027] This utility model embodiment provides a fabric board structure 100 that improves the isolation of wiring, combined with Figure 5 As shown, it includes a dielectric layer 1, two ground planes 2 fixed to the bottom surface of the dielectric layer 1 and spaced apart from each other, two microstrip lines 3 fixed to the top surface of the dielectric layer 1 and coupled to each other, a first metal ground hole 4 and a second metal ground hole 5 extending from the bottom surface of the dielectric layer 1 to its top surface and spaced apart from each other, a first metal layer 6 fixed to the top surface of the dielectric layer 1 and positioned opposite one of the ground planes 2, a second metal layer 7 fixed to the top surface of the dielectric layer 1 and positioned opposite the other ground plane 2, and a power dissipation device 8 connecting the first metal layer 6 and the second metal layer 7.
[0028] In this structure, dielectric layer 1 is an insulating layer; the first metal layer 6 and the second metal layer 7 are both metal layers; one of the microstrip lines 3 serves as an interference source, also known as an interference source trace, such as... Figure 5 Microstrip line 3 on the left, and another microstrip line 3 as the disturbed body, also called the disturbed body trace, such as... Figure 5 The right microstrip line 3 in the middle; the floor 2 is also called the ground plane or ground plane.
[0029] The first metal ground hole 4 and the second metal ground hole 5 are both located between the two microstrip lines 3. The first metal ground hole 4 connects the first metal layer 6 and the ground plane 2 directly opposite it, and the second metal ground hole 5 connects the second metal layer 7 and the ground plane 2 directly opposite it.
[0030] The energy flow direction of the two floor 2 is as follows Figure 5 As shown by the dashed line a in the diagram, energy flows from one floor 2 through the first metal ground hole 4, the first metal layer 6, the energy-consuming device 8, the second metal layer 7, and the second metal ground hole 5 to the other floor 2. The energy is consumed during the propagation process, which is equivalent to the two floor 2 being electrically connected through the first metal ground hole 4, the first metal layer 6, the energy-consuming device 8, the second metal layer 7, and the second metal ground hole 5.
[0031] The number of first metal ground vias 4, second metal ground vias 5, first metal layers 6, second metal layers 7, and power dissipation devices 8 are all the same, and each includes multiple first metal ground vias 4, multiple second metal ground vias 5, multiple first metal layers 6, multiple second metal layers 7, and multiple power dissipation devices 8 are arranged at intervals along the extension direction of the microstrip line 3. Each first metal ground via 4 connects one of its opposite first metal layers 6 to the ground plane 2, each second metal ground via 5 connects one of its opposite second metal layers 7 to the ground plane 2, and each power dissipation device 8 connects to a pair of adjacent first metal layers 6 and second metal layers 7. By designing multiple first metal ground vias 4, second metal ground vias 5, first metal layers 6, second metal layers 7, and power dissipation devices 8, the isolation or isolation effect between the two microstrip lines 3 can be improved.
[0032] Multiple power-consuming devices 8 can form an isolation wall between two microstrip lines 3.
[0033] To further improve the isolation between the two microstrip lines 3, the spacing between multiple first metal ground holes 4, multiple second metal ground holes 5, multiple first metal layers 6, multiple second metal layers 7, and multiple power dissipation devices 8 can be reduced to form a denser shielding wall, thereby further improving the isolation between the two microstrip lines 3.
[0034] Correspondingly, the spacing between the multiple first metal ground holes 4 and the multiple second metal ground holes 5 also needs to be reduced accordingly.
[0035] The power dissipation device 8 is a wire-wound surface mount resistor or a ferrite bead. If a wire-wound surface mount resistor is selected as the power dissipation device 8, the coil of the wire-wound surface mount resistor is perpendicular to the extension direction of the microstrip line 3 to provide shielding for the air passage space. In addition, the package height of the wire-wound surface mount resistor needs to be as high as possible to improve the isolation between the two microstrip lines 3.
[0036] like Figure 6 As shown, in a design of the PCB structure 100 for improving wiring isolation, the two floor plates 2, the first metal ground hole 4, the second metal ground hole 5, the first metal layer 6, the second metal layer 7, and the energy-consuming device 8 are all rectangular; the multiple first metal ground holes 4, multiple second metal ground holes 5, multiple first metal layers 6, multiple second metal layers 7, and multiple energy-consuming devices 8 are arranged at equal intervals. For ease of explanation, Figure 6 Only four first metal ground holes 4, four second metal ground holes 5, and four power-consuming devices 8 are shown.
[0037] like Figure 7 As shown, in a design of the PCB structure 100 for improving wiring isolation, there are two floor plates 2, a first metal ground hole 4, a second metal ground hole 5, a first metal layer 6, a second metal layer 7, and a power-consuming device 8. Each floor plate 2 includes a rectangular portion 21 and an extension portion 22 extending from the rectangular portion 21 toward the other floor plate 2. The extension portion 22 of each floor plate 2 extends to the space between two adjacent extension portions 22 on the other floor plate 2. The first metal layer 6 is positioned opposite the extension portion 22 of one of the floor plates 2, and the second metal layer 7 is positioned opposite the extension portion 22 of the other floor plate 2. For ease of explanation, Figure 7 Only two first metal ground holes 4, two second metal ground holes 5, and two power dissipation devices 8 are shown. This staggered arrangement allows for the placement of more power dissipation devices 8, thereby further improving the isolation between the two microstrip lines 3. Of course, the shape of the ground plane 2 can also be other forms depending on actual needs.
[0038] When a radio frequency signal passes through microstrip line 3, which acts as an interference source, three interference paths exist: the first is the propagation of the spatial magnetic field outside the metal layer, such as... Figure 5 The dashed line b in the diagram represents the second line, which shows the propagation of the cavity magnetic field between the metal layer and the ground plane 2. Figure 5 The dashed line c in the diagram represents the third line, which represents the propagation of the electric field or energy along the two floor 2s, as shown in the diagram. Figure 5 The dashed line 'a' in the diagram is shown.
[0039] In the spatial magnetic field propagation process, the energy-consuming device 8 forms a shield between the two microstrip lines 3 to prevent the magnetic field from propagating to the microstrip line 3, which is the affected object. During the cavity magnetic field propagation process, the first metal ground via 4 and the second metal ground via 5 form a barrier to prevent the cavity magnetic field from propagating to the microstrip line 3, which is the affected object. For radio frequency signals below 6 GHz, the spacing between the multiple first metal ground vias 4 and the multiple second metal ground vias 5 is much less than one-tenth of the wavelength; that is, the spacing between two adjacent first metal ground vias 4, the spacing between the first metal ground vias 4 and the second metal ground vias 5, and the spacing between two adjacent second metal ground vias 5 are all much less than one-tenth of the wavelength, forming a Faraday cage. During the electric field propagation process, the propagation path is blocked by the separating band, i.e., the spacing between the two ground planes 2. Energy enters the energy-consuming device 8 along the low-resistance path and is converted into heat to prevent the electric field from propagating to the microstrip line 3, which is the affected object. This achieves a high degree of isolation between the two microstrip lines 3.
[0040] Of course, after the above-mentioned devices are installed and fixed, the PCB structure 100 for improving the isolation of the wiring in this embodiment also needs to be encapsulated on the side of the dielectric layer 1 away from the floor 2 to form an encapsulation body 9.
[0041] Compared with the prior art, the wiring isolation improvement board structure 100 in this embodiment is designed with two mutually spaced floor 2s, and the two floor 2s are connected in sequence through a first metal ground hole 4, a first metal layer 6, an energy-dissipating device 8, a second metal layer 7, and a second metal ground hole 5. This makes the wiring isolation improvement board structure 100 have a better isolation effect than the metal flooring method, and it does not require additional processes and has a lower cost than the spatial metal grid method. In addition, compared with simply blocking the interference path, by spacing the two floor 2s and using the energy-dissipating device 8 to bridge both sides of the separation strip, energy consumption measures are fundamentally provided.
[0042] Example 2
[0043] This embodiment provides a circuit board that includes the PCB layout structure for improving trace isolation as described in Embodiment 1. Since the circuit board in this embodiment includes the PCB layout structure for improving trace isolation as described in Embodiment 1, it can also achieve the same technical effects as the PCB layout structure for improving trace isolation in Embodiment 1, and will not be elaborated further here.
[0044] It should be noted that the various embodiments described above with reference to the accompanying drawings are only illustrative of the present invention and not intended to limit its scope. Those skilled in the art should understand that any modifications or equivalent substitutions made to the present invention without departing from its spirit and scope should be covered within the scope of the present invention. Furthermore, unless the context otherwise requires, singular terms include plural forms, and vice versa. Additionally, unless specifically stated otherwise, all or part of any embodiment may be used in conjunction with all or part of any other embodiment.
Claims
1. A printed circuit board structure for improving the isolation of routing lines, characterized in that, The board structure for improving the isolation degree of the wiring includes a dielectric layer, two floors fixed on the bottom surface of the dielectric layer and spaced from each other, two microstrip lines fixed on the top surface of the dielectric layer and coupled to each other, a first metal via hole and a second metal via hole penetrating through the bottom surface to the top surface of the dielectric layer and spaced from each other, a first metal layer fixed on the top surface of the dielectric layer and arranged opposite to one of the floors, a second metal layer fixed on the top surface of the dielectric layer and arranged opposite to the other floor, and an energy consumption device connecting the first metal layer and the second metal layer; the first metal via hole and the second metal via hole are located between the two microstrip lines, the first metal via hole communicates the first metal layer and the floor opposite to the first metal layer, and the second metal via hole communicates the second metal layer and the floor opposite to the second metal layer.
2. The board structure for improving crosstalk isolation of a trace according to claim 1, wherein, The first metal via hole, the second metal via hole, the first metal layer, the second metal layer, and the energy consumption device are the same in number and each include a plurality of the first metal via hole, the second metal via hole, the first metal layer, the second metal layer, and the energy consumption device are spaced along the extension direction of the microstrip line; each first metal via hole communicates one of the first metal layers and the floor arranged opposite to each other, each second metal via hole communicates one of the second metal layers and the floor arranged opposite to each other, and each energy consumption device connects one group of the first metal layer and the second metal layer arranged adjacent to each other.
3. The board structure for improving crosstalk isolation of a trace according to claim 1, wherein, The energy consumption device is a wire-wound chip resistor, and the coil of the wire-wound chip resistor is perpendicular to the extension direction of the microstrip line.
4. The board structure for improving crosstalk isolation of a trace according to claim 1, wherein, The energy consumption device is a magnetic bead.
5. The board structure for improving crosstalk isolation of a trace according to claim 2, wherein, Both of the floors are rectangular, and the plurality of first metal via holes, the plurality of second metal via holes, the plurality of first metal layers, the plurality of second metal layers, and the plurality of energy consumption devices are arranged at equal intervals, respectively.
6. The board structure for improving crosstalk isolation of a trace according to claim 1, wherein, Each floor includes a rectangular portion and an extension portion protruding from the rectangular portion towards the other floor, and the extension portion of each floor extends between two adjacent extension portions on the other floor; the first metal layer is arranged opposite to the extension portion of one of the floors, and the second metal layer is arranged opposite to the extension portion of the other floor.
7. A circuit board, characterized by The circuit board includes the board structure for improving the isolation degree of the wiring as claimed in any one of claims 1 to 6.