Interface impedance test fixture and test system

Abstract

The utility model relates to the technical field of interface fault detection, in particular to an interface impedance test fixture and a test system, the fixture comprises a main circuit board, a single chip microcomputer, a sampling circuit and a standard acquisition head, the single chip microcomputer, the sampling circuit and the standard acquisition head are arranged on the main circuit board, and the standard acquisition head is connected with the single chip microcomputer through the sampling circuit; the standard acquisition head is used for being plugged with a to-be-tested interface, so that a pin of the standard acquisition head is connected with a pin of the to-be-tested interface; the sampling circuit is configured to obtain voltage information of each pin in the to-be-tested interface; the single-chip microcomputer is configured to receive voltage information of each pin in the to-be-tested interface and determine an impedance value of each pin in the to-be-tested interface. According to the technical scheme of the utility model, the mainboard does not need to be disassembled and assembled during the test operation, and the pins do not need to be in one-to-one butt joint operation manually during the test process, so that the test operation is simpler and faster, and the working efficiency and accuracy of the test can be improved.

Description

Technical Field

[0001] This utility model relates to the field of interface fault detection technology, and in particular to an interface impedance testing fixture and testing system. Background Technology

[0002] When troubleshooting hardware problems in electronic products, it is necessary to measure the impedance value of the input / output interface (I / O interface) pins. By measuring the impedance value of each pin, it is possible to determine whether there is a hardware fault in a certain area. Hardware faults include short circuits, open circuits, poor soldering, or burn-out. Currently, it is generally necessary to use a multimeter to measure the impedance value.

[0003] However, as motherboard integration increases and PCB components become smaller, the pins of the I / O interfaces become more concentrated, making it increasingly difficult to quickly and accurately locate the pins when using a multimeter. More often than not, it is necessary to remove the bare board or remove the components to perform the measurement.

[0004] Furthermore, in existing interface structures, pins are either hidden or numerous and densely packed. During measurement, impedance checking of each pin is required, which is time-consuming and labor-intensive. After measurement, the measurement data for each pin must be manually recorded and compared with the qualified data to identify abnormal pins.

[0005] Therefore, the existing measurement method requires disassembling the motherboard and manually locating and measuring each pin. The measurement operation is time-consuming, labor-intensive, inefficient, and prone to omissions or inaccuracies. Utility Model Content

[0006] To address at least the above-mentioned technical problems existing in the prior art, this utility model provides an interface impedance testing fixture and testing system.

[0007] This utility model provides an interface impedance testing fixture, including a main circuit board, and a microcontroller, a sampling circuit, and a standard acquisition head disposed on the main circuit board. The standard acquisition head is connected to the microcontroller through the sampling circuit. The standard acquisition head is used to plug into the interface under test, so that the pins of the standard acquisition head are connected to the pins of the interface under test. The sampling circuit is configured to acquire the voltage information of each pin in the interface under test. The microcontroller is configured to receive the voltage information of each pin in the interface under test and determine the impedance value of each pin in the interface under test.

[0008] In some embodiments, the system further includes an adapter circuit board, and an adapter interface and a connector structure disposed on the adapter circuit board, the adapter interface being connected to the connector structure; the adapter interface is used to be plugged into the standard acquisition head, and the connector structure is used to be plugged into the interface under test, wherein the standard acquisition head and the connector structure have different numbers of pins.

[0009] In some embodiments, the adapter circuit board is provided with a plurality of adapter interfaces, and the plurality of adapter interfaces are respectively connected to pins at different positions of the connector structure.

[0010] In some embodiments, the sampling circuit includes a first resistor and a second resistor connected in series, with one end of the first resistor connected to a voltage input terminal and one end of the second resistor grounded; the common terminal of the first resistor and the second resistor is connected to the microcontroller and is connected to multiple pins in the interface under test through multiple branches; the sampling circuit is used to measure the voltage at the location of the common terminal of the first resistor and the second resistor.

[0011] In some embodiments, the sampling circuit further includes a switch; the switch is respectively disposed on each branch between the common terminal of the first resistor and the second resistor and the pin, and the microcontroller is used to control the on / off state of the switch.

[0012] In some embodiments, the standard acquisition head and the connector structure include an interface or gold fingers, and the standard acquisition head and the connector structure are plugged into the interface under test through the interface or the gold fingers.

[0013] In some embodiments, the standard acquisition head includes a Type-C interface; the Type-C interface includes 24 pins.

[0014] In some embodiments, a display module is also included; the display module is connected to the main circuit board and is used to display the test results of each pin in the interface under test.

[0015] In some embodiments, a storage unit is further included; the storage unit is connected to the main circuit board and is used to store test result information for each pin in the interface under test.

[0016] In another aspect, this utility model also provides a testing system, including the aforementioned interface impedance testing fixture.

[0017] This utility model provides an interface impedance testing fixture and system. During testing, a standard acquisition head is plugged into the interface under test, and multiple pins of the standard acquisition head are connected to the pins of the interface under test. The voltage information of each pin in the interface under test is acquired through a sampling circuit. Based on this voltage information, the impedance value of each pin in the interface under test is determined. This impedance value can be compared with the standard impedance value to determine whether the currently tested pin is qualified. This utility model's technical solution eliminates the need for disassembly and assembly of the motherboard during testing, and eliminates the need for manual pin-by-pin connection during the testing process, making the testing operation simpler and faster, and improving testing efficiency and accuracy. Attached Figure Description

[0018] The above and other objects, features, and advantages of the present invention will become readily apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. Several embodiments of the present invention are illustrated in the drawings by way of example and not limitation, in which:

[0019] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0020] Figure 1 A schematic block diagram of the interface impedance testing fixture provided in this embodiment of the utility model;

[0021] Figure 2 The control logic block diagram of the sampling circuit in the interface impedance testing fixture provided in this embodiment of the utility model;

[0022] Figure 3 Equivalent circuit diagram of single-channel sampling in the interface impedance testing fixture provided in this embodiment of the utility model;

[0023] Figure 4 A reference diagram showing the usage status of the interface impedance testing fixture provided in this embodiment of the utility model;

[0024] Figure 5 The interface impedance test fixture provided in this embodiment of the utility model is a test control flowchart;

[0025] Figure 6 Schematic diagram of the adapter circuit board in the interface impedance testing fixture provided in this embodiment of the utility model Figure 1 ;

[0026] Figure 7 Schematic diagram of the adapter circuit board in the interface impedance testing fixture provided in this embodiment of the utility model Figure 2 .

[0027] In the picture:

[0028] 10: Main circuit board; 20: Microcontroller; 30: Sampling circuit; 40: Standard acquisition head; 50: Interface under test; 60: Adapter circuit board; 70: Display module; 80: Storage unit; 90: USB interface; 100: Host computer;

[0029] R1: First resistor; R2: Second resistor; U0: Voltage input terminal; U A Voltage at the common terminal;

[0030] 51: Type-C interface; 52: DIMM slot interface; 53: HDMI interface; 54: VGA interface;

[0031] 61: Adapter; 62: Connector structure. Detailed Implementation

[0032] To make the objectives, features, and advantages of this utility model more apparent and understandable, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0033] This utility model provides an interface impedance testing fixture, including a main circuit board, a microcontroller, a sampling circuit, and a standard acquisition head mounted on the main circuit board. During testing, the standard acquisition head is plugged into the interface under test, so that the pins of the standard acquisition head are in contact with the pins of the interface under test and conduction occurs. Then, the voltage information of the pins of the interface under test is collected by the sampling circuit. The microcontroller calculates the impedance value of the current test pin based on the voltage information and compares the impedance value with the correct impedance value. Based on the comparison result, the location of the abnormal pin is determined.

[0034] The following description, in conjunction with the accompanying drawings, details the various structures of the interface impedance testing fixture provided in the embodiments of this utility model, as well as the positional and connection relationships between these structures.

[0035] like Figures 1 to 7 As shown, the standard acquisition head 40 is connected to the microcontroller 20 through the sampling circuit 30. The standard acquisition head 40 is used to connect to the interface under test 50, so that the pins of the standard acquisition head 40 are connected to the pins of the interface under test 50. The standard acquisition head 40 includes multiple pins, which correspond one-to-one with the multiple pins of the structure under test. Then, the voltage information of each pin is measured and the impedance value is calculated.

[0036] For example, the standard acquisition head 40 includes a Type-C interface; the Type-C interface includes 24 pins. The Type-C interface is widely used on motherboards, and its number of pins can be adapted to multiple types of interfaces. Therefore, the standard acquisition head 40 can use a Type-C interface; that is, the interface under test 50 is a Type-C interface 51.

[0037] In this embodiment of the present invention, when the Type-C interface is incompatible with the connected interface under test 50, such as when the number of pins is different and the pins cannot be matched one-to-one, an interface conversion can be performed through an adapter circuit board 60 to achieve compatibility between the interfaces. The adapter circuit board 60 is provided with an adapter interface 61 and a connector structure 62. The adapter interface 61 is used to connect to the standard acquisition head 40, and the connector structure 62 is used to connect to the interface under test 50.

[0038] For example, if the interface under test 50 is an HDMI interface 53 or a VGA interface 54, the Type-C interface of the standard acquisition head 40 cannot be directly connected to the HDMI interface 53 or VGA interface 54. Therefore, an adapter circuit board 60 can be used. The adapter interface 61 on the adapter circuit board 60 is a Type-C interface, and the connector structure 62 is an HDMI interface 53 or a VGA interface 54. In use, connect the Type-C interface 51 (male) on the main circuit board 10 to the Type-C interface (female) on the adapter circuit board 60, and then connect the HDMI interface 53 or VGA interface 54 of the adapter circuit board 60 to the interface under test 50. This improves the versatility of the interface impedance test fixture.

[0039] In this embodiment of the invention, the adapter circuit board 60 is provided with multiple adapter interfaces 61, which are respectively connected to pins at different positions of the connector structure 62. For example, the interface to be tested 50 is a DIMM strip interface 52, which includes 288 pins, while the Type-C interface 51 includes 24 pins. Therefore, multiple adapter interfaces 61, i.e., multiple Type-C interfaces, are correspondingly provided on the adapter circuit board 60. The specific number of Type-C interfaces can be determined according to the relationship between the number of DIMM strip interfaces 52 and the number of Type-C interfaces, i.e., 288 / 24 = 12. Therefore, 12 Type-C interfaces are provided on the adapter circuit board 60. During testing, the Type-C interfaces 51 on the main circuit board 10 are sequentially plugged into the Type-C interfaces at different positions on the adapter circuit board 60, thereby completing the testing of pins at different positions until all pins are tested.

[0040] In this embodiment of the invention, the standard acquisition head 40 and the connector structure 62 include an interface or gold fingers. The standard acquisition head 40 and the connector structure 62 are connected to the interface under test 50 through the interface or gold fingers. The standard acquisition head 40 and the connector structure 62 can adopt an interface structure or a gold finger structure, both of which can complete the connection with the structure under test, and the pins can make contact.

[0041] Continue to refer to Figures 1 to 7 As shown, the sampling circuit 30 is configured to acquire the voltage information of each pin in the interface under test 50, and the microcontroller 20 is configured to receive the voltage information of each pin in the interface under test 50. The resistance value of the pin can be calculated based on this voltage information, and the impedance value of each pin in the interface under test 50 can be determined based on this resistance value. That is, the microcontroller 20 includes an acquisition module, a calculation module, and a comparison module. The acquisition module acquires the voltage information, the calculation module calculates the resistance value and determines the impedance value, and then the comparison module compares the calculated impedance value with a standard impedance value. Specifically:

[0042] The sampling circuit 30 includes a first resistor R1 and a second resistor R2, which are connected in series. One end of the first resistor R1 is connected to the voltage input terminal U0, and one end of the second resistor R2 is grounded. The common terminal of the first resistor R1 and the second resistor R2 is connected to the microcontroller 20, and is connected to multiple pins in the interface under test 50 through multiple branches. The sampling circuit 30 is used to measure the voltage U at the common terminal of the first resistor R1 and the second resistor R2. A .

[0043] According to the single-channel sampling equivalent circuit, it can be seen that in measuring and acquiring voltage U A Then, R can be obtained through calculation. x The value is calculated using the following formula:

[0044]

[0045] Wherein, the input voltage U O Resistors R1 and R2 are both known, while U A The collected values ​​can then be used to calculate the output R. x The value.

[0046] In this embodiment of the present invention, the sampling circuit 30 further includes a switch SW; a switch SW is respectively provided on each branch between the common terminal and the pin of the first resistor R1 and the second resistor R2, and the microcontroller 20 is used to control the on and off of the switch.

[0047] During the test, only the switch of the pin currently being tested is in the open state, while all other switches are in the closed state. The switches are turned on and off one by one to complete the test of pins at different locations.

[0048] like Figure 2 and Figure 5 As shown, the sampling circuit 30 includes 24 branches, each with a corresponding switch, totaling 24 switches: SW1, SW2, SW3...SW24. During the test, the first switch SW1 is turned on, and the remaining switches are turned off. After completing the actions of acquiring voltage, performing logic calculations, and outputting results, the first switch SW1 is turned off, the second switch SW2 is turned on, and the remaining switches (including the first switch SW1) are turned off. This process is repeated to control the opening and closing of switches at different positions until the test of all branches is completed.

[0049] In this embodiment of the present invention, the interface impedance test fixture further includes a display module 70; the display module 70 is connected to the main circuit board 10 and is used to display the test results of each pin in the interface under test 50.

[0050] For example, the correct numerical information is displayed on display module 70. After the test is completed, display module 70 can display the actual test numerical information. The two sets of numerical information are set side by side, allowing staff to intuitively determine the comparison results. For example, when the difference between the test numerical information and the correct numerical information exceeds the set range, a highlighting mode can be used to provide a prompt, such as using a red numerical indicator light.

[0051] In this embodiment of the present invention, the interface impedance test fixture further includes a storage unit 80; the storage unit 80 is connected to the main circuit board 10, and the storage unit 80 is used to store the test result information of each pin in the interface under test 50.

[0052] The test results are stored in storage unit 80, which allows for timely storage of test results and can be used for data traceability and historical data retrieval.

[0053] For example, the interface impedance test fixture is also connected to a host computer 100. Test results can be stored on the host computer 100, or stored in the storage unit 80, or the storage unit 80 can store the test results on the host computer 100. The interface impedance test fixture is connected to the host computer 100 via a USB interface 90, thereby enabling data storage and transmission.

[0054] This utility model provides a testing system, including the aforementioned interface impedance testing fixture. When using the testing system, depending on the type of the interface 50 under test, it is determined whether to connect the adapter circuit board 60. First, the fixture is connected to a qualified motherboard to collect correct data information, which is then displayed on a screen and transmitted to the storage unit 80 or the host computer 100. Then, testing of unknown motherboards (including the motherboard of the interface under test) can be performed. The standard acquisition head 40 or connector structure 62 of the fixture is connected to the interface 50 under test to collect data, which is then displayed on a screen and transmitted to the storage unit 80 or the host computer 100.

[0055] By comparing two sets of data values, the location of abnormal pins can be quickly determined. For example, if there is a large discrepancy between the test data and the correct data, it indicates that the data is abnormal, and thus the abnormal pin can be determined.

[0056] The interface impedance testing fixture and system provided by this utility model allow for the following testing operation: During testing, a standard acquisition head 40 is plugged into the interface under test 50, and multiple pins of the standard acquisition head 40 are connected to the pins of the interface under test 50. The sampling circuit 30 acquires the voltage information of each pin in the interface under test 50, and the impedance value of each pin is determined based on this voltage information. This impedance value can be compared with the standard impedance value to determine whether the currently tested pin is qualified. This utility model's technical solution eliminates the need for disassembly and assembly of the motherboard during testing, and also eliminates the need for manual pin-to-pin connection during the testing process, making the testing operation simpler and faster, and improving testing efficiency and accuracy.

[0057] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. Furthermore, the described specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of those different embodiments or examples.

[0058] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0059] The above are merely specific embodiments of this utility model, but the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.

Claims

1. An interface impedance test fixture, comprising: The interface impedance test jig comprises a main circuit board (10), a single-chip microcomputer (20), a sampling circuit (30) and a standard collection head (40) arranged on the main circuit board (10), wherein the standard collection head (40) is connected with the single-chip microcomputer (20) through the sampling circuit (30); The standard collection head (40) is used for plugging with a to-be-tested interface (50) so that the pins of the standard collection head (40) are connected with the pins of the to-be-tested interface (50); The sampling circuit (30) is configured to acquire voltage information of each pin in the to-be-tested interface (50); The single-chip microcomputer (20) is configured to receive the voltage information of each pin in the to-be-tested interface (50) and determine impedance values of each pin in the to-be-tested interface (50).

2. The interface impedance test fixture of claim 1, wherein, The interface impedance test jig further comprises an adapter circuit board (60), an adapter interface (61) and a connector structure (62) arranged on the adapter circuit board (60), wherein the adapter interface (61) is connected with the connector structure (62); The adapter interface (61) is used for plugging with the standard collection head (40), and the connector structure (62) is used for plugging with the to-be-tested interface (50), wherein the number of pins of the standard collection head (40) is different from that of the connector structure (62).

3. The interface impedance test fixture of claim 2, wherein, A plurality of adapter interfaces (61) are arranged on the adapter circuit board (60), and the plurality of adapter interfaces (61) are respectively connected with pins at different positions of the connector structure (62).

4. The interface impedance test fixture of claim 1, wherein, The sampling circuit (30) comprises a first resistor (R1) and a second resistor (R2), the first resistor (R1) and the second resistor (R2) are connected in series, one end of the first resistor (R1) is connected with a voltage input end (U0), and one end of the second resistor (R2) is grounded; The common end of the first resistor (R1) and the second resistor (R2) is connected with the single-chip microcomputer (20), and a plurality of branches are respectively connected with a plurality of pins in the to-be-tested interface (50); The sampling circuit (30) is configured to measure a voltage (U A ) at a common terminal position of the first resistor (R1) and the second resistor (R2).

5. The interface impedance test fixture of claim 4, wherein, The sampling circuit (30) further comprises a switch; The switch is arranged between the first resistor (R1), the common end of the second resistor (R2) and the pin on each branch, and the single-chip microcomputer (20) is used for controlling on-off of the switch.

6. The interface impedance test fixture of claim 2, wherein, The standard collection head (40) and the connector structure (62) comprise an interface or a gold finger, and the standard collection head (40) and the connector structure (62) are plugged with the to-be-tested interface (50) through the interface or the gold finger.

7. The interface impedance test fixture of claim 6, wherein, The standard collection head (40) comprises a Type-C interface. The Type-C interface comprises 24 pins.

8. The interface impedance test fixture of any one of claims 1 to 7, wherein, The interface impedance test jig further comprises a display module (70); The display module (70) is connected with the main circuit board (10), and the display module (70) is used for displaying test results of each pin in the to-be-tested interface (50).

9. The interface impedance test fixture of any one of claims 1 to 7, wherein, The interface impedance test jig further comprises a storage unit (80); The storage unit (80) is connected with the main circuit board (10), and the storage unit (80) is used for storing test result information of each pin in the to-be-tested interface (50).

10. A test system, characterized by The interface impedance test jig comprises the interface impedance test jig according to any one of claims 1 to 9.

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