Proportional-integral regulator circuit and braking unit

By introducing an anti-parallel diode circuit into the proportional-integral regulator circuit, the instability problem caused by system deviation fluctuations is solved, and the stability of the integrator output and the system's noise immunity are achieved.

CN223993663UActive Publication Date: 2026-03-13SIEMENS ELECTRICAL DRIVES
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-21
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Existing proportional-integral controllers are prone to system instability when system deviation fluctuates, especially when the integrator output fluctuates continuously.

Method used

An anti-parallel diode circuit is introduced between the differential comparator circuit and the integrator circuit. The voltage drop within the diode's forward voltage range is used to keep the integrator input stable and avoid system fluctuations.

Benefits of technology

This achieves stability of the integrator output under interference and sampling signal fluctuations, improving the system's stability and immunity to disturbances.

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Abstract

The proportional-integral regulator circuit comprises a differential comparator circuit and an integrator circuit, the input end of the differential comparator circuit comprises a first input end and a second input end, the first input end is suitable for receiving a first input value, the second input end is suitable for receiving a second input value, and the integrator circuit is suitable for receiving the first input value and the second input value. The output end of the differential comparator circuit is connected with an anti-parallel diode circuit, and the output end of the anti-parallel diode circuit is connected with the input end of the integrator circuit. According to the proportional-integral regulator circuit based on the embodiment, even if a system generates certain interference or an analog acquisition signal of a first input value has certain fluctuation, as long as forward and reverse outputs of the differential comparator circuit are in a break-over voltage range of a diode, the output of an integrator is maintained in a stable state, namely, the system is in a small deviation range; therefore, system fluctuation caused by interference and sampling signal drift is avoided.
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Description

Technical Field

[0001] This utility model relates to the field of frequency converters, and more specifically, to a proportional-integral regulator circuit. Background Technology

[0002] Proportional-integral (PI) controllers are commonly used in the braking units of frequency converters. They function as both proportional and integral controllers. The proportional controller reflects the system's deviation proportionally, while the integral controller eliminates the system's steady-state error.

[0003] After the given value and feedback value pass through the differential comparator, the resulting deviation value is input to the integrator. If the difference between the given value and the feedback value is equal to 0, the integral output is relatively stable. However, if the analog acquisition of the second input value fluctuates, the output of the integrator will continue to fluctuate, thus causing the system to be unstable. Utility Model Content

[0004] In view of this, the present invention proposes a new proportional-integral regulator circuit to at least solve all or part of the above problems.

[0005] A proportional-integral regulator circuit according to an embodiment of the present invention includes a differential comparator circuit and an integrator circuit. The differential comparator circuit has a first input terminal and a second input terminal. The first input terminal is adapted to receive a first input value, and the second input terminal is adapted to receive a second input value. The output terminal of the differential comparator circuit is connected to an anti-parallel diode circuit, and the output terminal of the anti-parallel diode circuit is connected to the input terminal of the integrator circuit.

[0006] Furthermore, the anti-parallel diodes include a first diode D1 and a second diode D2. The anode of the first diode D1 is connected to the output terminal of the differential comparator circuit, and the cathode of the first diode D1 is connected to the input terminal of the integrator circuit. The cathode of the second diode D2 is connected to one end of the anode of the first diode, and the anode of the second diode D2 is connected to one end of the cathode of the first diode.

[0007] Furthermore, the first diode is a Zener diode, and / or the second diode is a Zener diode.

[0008] Furthermore, a first resistor R1 is connected in series between the output terminal of the differential comparator circuit and the input terminal of the integrator circuit.

[0009] Furthermore, the differential comparator circuit includes a first operational amplifier U1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a sixth resistor; one end of the second resistor R2 serves as the first input terminal of the differential comparator circuit, and the other end is connected to the inverting input terminal of the first operational amplifier U3; one end of the third resistor R3 serves as the second input terminal of the differential comparator circuit, and the other end is connected to the inverting input terminal of the first operational amplifier U3; one end of the fourth resistor R4 is connected to the output terminal of the first operational amplifier U3, and the other end is connected to the inverting input terminal of the first operational amplifier U3; one end of the fifth resistor R5 is connected to the inverting input terminal of the first operational amplifier U3, and the other end is grounded; one end of the sixth resistor is connected to the output terminal of the first operational amplifier U3, and the other end is used to connect to the input terminal of the integrator circuit.

[0010] Furthermore, the integrator circuit includes a second operational amplifier U2, a capacitor C1, a seventh resistor R7, and an eighth resistor R8. One end of the capacitor C1 is connected to the inverting input terminal of the second operational amplifier U2, and the other end is connected to the output terminal of the second operational amplifier U2. One end of the seventh resistor R7 is connected to the inverting input terminal of the second operational amplifier U2, and the other end is connected to the output terminal of the second operational amplifier U2. One end of the fifth resistor R5 is used to connect the input signal, and the other end is connected to the inverting input terminal of the second operational amplifier U2.

[0011] Furthermore, the first operational amplifier is an LT1001 operational amplifier, and / or the second operational amplifier is an LT1001 operational amplifier.

[0012] According to another aspect of the present invention, a braking unit is also provided, comprising any of the proportional-integral regulator circuits described in the above embodiments.

[0013] Furthermore, the braking unit is installed in the frequency converter, and the first input value of the differential comparator circuit is the voltage value of the DC bus voltage of the frequency converter.

[0014] As can be seen from the above technical solution, the proportional-integral regulator circuit and braking unit according to the present utility model embodiment, by connecting an anti-parallel diode circuit between the differential comparator circuit and the integrator circuit, ensure that even if interference occurs or the analog acquisition signal of the first input value fluctuates within the conduction voltage range of the diode, as long as the forward and reverse outputs of the differential comparator circuit are within the conduction voltage range of the diode, the output of the integrator remains stable. That is, the system is relatively stable within a small deviation range, thus avoiding system fluctuations caused by interference and sampling signal drift. Attached Figure Description

[0015] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, so that those skilled in the art can more clearly understand the above and other features and advantages of the present invention, in which:

[0016] Figure 1 This is a schematic diagram of the circuit structure of a proportional-integral controller according to an embodiment of the present invention;

[0017] Figure 2 The waveform diagram shows the circuit simulation results of a proportional-integral controller according to an embodiment of the present invention.

[0018] Figure 3 This is a circuit diagram of a proportional-integral controller according to an embodiment of the present invention applied in a braking unit and acting in a frequency converter.

[0019] The reference numerals in the attached figures are as follows:

[0020] 1. Differential comparator circuit

[0021] 2. Integrator Circuit

[0022] 3. Anti-parallel diode circuit

[0023] 4 power-consuming resistors Detailed Implementation

[0024] To make the objectives, technical solutions and advantages of this utility model clearer, the following embodiments will be used to further describe this utility model in detail.

[0025] Figure 1 This is a schematic diagram of the circuit structure of a proportional-integral controller according to an embodiment of the present invention; as shown below. Figure 1 As shown, a proportional-integral controller according to an embodiment of the present invention includes a differential comparator circuit 1 and an integrator circuit 2. The input terminals of the differential comparator circuit 1 include a first input terminal and a second input terminal. The first input terminal is adapted to receive a first input value, and the second input terminal is adapted to receive a second input value. The output terminal of the differential comparator circuit 1 is connected to an anti-parallel diode circuit 3, and the output terminal of the anti-parallel diode circuit 3 is connected to the input terminal of the integrator circuit 2.

[0026] Specifically, the first input value received at the first input terminal is an analog signal value. Compared with the circuit structure of a typical proportional-integral controller in the prior art, the proportional-integral controller of this embodiment of the present invention simulates an anti-parallel diode circuit 3 between the differential comparator circuit 1 and the integrator circuit 2. By installing the anti-parallel diode circuit 3, based on the voltage drop of the diode, within the voltage drop range, the input of the integrator is made to be 0, thereby keeping the output of the integrator unchanged and the system relatively stable.

[0027] In one possible implementation, the anti-parallel diode includes a first diode and a second diode. The anode of the first diode is connected to the output terminal of the differential comparator circuit 1, the cathode of the first diode is connected to the input terminal of the integrator circuit 2, and the cathode of the second diode is connected to one end of the anode of the first diode, and the anode of the second diode is connected to one end of the cathode of the first diode.

[0028] In this embodiment, when the forward output voltage of the differential comparator circuit 1 does not exceed the diode's forward voltage (e.g., 0.7V), the first diode D1 and the second diode D2 are in a default off state. When the forward output voltage of the differential comparator circuit 1 exceeds the diode's forward voltage (e.g., 0.7V for a silicon diode), the first diode D1 conducts. When the reverse output voltage of the differential comparator does not exceed the diode's forward voltage (e.g., 0.7V for a silicon diode), the first diode D1 and the second diode D2 are in a default off state. When the reverse output voltage of the differential comparator exceeds the diode's forward voltage (e.g., 0.7V), the second diode D2 conducts. It can be seen that within a range of ±0.7V, the first diode D1 and the second diode D2 are in a default off state; therefore, the voltage at the integrator input is 0, and the integrator output value remains stable.

[0029] In one possible implementation, the first diode is a Zener diode, and / or the second diode is a Zener diode.

[0030] In one possible implementation, a first resistor R1 is connected in series between the output of the differential comparator circuit and the input of the integrator circuit 2. Installing the first resistor R1 serves to match the load and control the signal output; for example, it limits the current at the output of the differential comparator circuit, preventing excessive output current from affecting subsequent circuits.

[0031] In one possible implementation, the differential comparator circuit 1 includes a first operational amplifier U1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. One end of the second resistor R2 serves as the first input terminal of the differential comparator circuit 1, and the other end is connected to the inverting input terminal of the first operational amplifier U3. One end of the third resistor R3 serves as the second input terminal of the differential comparator circuit 1, and the other end is connected to the inverting input terminal of the first operational amplifier U3. One end of the fourth resistor R4 is connected to the output terminal of the first operational amplifier U3, and the other end is connected to the inverting input terminal of the first operational amplifier U3. One end of the fifth resistor R5 is connected to the non-inverting input terminal of the first operational amplifier U1, and the other end is grounded.

[0032] In one possible implementation, the integrator circuit includes a second operational amplifier U2, a capacitor C1, a seventh resistor R7, and an eighth resistor R8. One end of the capacitor C1 is connected to the inverting input of the second operational amplifier U2, and the other end is connected to the output of the second operational amplifier U2. One end of the seventh resistor R7 is connected to the inverting input of the second operational amplifier U2, and the other end is connected to the output of the second operational amplifier U2. One end of the eighth resistor R8 is connected to the non-inverting input of the second operational amplifier U2, and the other end is grounded.

[0033] Based on the structure of the above embodiments, the basic circuits of the differential circuit and the integrator circuit 2 of the proportional-integral regulator circuit of this utility model are realized, thereby realizing the basic function of the proportional regulator.

[0034] In another possible implementation, the first operational amplifier U1 is an LT1001 operational amplifier, and / or the second operational amplifier U2 is an LT1001 operational amplifier. The LT1001 is a high-precision operational amplifier with characteristics such as low offset voltage and low noise, which can ensure the accuracy of the comparison results.

[0035] Figure 2 The waveform diagram shows the circuit simulation results of a proportional-integral controller according to an embodiment of the present invention.

[0036] As can be seen from the figure, when the differential output result a is not 0 but has a small amplitude output, the integrator input b is 0, and the integrator output c maintains a stable value. Since the output of the integrator remains unchanged, the system is relatively stable.

[0037] According to another aspect of the present invention, a braking unit is provided, which includes the proportional-integral regulator circuit described in the above embodiments.

[0038] Figure 3 This is a partial circuit diagram of a frequency converter to which the braking unit according to an embodiment of the present invention is applicable, as shown below. Figure 2 As shown, in this inverter circuit, the braking unit is connected to a power-dissipating resistor 4 (the braking unit is not shown in the attached figure). The first input value received by the first input terminal of the proportional-integral regulator circuit is the DC bus voltage. For example, R10 is connected to the low-voltage output terminal of the DC bus voltage monitoring circuit. The second input value received by the second input terminal is the reference voltage. Thus, when there is energy feedback, the DC voltage rises rapidly, the braking unit starts, and the power-dissipating resistor dissipates energy to prevent DC bus overvoltage.

[0039] Since the DC bus does not require precise control, it can be left uncontrolled within a certain range. The braking unit based on this utility model avoids DC voltage fluctuations caused by frequent adjustments, as well as frequent adjustments caused by sampling fluctuations and interference, thus improving the system's anti-interference capability.

[0040] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A proportional-integral regulator circuit, characterized by, The proportional integral regulator circuit comprises a differential comparator circuit (1) and an integrator circuit (2), wherein the input end of the differential comparator circuit (1) comprises a first input end and a second input end, the first input end is adapted to receive a first input value, the second input end is adapted to receive a second input value, the output end of the differential comparator circuit (1) is connected with a reverse-parallel diode circuit (3), and the output end of the reverse-parallel diode circuit (3) is connected with the input end of the integrator circuit (2).

2. The proportional-integral regulator circuit of claim 1, wherein, The reverse-parallel diode comprises a first diode D1 and a second diode D2, the anode of the first diode D1 is connected with the output end of the differential comparator circuit (1), the cathode of the first diode D1 is connected with the input end of the integrator circuit (2), the cathode of the second diode D2 is connected with one end of the anode of the first diode, and the anode of the second diode D2 is connected with one end of the cathode of the first diode.

3. The proportional-integral regulator circuit of claim 2, wherein, The first diode is a stabilized diode, and / or the second diode is a stabilized diode.

4. The proportional-integral regulator circuit of claim 1, wherein, A first resistor R1 is further connected in series between the output end of the differential comparator circuit and the input end of the integrator circuit (2).

5. The proportional-integral regulator circuit of claim 1, wherein, The differential comparator circuit (1) comprises a first operational amplifier U1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5, one end of the second resistor R2 serves as the first input end of the differential comparator circuit (1), and the other end is connected to the inverting input end of the first operational amplifier U3; one end of the third resistor R3 serves as the second input end of the differential comparator circuit (1), and the other end is connected to the inverting input end of the first operational amplifier U3; one end of the fourth resistor R4 is connected to the output end of the first operational amplifier U3, and the other end is connected to the inverting input end of the first operational amplifier U3; one end of the fifth resistor R5 is connected to the non-inverting input end of the first operational amplifier U1, and the other end is grounded.

6. The proportional-integral regulator circuit of claim 5, wherein, The integrator circuit comprises a second operational amplifier U2, a capacitor C1, a seventh resistor R7 and an eighth resistor R8, one end of the capacitor C1 is connected to the inverting input end of the second operational amplifier U2, and the other end is connected to the output end of the second operational amplifier U2; one end of the seventh resistor R7 is connected to the inverting input end of the second operational amplifier U2, and the other end is connected to the output end of the second operational amplifier U2; one end of the eighth resistor R8 is connected to the non-inverting input end of the second operational amplifier U2, and the other end is grounded.

7. The proportional-integral regulator circuit of claim 6, wherein, The first operational amplifier U1 adopts an LT1001 operational amplifier, and / or the second operational amplifier U2 adopts an LT1001 operational amplifier.

8. A brake unit, characterized by The proportional integral regulator circuit comprises the proportional integral regulator circuit as claimed in any one of claims 1 to 7.

9. The brake unit according to claim 8, characterized in that The brake unit is installed in a frequency converter, and the first input value of the differential comparator circuit (1) is the voltage value of the DC bus voltage of the frequency converter. The proportional integral regulator circuit comprises the proportional integral regulator circuit as claimed in any one of claims 1 to 7.