Optical network equipment

Abstract

The utility model provides optical network equipment, and belongs to the technical field of communication. The optical network device is applied to an FTTH or FTTR system architecture. The optical network equipment comprises a shell, a circuit board assembly, an optical port connector, a photoelectric converter, a main chip and a first network port connector. The circuit board assembly is located in the shell and comprises at least three layers of circuit boards. The optical port connector, the photoelectric converter, the main chip and the first network port connector are located on a circuit board, and at least one circuit board is arranged between the circuit board where the photoelectric converter is located and the circuit board where the main chip is located. Therefore, the distance between the photoelectric converter and the main chip is far, and the photoelectric converter and the main chip are separated by the circuit board, so that the influence of heat emitted by the main chip on the photoelectric converter is reduced, and the reliability of the optical network equipment is improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of communication technology, and in particular, to an optical network device. BACKGROUND

[0002] An optical network device, such as an optical network unit (ONU) or an optical network terminal (ONT), includes an optical-electric converter and a main chip. The optical-electric converter is configured to perform optical-electric conversion. The main chip is configured to receive and process an electric signal sent by the optical-electric converter, and send an electric signal to the optical-electric converter.

[0003] During the operation of the ONU, the main chip generates a large amount of heat. Since the optical-electric converter is a heat-sensitive component, the heat generated by the main chip affects the optical-electric converter, and even causes the optical-electric converter to fail. SUMMARY

[0004] The present disclosure provides an optical network device. The main chip and the optical-electric converter of the optical network device are separated by a circuit board, which reduces the influence of the heat generated by the main chip on the optical-electric converter. The technical solution of the optical network device is described as follows.

[0005] The present disclosure provides an optical network device. The optical network device includes a housing, a circuit board assembly, an optical port connector, an optical-electric converter, a main chip, and a first network port connector. The circuit board assembly is located in the interior of the housing, and includes at least three layers of circuit boards. The optical port connector, the optical-electric converter, the main chip, and the first network port connector are located on the circuit boards, and there are at least one circuit board between the circuit board on which the optical-electric converter is located and the circuit board on which the main chip is located. The optical port connector is optically connected to the optical-electric converter, and the main chip is electrically connected to the optical-electric converter and the first network port connector, respectively.

[0006] The technical solution provided by the present disclosure has at least one circuit board between the circuit board on which the optical-electric converter is located and the circuit board on which the main chip is located, so that the distance between the optical-electric converter and the main chip is far, and they are separated by at least one circuit board. In this way, the thermal conductivity between the main chip and the optical-electric converter is low, the influence of the heat generated by the main chip on the optical-electric converter is reduced, and the reliability of the optical-electric converter and the optical network device is improved.

[0007] In an implementation, the circuit board assembly includes a first circuit board, a second circuit board, a third circuit board and a fourth circuit board stacked in sequence, and the fourth circuit board is adjacent to the panel of the housing. The optoelectronic transducer is located on the first circuit board. The main chip is located on the third circuit board. The first network port connector is located on the fourth circuit board and exposed outside the panel. The second circuit board is arranged between the optoelectronic transducer and the main chip, so that the thermal conductivity between the optoelectronic transducer and the main chip is low.

[0008] In an implementation, the optical network device further includes a power interface connector and a power management circuit, and the power interface connector and the power management circuit are located on the second circuit board. The power management circuit is configured to process the power input by the power interface connector and supply power to the optoelectronic transducer and the main chip. The power management circuit includes at least one of a protection circuit, a soft start circuit and a filter circuit. The second circuit board can also be referred to as a power board, and the power board separates the optoelectronic transducer and the main chip.

[0009] In an implementation, the optical network device further includes a transformer, and the transformer is located on the first circuit board. An input end of the transformer is connected to the power management circuit, and output ends of the transformer are respectively connected to the optoelectronic transducer and the main chip. The transformer is configured to step down the power output by the power management circuit and supply power to the optoelectronic transducer and the main chip. The transformer can be a 56V-12V transformer.

[0010] In an implementation, the optical network device further includes an Ethernet physical layer chip and a second network port connector, and the Ethernet physical layer chip and the second network port connector are located on the first circuit board. The Ethernet physical layer chip is electrically connected to the main chip and the second network port connector respectively. The transmission rates of the first network port connector and the second network port connector can be different.

[0011] In an implementation, the circuit board assembly further includes a first electrical connector, a second electrical connector and a third electrical connector. The first circuit board and the second circuit board are electrically connected by the first electrical connector, the second circuit board and the third circuit board are electrically connected by the second electrical connector, and the third circuit board and the fourth circuit board are electrically connected by the third electrical connector. At least one of the first electrical connector and the second electrical connector is a soft board, and the soft board has low transmission loss.

[0012] The technical scheme provided by the present disclosure reduces the influence of heat generated by the main chip on the photoelectric converter by arranging the photoelectric converter and the main chip to be separated by the second circuit board, but the signal transmission path between the photoelectric converter and the main chip is relatively long. The present disclosure arranges at least one of the first electrical connecting element and the second electrical connecting element to be a flexible board, so that the signal transmission path between the photoelectric converter and the main chip passes through at least one flexible board, and the transmission loss of the flexible board is low, thereby improving the reliability of signal transmission between the photoelectric converter and the main chip. In addition, the flexible board has a small volume and does not need to be fixed by screws, thereby saving the space inside the optical network device.

[0013] In an implementation manner, the first electrical connecting element and the third electrical connecting element are flexible boards, and the second electrical connecting element is a board-to-board connector. The first circuit board, the second circuit board and the first electrical connecting element can be integrally formed, and then the first circuit board and the second circuit board are folded to be arranged in a stack. The third circuit board, the fourth circuit board and the third electrical connecting element can be integrally formed, and then the third circuit board and the fourth circuit board are folded to be arranged in a stack.

[0014] In an implementation manner, the circuit board assembly further includes a plurality of male and female studs for fixing the first circuit board, the second circuit board, the third circuit board and the fourth circuit board in the interior of the housing. The male and female studs are arranged between the first circuit board and the bottom wall of the housing, between the first circuit board and the second circuit board, between the second circuit board and the third circuit board, and between the third circuit board and the fourth circuit board. In this way, the male and female studs can support the first circuit board, the second circuit board, the third circuit board and the fourth circuit board, so that when the circuit boards are pressed, the displacement of the circuit boards is small, and the upper circuit board does not press the electrical devices on the lower circuit board, thereby improving the reliability of the optical network device.

[0015] In an implementation manner, along the direction in which the bottom wall points to the panel, the interior of the housing includes a first accommodating portion and a second accommodating portion in sequence, and the first accommodating portion and the second accommodating portion have a stepped surface therebetween. The first circuit board, the second circuit board and the third circuit board are located in the first accommodating portion, and the fourth circuit board is located in the second accommodating portion and abuts against the stepped surface. In this way, the male and female studs and the stepped surface jointly support the fourth circuit board, so that the fourth circuit board is less likely to move towards the third circuit board when pressed, and the fourth circuit board is less likely to press the electrical devices on the third circuit board, thereby further improving the reliability of the optical network device. Moreover, since the stepped surface supports the fourth circuit board, the number of male and female studs for supporting the fourth circuit board can be reduced, thereby reducing the number of mounting holes corresponding to the male and female studs on the fourth circuit board. The reduction in the number of mounting holes improves the effective device layout area on the fourth circuit board.

[0016] In an implementation, at most two male and female studs are included between the third circuit board and the fourth circuit board. In this way, at most two mounting holes corresponding to the male and female studs are included on the fourth circuit board, so that an effective device layout area on the fourth circuit board is larger.

[0017] In an implementation, the circuit board assembly further includes a uniform temperature plate located between the second circuit board and the third circuit board and in heat-conducting connection with the second circuit board and the third circuit board, respectively. In this way, the uniform temperature plate can realize uniform temperature of the second circuit board and the third circuit board, and is conducive to heat dissipation of the second circuit board and the third circuit board.

[0018] In an implementation, the male and female studs between the second circuit board and the third circuit board pass through the uniform temperature plate. In this way, heat on the uniform temperature plate can be conducted to the housing via the male and female studs, and heat dissipation efficiency of the uniform temperature plate is improved.

[0019] In an implementation, the housing includes a bottom shell assembly and a panel, the bottom shell assembly includes a bottom wall, and the bottom wall is oppositely arranged with the panel. The circuit board assembly includes a first circuit board adjacent to the bottom wall. The photoelectric converter is located on a side of the first circuit board facing the bottom wall and is in heat-conducting connection with the bottom shell assembly. The photoelectric converter and the bottom shell assembly can be in abutment, or a heat-conducting pad can be arranged between the bottom shell assembly and the photoelectric converter, one side of the heat-conducting pad being attached to the bottom shell assembly and the other side being attached to the photoelectric converter.

[0020] In an implementation, the bottom shell assembly includes a bottom shell and a first heat sink. The bottom wall opposite to the first circuit board includes a first opening, and the first opening is oppositely arranged with the photoelectric converter. The first heat sink includes a first plate body and a first boss, the first plate body is located outside the bottom shell, and the first boss passes through the first opening and is in heat-conducting connection with the photoelectric converter.

[0021] The first boss and the photoelectric converter can be in abutment, or a heat-conducting pad can be arranged between the first boss and the photoelectric converter, one side of the heat-conducting pad being attached to the first boss and the other side being attached to the photoelectric converter.

[0022] The technical solutions provided by the present disclosure can set a first opening on the housing, and set a first boss of a first heat sink to pass through the first opening and be in heat-conducting connection with the photoelectric converter, so that the photoelectric converter can dissipate heat through an independent heat sink, the influence of heat dissipated by other heat-generating devices on the photoelectric converter is reduced, and the heat dissipation efficiency and reliability of the photoelectric converter are improved.

[0023] In an implementation, a plurality of protrusions are arranged between the bottom shell and the first plate body, one end of each protrusion abutting against the bottom shell and the other end abutting against the first plate body, so that a gap is formed between the bottom shell and the first plate body.

[0024] The technical solution provided by the present disclosure reduces the heat conductivity between the bottom shell and the first plate body by setting a gap between the first plate body and the bottom shell. In this way, the heat of other heat-generating devices (such as the main chip) in the optical network device is not easily conducted from the bottom shell to the first heat sink, further reducing the influence of the heat of the main chip on the optical-electricity converter and improving the reliability of the optical-electricity converter.

[0025] In an implementation manner, the side of the first circuit board facing the bottom wall further comprises a heat-generating device, the wall of the bottom shell opposite to the first circuit board further comprises a second opening, and the second opening is arranged opposite to the heat-generating device. The bottom shell assembly further comprises a second heat sink, the second heat sink comprises a second plate body and a second boss, the second plate body is located outside the bottom shell, the second boss passes through the second opening and is in heat-conducting connection with the heat-generating device. The heat-generating device is a transformer or an Ethernet physical layer chip.

[0026] The technical solution provided by the present disclosure improves the heat dissipation efficiency of the heat-generating devices other than the optical-electricity converter by setting the second boss of the second heat sink against the heat-generating devices on the first circuit board. Moreover, the heat-generating devices dissipate heat through the second heat sink instead of sharing the first heat sink with the optical-electricity converter, thereby reducing the influence of the heat dissipated by the heat-generating devices on the optical-electricity converter and improving the reliability of the optical-electricity converter.

[0027] In an implementation manner, the first plate body and the bottom shell have a gap therebetween, the second plate body is attached to the bottom shell, and the thickness of the second plate body is greater than the thickness of the first plate body, so that the bottom walls of the first plate body and the second plate body are flush.

[0028] In an implementation manner, the first heat sink further comprises a shielding coaming, the shielding coaming passes through the first opening and surrounds the optical-electricity converter. In this way, the first heat sink not only dissipates heat of the optical-electricity converter but also shields electromagnetic waves of the optical-electricity converter.

[0029] In an implementation manner, the optical-electricity converter comprises a bidirectional optical subassembly (BOSA), and the BOSA is arranged on the first circuit board in a BOSA on board (BOB) manner. In this way, compared with using a complete optical module as the optical-electricity converter, the BOSA is easier to dissipate heat.

[0030] In an implementation manner, the main chip is in heat-conducting connection with the faceplate. In this way, the heat of the main chip is conducted to the faceplate, and the heat of the optical-electricity converter is conducted to the bottom wall of the bottom shell assembly, and the distance between the bottom wall and the faceplate is relatively far. Therefore, the heat conductivity of the heat of the main chip to the optical-electricity converter is reduced, and the influence of the heat dissipated by the main chip on the optical-electricity converter is reduced.

[0031] In an implementation, the fourth circuit board includes a third opening, and the third opening is arranged opposite to the main chip. The panel includes a third boss, and the third boss is in heat conduction connection with the main chip. The third opening is used for avoiding the third boss or a heat conduction pad between the third boss and the main chip. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 Fig. 1 is a schematic diagram of a system architecture of FTTH;

[0033] Figure 2 Fig. 2 is a schematic diagram of a home network system;

[0034] Figure 3 Fig. 3 is a schematic diagram of another home network system;

[0035] Figure 4 Fig. 4 is a schematic diagram of an optical network device provided by an embodiment of the present disclosure;

[0036] Figure 5 Fig. 5 is a schematic diagram of an optical network device provided by an embodiment of the present disclosure;

[0037] Figure 6 Fig. 6 is an exploded view of an optical network device provided by an embodiment of the present disclosure;

[0038] Figure 7 Fig. 7 is a schematic diagram of a circuit board assembly and related devices provided by an embodiment of the present disclosure;

[0039] Figure 8 Fig. 8 is a schematic diagram of a first circuit board and related devices provided by an embodiment of the present disclosure;

[0040] Figure 9 Fig. 9 is a schematic diagram of a second circuit board and related devices provided by an embodiment of the present disclosure;

[0041] Figure 10 Fig. 10 is a schematic diagram of a third circuit board and related devices provided by an embodiment of the present disclosure;

[0042] Figure 11 Fig. 11 is a schematic diagram of a fourth circuit board and related devices provided by an embodiment of the present disclosure;

[0043] Figure 12 Fig. 12 is a schematic diagram of a circuit board assembly and related devices provided by an embodiment of the present disclosure;

[0044] Figure 13 Fig. 13 is a schematic diagram of an internal structure of an optical network device provided by an embodiment of the present disclosure;

[0045] Figure 14 Fig. 14 is an exploded view of a circuit board assembly provided by an embodiment of the present disclosure;

[0046] Figure 15 FIG. 1 is a schematic diagram of a second circuit board, a third circuit board and a vapor chamber according to an embodiment of the present disclosure;

[0047] Figure 16 FIG. 2 is a schematic diagram of a vapor chamber according to an embodiment of the present disclosure;

[0048] Figure 17 FIG. 3 is a schematic diagram of a bottom of an optical network device according to an embodiment of the present disclosure;

[0049] Figure 18 FIG. 4 is a schematic diagram of a bottom shell and a first heat sink according to an embodiment of the present disclosure;

[0050] Figure 19 FIG. 5 is a schematic diagram of a first heat sink according to an embodiment of the present disclosure;

[0051] Figure 20 FIG. 6 is a schematic diagram of a first heat sink and an opto-electric converter according to an embodiment of the present disclosure;

[0052] Figure 21 FIG. 7 is a schematic diagram of a partial view of an optical network device according to an embodiment of the present disclosure;

[0053] Figure 22 FIG. 8 is a schematic diagram of another first heat sink according to an embodiment of the present disclosure;

[0054] Figure 23 FIG. 9 is a schematic diagram of another first heat sink and an opto-electric converter according to an embodiment of the present disclosure;

[0055] Figure 24 FIG. 10 is a schematic diagram of a bottom shell, a first heat sink and a second heat sink according to an embodiment of the present disclosure;

[0056] Figure 25 FIG. 11 is a schematic diagram of a second heat sink according to an embodiment of the present disclosure;

[0057] Figure 26 FIG. 12 is a schematic diagram of a panel according to an embodiment of the present disclosure;

[0058] Figure 27 FIG. 13 is a schematic diagram of a heat dissipation mode of a main chip according to an embodiment of the present disclosure.

[0059] FIG. 13 is a schematic diagram of a heat dissipation mode of a main chip according to an embodiment of the present disclosure.

[0060] 1、housing, 110, first accommodating portion, 120, second accommodating portion, 130, step surface, 101, bottom shell assembly, 1011, bottom shell, 10110, bump, 10111, first opening, 10112, second opening, 1012, first radiator, 12120, gap, 10121, first plate body, 10122, first boss, 10123, shielding coaming, 10124, opening, 1013, second radiator, 10131, second plate body, 10132, second boss, 102, panel, 1021, third boss;

[0061] 2、circuit board assembly, 21, first circuit board, 22, second circuit board, 23, third circuit board, 24, fourth circuit board, 241, third opening, 25, first electrical connection, 26, second electrical connection, 27, third electrical connection, 28, male and female stud, 29, uniform temperature plate, 291, first support leg, 292, second support leg, 293, fourth opening;

[0062] 3、optical port connector;

[0063] 4、optical-electricity converter;

[0064] 5、main chip;

[0065] 6、first network port connector;

[0066] 7、power interface connector;

[0067] 8、power management circuit, 81, protection circuit, 82, slow start circuit, 83, filter circuit;

[0068] 9、transformer;

[0069] 10、ethernet physical layer chip;

[0070] 11、second network port connector;

[0071] 12、heat-conducting pad. DETAILED DESCRIPTION

[0072] Fiber to the home / FTTH refers to that an operator network directly enters a house through an optical distribution network (ODN) and is connected with an optical network unit (ONU) installed in the house. Figure 1 A system architecture diagram of FTTH is shown. As shown in Figure 1As shown in FIG. 1, an FTTH system includes an optical line terminal (OLT), an ODN, and an ONU. The OLT is located in a central machine room and is connected to a switch. The OLT is connected to the ONU in the house through the ODN. The ODN includes an optical splitter, a trunk fiber connected between the optical splitter and the OLT, and branch fibers connected between the optical splitter and the ONUs. The OLT, the ONUs, and the ODN between the OLT and the ONUs form a passive optical network (PON). The ONU can also be replaced by an optical network terminal (ONT).

[0073] After the fiber enters the house, in order to solve the problem of signal coverage in each room, there are two technical solutions. Figure 2 As shown in FIG. 2, the first technical solution is that the ONU includes a plurality of network port connectors, and the plurality of network port connectors are connected to terminal devices in each room through a plurality of network cables. The terminal devices can be computers, cameras, or access points (APs), etc.

[0074] As shown in FIG. 3, the second technical solution is to take the ONU in FIG. 1 as a master ONU, and set slave ONUs in each room. The master ONU is connected to the slave ONUs in each room through a plurality of optical fibers. The slave ONU includes a network port connector, and the network port connector is connected to a terminal device in the room through a network cable. The terminal device can be a computer, a camera, or an AP, etc. This technology is called fiber to the room (FTTR). Figure 3 Figure 1 The optical network device provided by the embodiments of the present disclosure can be the ONU in FIG. 1 or the slave ONU in FIG. 3. Such an ONU includes an optical port connector, a network port connector, an optical-electric converter, and a master chip. The optical port connector is used to connect the OLT or the master ONU through the optical fiber. The network port connector is used to connect the terminal device through the network cable. The optical-electric converter is optically connected to the optical port connector, and the master chip is electrically connected to the optical-electric converter and the network port connector, respectively.

[0075] The optical network device provided by the embodiments of the present disclosure can be the ONU in FIG. 1 or the slave ONU in FIG. 3. Such an ONU includes an optical port connector, a network port connector, an optical-electric converter, and a master chip. The optical port connector is used to connect the OLT or the master ONU through the optical fiber. The network port connector is used to connect the terminal device through the network cable. The optical-electric converter is optically connected to the optical port connector, and the master chip is electrically connected to the optical-electric converter and the network port connector, respectively. Figure 2 Figure 3 The optical network device provided by the embodiments of the present disclosure can be the ONU in FIG. 1 or the slave ONU in FIG. 3. Such an ONU includes an optical port connector, a network port connector, an optical-electric converter, and a master chip. The optical port connector is used to connect the OLT or the master ONU through the optical fiber. The network port connector is used to connect the terminal device through the network cable. The optical-electric converter is optically connected to the optical port connector, and the master chip is electrically connected to the optical-electric converter and the network port connector, respectively.

[0076] ​​When transmitting downlink signals, the optoelectronic converter receives the downlink optical signal through the optical port connector, converts it into a downlink electrical signal, and sends the downlink electrical signal to the main chip. The main chip processes the downlink electrical signal and sends it to the terminal device through the network port connector. When transmitting uplink signals, the main chip receives the uplink electrical signal sent by the terminal device through the network port connector, processes it, and sends it to the optoelectronic converter. The optoelectronic converter converts the uplink electrical signal into an uplink optical signal and sends it through the optical port connector.

[0077] During ONU operation, the main chip generates a significant amount of heat. Since the photoelectric converter is a heat-sensitive component, the heat emitted by the main chip can affect the photoelectric converter and even cause it to malfunction. This technical problem is particularly severe in ONUs with small device size, high heat density, and limited installation space. For example, in ONUs conforming to the international M45 standard, the panel size is 45mm × Nmm, where N is an integer multiple of 45, such as 45 or 90.

[0078] In view of the above-mentioned technical problems, this disclosure provides an optical network device, which can be the ONU or ONT mentioned above. Figure 4 and Figure 5 A diagram showing the external shape of an optical network device is provided. Figure 6 An exploded view of an optical network device is shown, such as Figure 6 As shown, the optical network device includes a housing 1 (including a bottom housing assembly 101 and a front panel 102), a circuit board assembly 2, and related components located on the circuit board assembly 2. The circuit board assembly 2 includes at least three layers of circuit boards, exemplarily, such as... Figure 6 As shown, the circuit board assembly 2 includes four layers of circuit boards arranged in a stacked manner.

[0079] Figure 7 A schematic diagram of circuit board assembly 2 and related components is shown. (For example...) Figure 7As shown, the optical network device includes an optical port connector 3, an opto-converter 4, a main chip 5, and a first network port connector 6. The optical port connector 3 is optically connected to the opto-converter 4, and the main chip 5 is electrically connected to both the opto-converter 4 and the first network port connector 6. When transmitting downlink signals, the opto-converter 4 receives the downlink optical signal through the optical port connector 3, converts it into a downlink electrical signal, and sends the downlink electrical signal to the main chip 5. The main chip 5 processes the downlink electrical signal and transmits it externally through the first network port connector 6. When transmitting uplink signals, the main chip 5 receives the uplink electrical signal through the first network port connector 6, processes it, and sends it to the opto-converter 4. The opto-converter 4 converts the uplink electrical signal into an uplink optical signal and transmits it externally through the optical port connector 3. The main chip 5 can also be called a system-on-a-chip (SOC), and it may integrate MAC functionality.

[0080] The optical port connector 3, the photoelectric converter 4, the main chip 5, and the first network port connector 6 are all located on the circuit board of the circuit board assembly 2. The optical port connector 3, the photoelectric converter 4, the main chip 5, and the first network port connector 6 can be located on any circuit board of the circuit board assembly 2.

[0081] In some examples, the circuit board containing the photoelectric converter 4 is different from the circuit board containing the main chip 5. For example, there is at least one circuit board between the circuit board containing the photoelectric converter 4 and the circuit board containing the main chip 5. Thus, the distance between the photoelectric converter 4 and the main chip 5 is relatively large, and they are separated by at least one circuit board (such as...). Figure 7 The second circuit board 22 separates the main chip 5 and the photoelectric converter 4. This results in a lower thermal conductivity between the main chip 5 and the photoelectric converter 4, reducing the impact of heat dissipated by the main chip 5 on the photoelectric converter 4 and improving the reliability of the photoelectric converter 4 and the optical network device. Actual measurements show that, compared to placing the main chip 5 and the photoelectric converter 4 on the same circuit board, the technical solution provided in this disclosure embodiment can reduce the temperature of the main chip 5 and the photoelectric converter 4 by at least 5°C.

[0082] In some examples, such as Figure 7 As shown, the main chip 5 is close to the panel 102 relative to the photoelectric converter 4. Exemplarily, the main chip 5 dissipates heat through the panel 102, while the photoelectric converter 4 dissipates heat by adhering to the bottom wall of the housing 1. The relatively large distance between the panel 102 and the bottom wall reduces the thermal conductivity between the main chip 5 and the photoelectric converter 4.

[0083] In some examples, the photoelectric converter 4 is located on a circuit board adjacent to the bottom wall, while the main chip 5 is located on any other circuit board.

[0084] In some examples, such as Figure 7As shown, the circuit board assembly 2 comprises a first circuit board 21, a second circuit board 22, a third circuit board 23 and a fourth circuit board 24 which are sequentially stacked, and the fourth circuit board 24 is adjacent to the panel 102 of the housing 1. The photoelectric converter 4 is located on the first circuit board 21, and the main chip 5 is located on the third circuit board 23. The first network port connector 6 is located on the fourth circuit board 24 and exposed outside the panel 102. In this way, the photoelectric converter 4 and the main chip 5 are separated by the second circuit board 22. In some examples, the second circuit board 22 is a power board, which is used to introduce power and supply power to the photoelectric converter 4, the main chip 5 and other devices.

[0085] It should be noted that the circuit board assembly 2 can also include more or fewer circuit boards, for example, the circuit board assembly 2 includes three-layer circuit boards or five-layer circuit boards, etc. In the following, taking the circuit board assembly 2 including the first circuit board 21, the second circuit board 22, the third circuit board 23 and the fourth circuit board 24 as an example, the devices provided on each of the above-mentioned circuit boards are described.

[0086] Figure 8 A schematic diagram of a first circuit board and related devices is shown. In some examples, as Figure 8 As shown, the first circuit board 21 is provided with the optical port connector 3 and the photoelectric converter 4, and the optical port connector 3 is optically connected with the photoelectric converter 4.

[0087] In some examples, as Figure 8 As shown, the photoelectric converter 4 includes a bidirectional optical sub assembly (BOSA), and the BOSA is provided on the first circuit board 21 in a BOSA on board (BOB) manner. In this way, compared with using a complete optical module as the photoelectric converter 4, the BOSA is easier to dissipate heat. The heat dissipation mode of the BOSA will be described later.

[0088] In some examples, as Figure 8 As shown, the first circuit board 21 is further provided with a transformer 9, an input end of the transformer 9 is connected with the power board (the second circuit board 22), and output ends of the transformer 9 are respectively connected with the photoelectric converter 4 and the main chip 5. The transformer 9 is used to step down the power output by the power board and supply power to the photoelectric converter 4 and the main chip 5. The transformer 9 can be a 56V to 12V transformer.

[0089] In some examples, as Figure 8As shown, the first circuit board 21 is further provided with an Ethernet physical layer chip 10 and a second network port connector 11. The Ethernet physical layer chip 10 is electrically connected with the main chip 5 and the second network port connector 11 respectively. The second network port connector 11 has a different rate from the first network port connector 6. In some examples, the first network port connector 6 has a GE rate, and the second network port connector 11 has a 10GE rate. The Ethernet physical layer chip can also be referred to as a PHY (physical layer chip) chip.

[0090] Figure 9 A schematic diagram of a second circuit board and related devices is shown. In some examples, as Figure 9 As shown, the optical network device further includes a power interface connector 7 and a power management circuit 8. The power interface connector 7 and the power management circuit 8 are located on the second circuit board 22. The power management circuit 8 is configured to supply power to the optical-electric converter 4 and the main chip 5 after processing the power input by the power interface connector 7. The power management circuit 8 includes at least one of a protection circuit 81, a soft-start circuit 82, and a filter circuit 83. In examples, as Figure 9 As shown, the power management circuit 8 includes the protection circuit 81, the soft-start circuit 82, and the filter circuit 83 connected in sequence. The protection circuit 81 is electrically connected with the power interface connector 7, and the filter circuit 83 can be electrically connected with the transformer 9. It should be noted that in some examples, the transformer 9 is provided on the second circuit board 22.

[0091] Figure 10 A schematic diagram of a third circuit board and related devices is shown. In some examples, as Figure 10 As shown, the third circuit board 23 is provided with the main chip 5 and related circuits matching the main chip 5, such as a memory and a transformer (not shown in the figure). The transformer can be configured to receive the power output by the transformer 9 on the first circuit board 21, and output the power to the main chip 5 after voltage reduction. The transformer can be a 12V-3.3V transformer, a 3.3V-0.8V transformer, etc.

[0092] Figure 11 A schematic diagram of a fourth circuit board and related devices is shown. In some examples, as Figure 11 As shown, the fourth circuit board 24 is provided with the first network port connector 6. The first network port connector 6 can be multiple, for example, four.

[0093] Next, the electrical connection mode of each of the above-mentioned circuit boards is exemplarily described. As Figure 12As shown, the first circuit board 21 and the second circuit board 22 are electrically connected through the first electrical connector 25, the second circuit board 22 and the third circuit board 23 are electrically connected through the second electrical connector 26, and the third circuit board 23 and the fourth circuit board 24 are electrically connected through the third electrical connector 27. Thus, the first circuit board 21, the second circuit board 22, the third circuit board 23 and the fourth circuit board 24 are sequentially electrically connected.

[0094] The type of each electrical connector is not limited in the embodiments of the present disclosure. The electrical connector can be a flexible board or a board-to-board connector. In some examples, at least one of the first electrical connector 25 and the second electrical connector 26 is a flexible board. The transmission loss of the flexible board is lower than that of the board-to-board connector.

[0095] The technical solution provided by the embodiments of the present disclosure separates the photoelectric converter 4 and the main chip 5 by the second circuit board 22, which reduces the influence of the heat generated by the main chip 5 on the photoelectric converter 4, but makes the signal transmission path between the photoelectric converter 4 and the main chip 5 longer. The transmission path includes the first circuit board 21, the first electrical connector 25, the second circuit board 22, the second electrical connector 26 and the third circuit board 23. By setting at least one of the first electrical connector 25 and the second electrical connector 26 as a flexible board, the signal transmission path between the photoelectric converter 4 and the main chip 5 passes through at least one flexible board, and the transmission loss of the flexible board is low. Therefore, the reliability of the signal transmission between the photoelectric converter 4 and the main chip 5 can be improved. In addition, the flexible board has a small volume and does not need to be fixed by screws, thereby saving the space inside the optical network device.

[0096] In some examples, as shown in FIG. 6, the first electrical connector 25 and the third electrical connector 27 are flexible boards, and the second electrical connector 26 is a board-to-board connector. Figure 12 As shown, the first circuit board 21, the second circuit board 22 and the first electrical connector 25 can be integrally formed, and then the first circuit board 21 and the second circuit board 22 are folded to form the stacked mode as shown. Figure 12 As shown, the third circuit board 23, the fourth circuit board 24 and the third electrical connector 27 can be integrally formed, and then the third circuit board 23 and the fourth circuit board 24 are folded to form the stacked mode as shown. Figure 12 As shown, the third circuit board 23, the fourth circuit board 24 and the third electrical connector 27 can be integrally formed, and then the third circuit board 23 and the fourth circuit board 24 are folded to form the stacked mode as shown.

[0097] Next, the fixing mode of each circuit board is exemplarily described. In some examples, as shown in FIG. 7, the first circuit board 21 and the second circuit board 22 are fixed by screws, and the third circuit board 23 and the fourth circuit board 24 are fixed by screws. Figure 12As shown, the circuit board assembly 2 also includes multiple male and female studs 28, which are used to fix the first circuit board 21, the second circuit board 22, the third circuit board 23, and the fourth circuit board 24 inside the housing 1. The male and female studs 28 are studs with external threads at one end and internal threads at the other end. In addition to the male and female studs 28, the circuit board assembly 2 may also include screws, which cooperate with the male and female studs 28 to fix the circuit boards of each layer.

[0098] In some examples, such as Figure 12 As shown, male and female studs 28 are provided between the first circuit board 21 and the bottom wall of the housing 1, between the first circuit board 21 and the second circuit board 22, between the second circuit board 22 and the third circuit board 23, and between the third circuit board 23 and the fourth circuit board 24. In this way, the male and female studs 28 can support the first circuit board 21, the second circuit board 22, the third circuit board 23, and the fourth circuit board 24, so that the displacement of the circuit boards is small when each circuit board is under pressure. This prevents the upper circuit board from squeezing the components on the lower circuit board, thus improving the reliability of the optical network device.

[0099] It should be noted that the circuit board assembly 2 may also include circuit boards of other layers, in which case male and female studs 28 are provided between adjacent circuit boards. Furthermore, male and female studs 28 are also provided between the bottom wall and the circuit board.

[0100] In addition to setting the male and female studs 28 to support the circuit board, in other examples, such as Figure 13 As shown, along the direction from the bottom wall towards the panel 102, the interior of the housing 1 sequentially includes a first receiving portion 110 and a second receiving portion 120, with a stepped surface 130 between the first receiving portion 110 and the second receiving portion 120. A first circuit board 21, a second circuit board 22, and a third circuit board 23 are located in the first receiving portion 110, and a fourth circuit board 24 is located in the second receiving portion 120 and abuts against the stepped surface 130. Thus, the fourth circuit board 24 is supported by the male and female studs 28 and the stepped surface 130, making it less likely for the fourth circuit board 24 to move towards the third circuit board 23 under pressure, and less likely for the fourth circuit board 24 to press down on the devices on the third circuit board 23, further improving the reliability of the optical network device.

[0101] Furthermore, since the stepped surface 130 can support the fourth circuit board 24, it also helps to reduce the number of male and female studs 28 used to support the fourth circuit board 24, thereby reducing the number of mounting holes corresponding to the male and female studs 28 on the fourth circuit board 24. The reduction in the number of mounting holes increases the effective device layout area on the fourth circuit board 24. For example, as... Figure 14 As shown, there are a maximum of two male and female studs 28 between the third circuit board 23 and the fourth circuit board 24.

[0102] likeFigure 14 As shown, other circuit boards not supported by the stepped surface 130 need to be supported by at least three male and female studs 28. For example, the first circuit board 21 is supported by three male and female studs 28, the second circuit board 22 is supported by three male and female studs 28, the third circuit board 23 is supported by four male and female studs 28, and the fourth circuit board 24 is supported by two male and female studs 28. It can be seen that the stepped surface 130 reduces the number of male and female studs 28 supporting the fourth circuit board 24.

[0103] It should be noted that the circuit board assembly 2 can also include other numbers of circuit boards, and the circuit board adjacent to the panel 102 is located in the second accommodating portion 120 and supported by the stepped surface 130, and other circuit boards are located in the first accommodating portion 110.

[0104] In some examples, as shown in Figure 13 The inside of the shell 1 includes two stepped surfaces 130, which abut against two sides of the fourth circuit board 24. It should be noted that the edge of the circuit board does not include wiring, so that the edge of the circuit board overlapping the stepped surface 130 will not reduce the effective device layout area of the circuit board.

[0105] In some examples, as shown in Figure 15 The circuit board assembly 2 further includes a uniform temperature plate 29, which is located between the second circuit board 22 and the third circuit board 23 and is in thermal conductive connection with the second circuit board 22 and the third circuit board 23. In this way, the uniform temperature plate 29 can uniform the temperature of the second circuit board 22 and the third circuit board 23, thereby improving the heat dissipation efficiency of the second circuit board 22 and the third circuit board 23.

[0106] In some examples, as shown in Figure 15 The male and female studs 28 between the second circuit board 22 and the third circuit board 23 pass through the uniform temperature plate 29. In this way, the heat on the uniform temperature plate 29 can be conducted to the shell 1 via the male and female studs 28, which is conducive to improving the heat dissipation efficiency of the uniform temperature plate 29.

[0107] In some examples, as shown in Figure 16 The uniform temperature plate 29 includes a first support leg 291 and a second support leg 292, both of which are penetrated by the male and female studs 28, and the first support leg 291 is supported by the second circuit board 22 and the second support leg 292 supports the third circuit board 23. For example, as shown in Figure 16 The first support leg 291 is one, and the second support leg 292 is two.

[0108] In some examples, as shown in Figure 16 The uniform temperature plate 29 includes a fourth opening 293, which can be used to avoid devices on the second circuit board 22 or the third circuit board 23.

[0109] The heat dissipation mode of the photoelectric converter 4 is exemplarily described below. In some examples, as shown in Figure 6 The housing 1 includes a bottom shell assembly 101 and a panel 102, the bottom shell assembly 101 includes a bottom wall, and the bottom wall is arranged opposite to the panel 102. As shown in Figure 7 The circuit board assembly 2 includes a first circuit board 21, and the photoelectric converter 4 is located on a side of the first circuit board 21 facing the bottom wall and is in heat conduction connection with the bottom shell assembly 101. The heat conduction connection between the photoelectric converter 4 and the bottom shell assembly 101 can be that the bottom shell assembly 101 abuts against the photoelectric converter 4, or a heat conduction pad 12 can be arranged between the bottom shell assembly 101 and the photoelectric converter 4, one side of the heat conduction pad 12 abuts against the bottom shell assembly 101, and the other side abuts against the photoelectric converter 4.

[0110] In some examples, the bottom shell assembly 101 includes a bottom shell 1011, and the photoelectric converter 4 is in heat conduction connection with a bottom wall of the bottom shell 1011.

[0111] In other examples, as shown in Figure 17 and Figure 18 The bottom shell assembly 101 includes a bottom shell 1011 and a first heat sink 1012. The bottom shell 1011 includes a first opening 10111 on a wall opposite to the first circuit board 21. As shown in Figure 19 The first heat sink 1012 includes a first plate body 10121 and a first boss 10122, the first plate body 10121 is located outside the bottom shell 1011, the first boss 10122 passes through the first opening 10111 and is in heat conduction connection with the photoelectric converter 4 (as shown in Figure 20 The heat conduction connection between the first boss 10122 and the photoelectric converter 4 can be that the first boss 10122 abuts against the photoelectric converter 4, or a heat conduction pad 12 can be arranged between the first boss 10122 and the photoelectric converter 4, one side of the heat conduction pad 12 abuts against the first boss 10122, and the other side abuts against the photoelectric converter 4 (as shown in Figure 20

[0112] The technical scheme provided by the embodiments of the present disclosure is that the first opening 10111 is arranged on the bottom shell 1011, and the first boss 10122 of the first heat sink 1012 passes through the first opening 10111 and is in heat conduction connection with the photoelectric converter 4, so that the photoelectric converter 4 can be cooled by an independent heat sink, and the influence of the heat emitted by other heat generating devices (such as the main chip 5) on the photoelectric converter 4 is further reduced, and the heat dissipation efficiency and reliability of the photoelectric converter 4 are improved.

[0113] In some examples, as shown in Figure 18 and Figure 21 ​As shown, a plurality of protrusions 10110 are provided between the bottom shell 1011 and the first plate 10121. One end of the protrusion 10110 abuts against the bottom shell 1011 and the other end abuts against the first plate 10121, so that there is a gap 10120 between the bottom shell 1011 and the first plate 10121.

[0114] The technical solution provided in this disclosure reduces the thermal conductivity between the bottom shell 1011 and the first plate 10121 by setting a gap 10120 between the first plate 10121 and the bottom shell 1011. This reduces the likelihood of heat from other heat-generating components (such as the main chip 5) in the optical network device being conducted to the bottom shell 1011 and then further transferred to the first heat sink 1012, thereby reducing the impact of heat dissipated by other heat-generating components on the photoelectric converter 4 and improving the reliability of the photoelectric converter 4.

[0115] In some examples, such as Figure 18 As shown, the protrusion 10110 is provided on the bottom shell 1011. For example, the protrusion 10110 is integrally formed on the outer wall of the bottom shell 1011.

[0116] In some examples, such as Figure 22 As shown, the first heat sink 1012 also includes a shielding plate 10123, which passes through the first opening 10111 and surrounds the photoelectric converter 4 (e.g., Figure 23 (As shown). Thus, the first heat sink 1012 not only provides heat dissipation for the photoelectric converter 4, but also provides electromagnetic shielding for the photoelectric converter 4. Furthermore, as... Figure 22 and Figure 23 As shown, the shielding enclosure 10123 includes an opening 10124 through which the light portion of the optical connector 3 or the photoelectric converter 4 passes.

[0117] In some examples, such as Figure 22 As shown, the shielding plate 10123 surrounds the first protrusion 10122. Alternatively, the shielding plate 10123 is disposed on the side of the first protrusion 10122 facing the photoelectric converter 4.

[0118] In some examples, the side of the first circuit board 21 facing the bottom wall also includes a heat-generating device, for example, Figure 8 The transformer 9 and the Ethernet physical layer chip 10 are included. For example... Figure 24 As shown, the bottom housing 1011 also includes a second opening 10112 on the wall opposite to the first circuit board 21, and the second opening 10112 is disposed opposite to the heat-generating device. The bottom housing assembly 101 also includes a second heat sink 1013, such as... Figure 25As shown, the second heat sink 1013 includes a second plate body 10131 and a second boss 10132, the second plate body 10131 is located outside the bottom shell 1011, the second boss 10132 passes through the second opening 10112 and is in heat conduction connection with the heat generating devices.

[0119] The technical scheme provided by the embodiment of the present disclosure improves the heat dissipation efficiency of the heat generating devices by setting the second boss 10132 in heat conduction connection with the heat generating devices on the first circuit board 21 except the photoelectric converter 4. Moreover, the heat generating devices dissipate heat through the second heat sink 1013 instead of sharing the first heat sink 1012 with the photoelectric converter 4, which reduces the influence of the heat generated by the heat generating devices on the photoelectric converter 4 and improves the reliability of the photoelectric converter 4.

[0120] In some examples, as shown in FIG. 1, Figure 25 As shown, the second heat sink 1013 includes three second bosses 10132, one second boss 10132 is used to support the second network port connector 11, one second boss 10132 is used to be in heat conduction connection with the Ethernet physical layer chip 10, and the other second boss 10132 is used to be in heat conduction connection with the transformer 9. Among them, the second boss 10132 in heat conduction connection with the Ethernet physical layer chip 10 can be that the second boss 10132 is attached to the Ethernet physical layer chip 10, or a heat conduction pad 12 is arranged between the second boss 10132 and the Ethernet physical layer chip 10. The second boss 10132 in heat conduction connection with the transformer 9 can be that the second boss 10132 is attached to the transformer 9, or a heat conduction pad 12 is arranged between the second boss 10132 and the transformer 9.

[0121] In some examples, as shown in FIG. 1, Figure 17 As shown, the first heat sink 1012 and the second heat sink 1013 have a gap therebetween. In this way, the thermal conductivity of the first heat sink 1012 and the second heat sink 1013 is reduced, and the influence of the heat generated by the other heat generating devices on the first circuit board 21 on the photoelectric converter 4 is further reduced.

[0122] In some examples, as shown in FIG. 1, Figure 21 As shown, the first plate body 10121 and the bottom shell 1011 have a gap 10120 therebetween, and the second plate body 10131 is attached to the bottom shell 1011. Moreover, the thickness of the second plate body 10131 is greater than the thickness of the first plate body 10121. In this way, the bottom walls of the first plate body 10121 and the second plate body 10131 are flush.

[0123] Next, the heat dissipation mode of the main chip 5 is exemplarily described. In some examples, the main chip 5 is in thermal conductive connection with the panel 102. In this way, the heat of the main chip 5 is conducted to the panel 102, while the heat of the photoelectric converter 4 is conducted to the bottom wall of the bottom shell assembly 101, which is far away from the panel 102. Thus, the heat conduction rate of the heat of the main chip 5 to the photoelectric converter 4 is reduced, and the influence of the heat dissipated by the main chip 5 on the photoelectric converter 4 is reduced.

[0124] In some examples, as shown in Figure 26 , the panel 102 comprises a third boss 1021 in thermal conductive connection with the main chip 5. The third boss 1021 in thermal conductive connection with the main chip 5 can be that the third boss 1021 is attached to the main chip 5, or a thermal conductive pad 12 is arranged between the third boss 1021 and the main chip 5.

[0125] In some examples, the main chip 5 is arranged on the third circuit board 23. As shown in Figure 27 and Figure 11 , the fourth circuit board 24 comprises a third opening 241 opposite to the main chip 5. The third opening 241 is used to avoid the third boss 1021 or the thermal conductive pad 12.

[0126] In other examples, the main chip 5 can also be directly arranged on the fourth circuit board 24, and then the main chip 5 can be directly attached to the panel 102.

[0127] It should be noted that the optical network device provided by the embodiments of the present disclosure can comply with the M45 standard, and the size of the panel 102 of the optical network device is 45mm x 90mm.

[0128] The above only describes optional embodiments of the present disclosure, and does not limit the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. An optical network device, characterized in that, The optical network device includes a housing (1), a circuit board assembly (2), an optical port connector (3), an optoelectronic converter (4), a main chip (5), and a first network port connector (6). The circuit board assembly (2) is located inside the housing (1), and the circuit board assembly (2) includes at least three circuit boards; The optical port connector (3), the photoelectric converter (4), the main chip (5) and the first network port connector (6) are located on a circuit board, and there is at least one circuit board between the circuit board where the photoelectric converter (4) is located and the circuit board where the main chip (5) is located; The optical port connector (3) is optically connected to the photoelectric converter (4), and the main chip (5) is electrically connected to the photoelectric converter (4) and the first network port connector (6).

2. The optical network device according to claim 1, characterized in that, The circuit board assembly (2) includes a first circuit board (21), a second circuit board (22), a third circuit board (23) and a fourth circuit board (24) arranged in sequence, and the fourth circuit board (24) is adjacent to the panel (102) of the housing (1); The photoelectric converter (4) is located on the first circuit board (21), the main chip (5) is located on the third circuit board (23), and the first network connector (6) is located on the fourth circuit board (24) and exposed on the panel (102).

3. The optical network device according to claim 2, characterized in that, The optical network device also includes a power interface connector (7) and a power management circuit (8), which are located on the second circuit board (22). The power management circuit (8) processes the electrical energy input from the power interface connector (7) and supplies power to the photoelectric converter (4) and the main chip (5). The power management circuit (8) includes at least one of a protection circuit (81), a soft-start circuit (82), and a filter circuit (83).

4. The optical network device according to claim 3, characterized in that, The optical network device also includes a transformer (9) located on the first circuit board (21); The input end of the transformer (9) is connected to the power management circuit (8), and the output end of the transformer (9) is connected to the photoelectric converter (4) and the main chip (5) respectively. The transformer (9) is used to step down the power output of the power management circuit (8) and then supply power to the photoelectric converter (4) and the main chip (5).

5. The optical network device according to any one of claims 2-4, characterized in that, The optical network device further includes an Ethernet physical layer chip (10) and a second network port connector (11). The Ethernet physical layer chip (10) and the second network port connector (11) are located on the first circuit board (21). The Ethernet physical layer chip (10) is electrically connected to the main chip (5) and the second network port connector (11) respectively.

6. The optical network device according to any one of claims 2-4, characterized in that, The circuit board assembly (2) further includes a first electrical connector (25), a second electrical connector (26) and a third electrical connector (27); The first circuit board (21) and the second circuit board (22) are electrically connected through the first electrical connector (25), the second circuit board (22) and the third circuit board (23) are electrically connected through the second electrical connector (26), and the third circuit board (23) and the fourth circuit board (24) are electrically connected through the third electrical connector (27). At least one of the first electrical connector (25) and the second electrical connector (26) is a flexible circuit board.

7. The optical network device according to claim 6, characterized in that, The first electrical connector (25) and the third electrical connector (27) are flexible boards, and the second electrical connector (26) is a board-to-board connector.

8. The optical network device according to any one of claims 2-4, characterized in that, The circuit board assembly (2) further includes a plurality of male and female studs (28), which are used to fix the first circuit board (21), the second circuit board (22), the third circuit board (23) and the fourth circuit board (24) inside the housing (1); The male and female studs (28) are provided between the bottom wall of the first circuit board (21) and the housing (1), between the first circuit board (21) and the second circuit board (22), between the second circuit board (22) and the third circuit board (23), and between the third circuit board (23) and the fourth circuit board (24).

9. The optical network device according to claim 8, characterized in that, Along the direction from the bottom wall toward the panel (102), the interior of the housing (1) includes a first receiving portion (110) and a second receiving portion (120) in sequence, with a stepped surface (130) between the first receiving portion (110) and the second receiving portion (120). The first circuit board (21), the second circuit board (22) and the third circuit board (23) are located in the first receiving portion (110), and the fourth circuit board (24) is located in the second receiving portion (120) and abuts against the step surface (130).

10. The optical network device according to claim 9, characterized in that, The third circuit board (23) and the fourth circuit board (24) may include a maximum of two male and female studs (28).

11. The optical network device according to claim 8, characterized in that, The circuit board assembly (2) further includes a heat spreader (29), which is located between the second circuit board (22) and the third circuit board (23) and is thermally connected to the second circuit board (22) and the third circuit board (23) respectively.

12. The optical network device according to claim 11, characterized in that, The male and female studs (28) between the second circuit board (22) and the third circuit board (23) pass through the heat exchange plate (29).

13. The optical network device according to any one of claims 1-4, characterized in that, The housing (1) includes a bottom shell assembly (101) and a panel (102). The bottom shell assembly (101) includes a bottom wall, which is disposed opposite to the panel (102). The circuit board assembly (2) includes a first circuit board (21) adjacent to the bottom wall, and the photoelectric converter (4) is located on the side of the first circuit board (21) facing the bottom wall and is thermally connected to the bottom shell assembly (101).

14. The optical network device according to claim 13, characterized in that, The bottom shell assembly (101) includes a bottom shell (1011) and a first heat sink (1012). The bottom shell (1011) includes a first opening (10111) on the wall opposite to the first circuit board (21), and the first opening (10111) is disposed opposite to the photoelectric converter (4); The first heat sink (1012) includes a first plate (10121) and a first boss (10122). The first plate (10121) is located outside the bottom shell (1011). The first boss (10122) passes through the first opening (10111) and is thermally connected to the photoelectric converter (4).

15. The optical network device according to claim 14, characterized in that, A plurality of protrusions (10110) are provided between the bottom shell (1011) and the first plate (10121). One end of the protrusion (10110) abuts against the bottom shell (1011) and the other end abuts against the first plate (10121), so that there is a gap (10120) between the bottom shell (1011) and the first plate (10121).

16. The optical network device according to claim 14 or 15, characterized in that, The first heat sink (1012) also includes a shielding plate (10123) that passes through the first opening (10111) and surrounds the photoelectric converter (4).

17. The optical network device according to claim 14 or 15, characterized in that, The side of the first circuit board (21) facing the bottom wall also includes a heating device, and the bottom shell (1011) on the wall opposite to the first circuit board (21) also includes a second opening (10112), which is disposed opposite to the heating device; The bottom shell assembly (101) further includes a second heat sink (1013), the second heat sink (1013) includes a second plate (10131) and a second boss (10132), the second plate (10131) is located outside the bottom shell (1011), the second boss (10132) passes through the second opening (10112) and is thermally connected to the heat-generating device.

18. The optical network device according to claim 17, characterized in that, There is a gap (10120) between the first plate (10121) and the bottom shell (1011), the second plate (10131) is attached to the bottom shell (1011), and the thickness of the second plate (10131) is greater than the thickness of the first plate (10121).

19. The optical network device according to claim 14 or 15, characterized in that, The photoelectric converter (4) includes a bidirectional optical component (BOSA), which is disposed on the first circuit board (21) in an on-board manner, and the BOSA is thermally connected to the first boss (10122).

20. The optical network device according to any one of claims 2-4, characterized in that, The main chip (5) is thermally connected to the panel (102).

21. The optical network device according to claim 20, characterized in that, The fourth circuit board (24) includes a third opening (241), which is disposed opposite to the main chip (5); The panel (102) includes a third protrusion (1021) which is thermally connected to the main chip (5). The third opening (241) is used to avoid the thermal pad between the third protrusion (1021) and the main chip (5).

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