Laminated film capacitor module structure

Abstract

The utility model discloses a laminated film capacitor module structure, and specifically relates to the film capacitor technology field, the laminated film capacitor module structure comprises a packaging layer, a housing assembly, a heat radiation layer and an electrode layer, the housing assembly is arranged below the packaging layer, the heat radiation layer is arranged in the packaging layer, the electrode layer is arranged below the heat radiation layer, and the electrode layer is arranged below the heat radiation layer. The device has the advantage of large capacitance, can store more electric energy, can provide stable electric energy output when a power supply fluctuates, ensures stable operation of a system, can adapt to more application scenes, can ensure the performance and stability of the system, and can be stable in a high-frequency circuit. The device has a wider application value in the field of electronic science and technology, also has the advantage of excellent heat dissipation performance, and can ensure the stable operation of the capacitor, thereby avoiding the performance reduction and fault of the capacitor caused by high temperature, and also prolonging the service life of the device.

Description

Technical Field

[0001] This utility model relates to the field of thin film capacitor technology, and more specifically, to a stacked thin film capacitor module structure. Background Technology

[0002] Film capacitors, also known as plastic film capacitors, are a type of capacitor that uses plastic film as the dielectric. They have advantages such as non-polarity, high insulation resistance, excellent frequency characteristics, and low dielectric loss, and are therefore widely used in applications such as crosslinking of analog signals and bypassing power supply noise.

[0003] A search revealed that publication number CN202796452U discloses a thin-film capacitor, including a capacitor body comprising a rolled film composed of multiple electrodes. This effectively prevents the significant reduction in capacitance that occurs when the foil of a thin-film capacitor is punctured. During the development of this invention, the inventors discovered the following problems with the existing technology:

[0004] The capacitors described above have very small capacitance, which limits circuit performance. They also have insufficient energy storage capacity, affecting the stability and reliability of subsequent circuits. Furthermore, the insufficient energy storage capacity affects the performance of the entire system. In addition, the capacitors have poor heat dissipation, which leads to increased temperature during use, accelerates aging, and shortens their service life.

[0005] Therefore, a stacked thin-film capacitor module structure is proposed to address the above problems. Summary of the Invention

[0006] In order to overcome the above-mentioned defects of the prior art, the present invention provides a stacked thin film capacitor module structure to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a stacked thin-film capacitor module structure, comprising an encapsulation layer, a housing assembly, a heat dissipation layer, and an electrode layer, wherein the housing assembly is disposed below the encapsulation layer, and a heat dissipation layer is disposed inside the encapsulation layer, and an electrode layer is disposed below the heat dissipation layer.

[0008] Preferably, the encapsulation layer includes a ceramic substrate and a chip layer, a graphene composite heat dissipation layer, a polymer encapsulation outer layer, and a dielectric layer. The graphene composite heat dissipation layer is disposed on the outer side of the ceramic substrate and the chip layer, the polymer encapsulation outer layer is disposed on the outer side of the graphene composite heat dissipation layer, and the dielectric layer is disposed on the inner side of the ceramic substrate and the chip layer.

[0009] Preferably, the housing assembly includes a first lead and a second lead, and the second lead is disposed on one side of the first lead, and the first lead and the second lead are symmetrical to each other along the center line of the encapsulation layer.

[0010] Preferably, the heat dissipation layer includes a thermally conductive main layer, an interface optimization layer, and a microstructure layer, and the interface optimization layer is disposed on the outer side of the thermally conductive main layer, and the microstructure layer is disposed on the outer side of the interface optimization layer.

[0011] Preferably, the electrode layer includes a conductive core layer, an interface bonding layer, and a surface protective layer, and the interface bonding layer is disposed on the outside of the conductive core layer, and the surface protective layer is disposed on the outside of the interface bonding layer.

[0012] Preferably, the electrode layer is provided in several groups, and the several groups of electrode layers are staggered along the center line of the encapsulation layer; the heat dissipation layer is provided in two groups, and the two groups of heat dissipation layers are symmetrically distributed along the several groups of electrode layers.

[0013] The technical effects and advantages of this utility model are as follows:

[0014] 1. Compared with existing technologies, this stacked thin-film capacitor module structure has the advantage of large capacitance, which can store more electrical energy. It can provide stable power output when the power supply fluctuates, ensuring the stable operation of the system. It can also adapt to more application scenarios, ensure the performance and stability of the system, and perform stably in high-frequency circuits, making the device have a wider range of application value in the field of electronic technology.

[0015] 2. Compared with the existing technology, this stacked film capacitor module structure has the advantage of excellent heat dissipation performance, which can ensure the stable operation of the capacitor, thereby avoiding the performance degradation and failure of the capacitor caused by high temperature. It can also extend the service life of the equipment, slow down the material aging process, improve the overall system reliability, and reduce system downtime or failure time caused by capacitor failure. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the overall three-dimensional structure of this utility model.

[0017] Figure 2 This is a schematic diagram of the structure of the housing assembly of this utility model.

[0018] Figure 3 This is a schematic diagram of the encapsulation layer of this utility model.

[0019] Figure 4 This is a schematic diagram of the heat dissipation layer of this utility model.

[0020] Figure 5 This is a schematic diagram of the electrode layer structure of this utility model.

[0021] The attached figures are labeled as follows: 1. Encapsulation layer; 11. Ceramic substrate and chip layer; 12. Graphene composite heat dissipation layer; 13. Polymer plastic encapsulation outer layer; 14. Dielectric layer; 2. Housing assembly; 21. First lead; 22. Second lead; 3. Heat dissipation layer; 31. Thermally conductive main layer; 32. Interface optimization layer; 33. Microstructure layer; 4. Electrode layer; 41. Conductive core layer; 42. Interface bonding layer; 43. Surface protective layer. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model. Example 1

[0023] As attached Figures 1 to 5 The stacked thin-film capacitor module structure shown includes an encapsulation layer 1, a housing assembly 2, a heat dissipation layer 3, and an electrode layer 4. The characteristic is that the housing assembly 2 is disposed below the encapsulation layer 1, and the heat dissipation layer 3 is disposed inside the encapsulation layer 1, and the electrode layer 4 is disposed below the heat dissipation layer 3.

[0024] Among them: the encapsulation layer 1 is composed of advanced materials, which can improve the heat dissipation, mechanical performance and good sealing of internal materials of the device. The heat dissipation layer 3 can further help the internal components dissipate heat, and further improve the heat dissipation performance of the device. The electrode layer 4 is also made of advanced materials, which has excellent properties such as improved mechanical performance, improved heat dissipation performance and improved corrosion resistance. Furthermore, the multi-level electrode layer 4 stacked design can further improve the capacitance of the device. Example 2

[0025] Based on Example 1, the solution in Example 1 will be further described in detail below with reference to the specific working method, such as... Figures 1 to 5 As shown below, see details:

[0026] In a preferred embodiment, the encapsulation layer 1 includes a ceramic substrate and chip layer 11, a graphene composite heat dissipation layer 12, a polymer encapsulation outer layer 13, and a dielectric layer 14. The graphene composite heat dissipation layer 12 is disposed on the outer side of the ceramic substrate and chip layer 11, and the polymer encapsulation outer layer 13 is disposed on the outer side of the graphene composite heat dissipation layer 12. The dielectric layer 14 is disposed on the inner side of the ceramic substrate and chip layer 11. The main materials of the ceramic substrate and chip layer 11 are alumina, aluminum nitride, etc., which have excellent thermal, electrical, and mechanical properties. The main material of the graphene composite heat dissipation layer 12 is a composite of graphene with metals, ceramics, polymers, etc., which has high thermal conductivity, good adhesion, and oxidation resistance. The polymer encapsulation outer layer 13 has moisture-proof, heat-resistant, and corrosion-resistant properties, as well as mechanical damage resistance and good sealing performance, which is very suitable for the encapsulation layer 1 of this device.

[0027] In a preferred embodiment, the housing assembly 2 includes a first lead 21 and a second lead 22, and the second lead 22 is provided on one side of the first lead 21. The first lead 21 and the second lead 22 are symmetrical to each other along the center line of the encapsulation layer 1.

[0028] In a preferred embodiment, the heat dissipation layer 3 includes a thermally conductive main layer 31, an interface optimization layer 32, and a microstructure layer 33. The interface optimization layer 32 is disposed on the outer side of the thermally conductive main layer 31, and the microstructure layer 33 is disposed on the outer side of the interface optimization layer 32. The thermally conductive main layer 31 is made of a high thermal conductivity substrate, the interface optimization layer 32 is made of nano-silver paste material, and the microstructure layer 33 is designed with a roughened surface to improve the adhesion to the encapsulation layer 1.

[0029] In a preferred embodiment, the electrode layer 4 includes a conductive core layer 41, an interface bonding layer 42, and a surface protective layer 43, wherein the interface bonding layer 42 is disposed on the outside of the conductive core layer 41, and the surface protective layer 43 is disposed on the outside of the interface bonding layer 42.

[0030] In a preferred embodiment, the electrode layer 4 is provided in several groups, and the several groups of electrode layers 4 are staggered along the center line of the encapsulation layer 1. The heat dissipation layer 3 is provided in two groups, and the two groups of heat dissipation layers 3 are symmetrically distributed along the several groups of electrode layers 4. The conductive core layer 41 in the electrode layer 4 is made of gradient copper-nickel alloy foil, which has excellent properties such as improved mechanical properties, enhanced corrosion resistance, and excellent thermal stability and thermal shock resistance. The interface bonding layer material 42 is nano silver paste and indium tin oxide, which has good conductivity. The surface protective layer 43 is made of titanium nitride material, which has high hardness and wear resistance, corrosion resistance and high temperature oxidation resistance.

[0031] The working process of this utility model is as follows: The main materials of the ceramic substrate and chip layer 11 are alumina, aluminum nitride, etc., which have excellent thermal, electrical and mechanical properties. The main material of the graphene composite heat dissipation layer 12 is a composite of graphene with metals, ceramics, polymers and other materials, which has high thermal conductivity, good adhesion and oxidation resistance. The polymer plastic encapsulation outer layer 13 has moisture-proof, heat-resistant and corrosion-resistant properties, as well as mechanical damage resistance and good sealing performance, which is very suitable for the encapsulation layer 1 of the device. The thermally conductive main layer 31 uses a high thermal conductivity substrate, the interface optimization layer 32 uses nano-silver paste material, and the microstructure layer... The surface of electrode 43 is roughened to improve adhesion to the encapsulation layer 1. The conductive core layer 41 in electrode layer 4 is made of gradient copper-nickel alloy foil, which has excellent mechanical properties, enhanced corrosion resistance, and excellent thermal stability and thermal shock resistance. The interface bonding layer material 42 is nano-silver paste and indium tin oxide, which has good conductivity. The surface protective layer 43 is made of titanium nitride, which has high hardness, wear resistance, corrosion resistance and high temperature oxidation resistance. Furthermore, the multilayer electrode layer 4 stacked design can also improve the capacitance of the device. The above is the working principle of this stacked thin film capacitor module structure.

Claims

1. A stacked thin-film capacitor module structure, comprising an encapsulation layer (1), a housing assembly (2), a heat dissipation layer (3), and an electrode layer (4), characterized in that: A housing assembly (2) is disposed below the encapsulation layer (1), and a heat dissipation layer (3) is disposed inside the encapsulation layer (1), and an electrode layer (4) is disposed below the heat dissipation layer (3).

2. The stacked thin-film capacitor module structure according to claim 1, characterized in that: The encapsulation layer (1) includes a ceramic substrate and chip layer (11), a graphene composite heat dissipation layer (12), a polymer plastic encapsulation outer layer (13), and a dielectric layer (14). The graphene composite heat dissipation layer (12) is disposed on the outside of the ceramic substrate and chip layer (11), the polymer plastic encapsulation outer layer (13) is disposed on the outside of the graphene composite heat dissipation layer (12), and the dielectric layer (14) is disposed on the inside of the ceramic substrate and chip layer (11).

3. The stacked thin-film capacitor module structure according to claim 1, characterized in that: The housing assembly (2) includes a first lead (21) and a second lead (22), and the second lead (22) is provided on one side of the first lead (21). The first lead (21) and the second lead (22) are symmetrical to each other along the center line of the encapsulation layer (1).

4. The stacked thin-film capacitor module structure according to claim 1, characterized in that: The heat dissipation layer (3) includes a thermally conductive main layer (31), an interface optimization layer (32) and a microstructure layer (33), and the interface optimization layer (32) is provided on the outside of the thermally conductive main layer (31), and the microstructure layer (33) is provided on the outside of the interface optimization layer (32).

5. The stacked thin-film capacitor module structure according to claim 1, characterized in that: The electrode layer (4) includes a conductive core layer (41), an interface bonding layer (42) and a surface protective layer (43), and the interface bonding layer (42) is provided on the outside of the conductive core layer (41), and the surface protective layer (43) is provided on the outside of the interface bonding layer (42).

6. The stacked thin-film capacitor module structure according to claim 1, characterized in that: The electrode layer (4) is provided in several groups, and the several groups of electrode layers (4) are staggered along the center line of the encapsulation layer (1). The heat dissipation layer (3) is provided in two groups, and the two groups of heat dissipation layers (3) are symmetrically distributed along the several groups of electrode layers (4).

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