Isolator chip packaging heat dissipation structure
By setting a spiral heat dissipation channel and an electromagnetic shielding layer on a ceramic substrate, combined with an alternating stacking design of a metal thermally conductive layer and an insulating buffer layer, the problems of limited heat dissipation area and insufficient electromagnetic shielding in isolator chip packaging are solved, achieving efficient heat dissipation and signal anti-interference, and improving the stability and reliability of the chip.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-29
- Publication Date
- 2026-03-27
AI Technical Summary
In the existing technology, the isolator chip packaging structure relies on a single vertical heat dissipation path, which has a limited heat dissipation area and does not integrate electromagnetic shielding function. This leads to high-frequency signal crosstalk and local high temperature of the chip causing signal distortion, performance degradation, and poor packaging reliability.
A heat dissipation component with a spiral heat dissipation channel and an electromagnetic shielding layer on a ceramic substrate, combined with an alternating stack of a metal thermal conductive layer and an insulating buffer layer, is used to enhance the heat dissipation area and electromagnetic shielding effect. Graphene is used to fill the spiral channel to accelerate heat dissipation, and heat dissipation fins are combined to improve heat dissipation efficiency.
While achieving high-frequency signal anti-interference, it also expands the heat dissipation area, improves the heat dissipation efficiency and stability of the isolator chip, reduces the risk of package interface failure, and extends service life.
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Figure CN224054779U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to integrated circuit packaging technical field, concretely relates to an isolator chip package heat radiation structure. BACKGROUND
[0002] As the core component of high-frequency communication, radar system and high-power electronic equipment, the isolator chip is prone to heat rapidly due to the increase of working frequency and power density, and high-frequency signals are easily interfered by electromagnetic interference. The traditional packaging structure directly packages the chip with an organic substrate or a silicon substrate, which can meet the basic heat dissipation requirement, but it is difficult to balance high-frequency electromagnetic shielding and efficient heat dissipation. Especially in the scene of 5G communication and millimeter wave radar, local high temperature of the chip easily causes signal distortion, performance degradation, and even packaging failure due to thermal stress, which seriously restricts the reliability and service life of the equipment.
[0003] For example, the patent number CN209434172U discloses a chip package heat radiation structure, which comprises a PCB and a chip. The PCB is provided with a through heat dissipation hole, and the chip is packaged and fixed on the PCB across the heat dissipation hole. The back surface of the PCB is tightly fixed with a heat dissipation metal sheet corresponding to the position of the chip. The heat dissipation hole is filled with heat-conducting glue. The protruding part of the heat dissipation metal sheet corresponding to the heat dissipation hole is provided with a plurality of heat-conducting strips made of metal. The length of the heat-conducting strip is less than the length of the heat dissipation hole. The patent dissipates heat by opening a heat dissipation hole in the PCB substrate and filling it with heat-conducting glue, but it relies on a single vertical heat dissipation path, the heat dissipation area is limited, and it does not integrate electromagnetic shielding function, which leads to high-frequency signal crosstalk. In view of this, an isolator chip package heat radiation structure is designed. UTILITY MODEL CONTENTS
[0004] To solve the above technical problems, the utility model provides an isolator chip package heat radiation structure, which aims to solve the technical problems in the prior art that heat is dissipated by opening a heat dissipation hole in the PCB substrate and filling it with heat-conducting glue, but it relies on a single vertical heat dissipation path, the heat dissipation area is limited, and it does not integrate electromagnetic shielding function, which leads to high-frequency signal crosstalk.
[0005] The technical scheme of the utility model is as follows: an isolator chip package heat radiation structure, which comprises a ceramic substrate, an isolator chip and a heat dissipation assembly. The front surface of the ceramic substrate is provided with an isolation groove and a heat dissipation channel. The isolation groove is embedded with an electromagnetic shielding layer. The heat dissipation channel penetrates through the ceramic substrate and is distributed in a spiral shape.
[0006] The isolator chip is packaged in the isolation groove, and the isolator chip is electrically connected with the ceramic substrate.
[0007] The heat dissipation assembly comprises alternately stacked metal heat-conducting layers and insulating buffer layers. The heat dissipation assembly is fixed to the back surface of the ceramic substrate and communicates with the heat dissipation channel.
[0008] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: still include the fin, the fin is fixed on the back of the heat dissipation assembly.
[0009] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: the fin is away from the side of heat dissipation assembly and is equipped with heat dissipation fin.
[0010] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: the electromagnetic shielding layer is the composite structure of ferrite material and copper net, and is closely combined with isolator chip.
[0011] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: the heat dissipation channel is filled with graphene.
[0012] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: the metal heat conduction layer is made of copper-diamond composite material.
[0013] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: the insulating buffer layer is aluminum nitride ceramic film.
[0014] As a preferred scheme of the isolator chip packaging heat dissipation structure of the utility model, wherein: the heat dissipation assembly is equipped with honeycomb-shaped through-hole structure.
[0015] One or more technical solutions provided in the embodiment of the application have at least the following technical effects or advantages:
[0016] 1, the utility model discloses a ceramic substrate is provided with electromagnetic shielding layer and spiral heat dissipation channel, realizes high frequency signal anti-interference simultaneously, expands the heat dissipation area, improves the heat dissipation efficiency of isolator chip, guarantees the stability and reliability of isolator chip under high temperature high power environment.
[0017] 2, the utility model discloses the heat dissipation assembly of metal heat conduction layer and insulating buffer layer alternately stacked, combines honeycomb-shaped through-hole structure design, optimizes the heat conduction path and relieves thermal expansion stress, effectively reduces the occurrence of packaging interface failure, improves the service life of isolator chip. DETAILED DESCRIPTION
[0018] In order to more clearly illustrate the technical scheme in the embodiment of the application, the drawings needed to be used in the embodiment description will be simply introduced below, and obviously, the drawings in the following description are some embodiments of the application, and those skilled in the art can also obtain other drawings according to these drawings without creating creative labor.
[0019] Figure 1 This is a schematic diagram of the structure of Embodiment 1 of the present utility model;
[0020] Figure 2 This is a schematic diagram of the structure of Embodiment 2 of this utility model;
[0021] Figure 3 In this utility model Figure 2 A magnified schematic diagram of the structure at point A.
[0022] In the attached image:
[0023] 100, Ceramic substrate; 200, Isolation groove; 300, Heat dissipation channel; 400, Electromagnetic shielding layer; 500, Isolator chip; 600, Heat dissipation component; 610, Metal thermally conductive layer; 620, Insulating buffer layer; 700, Heat sink. Detailed Implementation
[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0025] It should be noted that all directional indications in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a specific posture. If the specific posture changes, the directional indications will also change accordingly.
[0026] Example 1, as Figure 1 As shown, a heat dissipation structure for an isolator chip package includes a ceramic substrate 100, an isolator chip 500, and a heat dissipation component 600. The ceramic substrate 100 is made of aluminum nitride ceramic material. An isolation trench 200 with a depth of 0.5–1.2 mm is processed on the front side of the ceramic substrate 100 by laser etching. An electromagnetic shielding layer 400 of ferrite-copper mesh composite is deposited in the isolation trench 200 by magnetron sputtering. The electromagnetic shielding layer 400 has a thickness of 50–150 μm and forms a chemical bond with the inner wall of the isolation trench 200. A heat dissipation channel 300 penetrates the ceramic substrate 100 and is distributed in a spiral shape with a spiral spacing of 0.3–0.8 mm. It is integrally formed with the ceramic substrate 100 by ceramic sintering.
[0027] The spiral-shaped heat dissipation channel 300 improves the heat dissipation efficiency by prolonging the heat conduction path and increasing the surface area; the high thermal conductivity of the aluminum nitride ceramic substrate 100 can quickly conduct the heat generated by the isolator chip 500. The electromagnetic shielding layer 400 has a double shielding effect of absorbing high-frequency electromagnetic waves by ferrite and reflecting interference signals by copper mesh, effectively suppressing signal crosstalk.
[0028] The isolator chip 500 is packaged in the isolation groove 200, and the isolator chip 500 is electrically connected to the copper wiring layer on the surface of the ceramic substrate 100 through a gold wire bonding process. The bonding points are packaged in the isolation groove 200 using flip-chip technology, and the back of the isolator chip 500 is fixed to the isolation groove 200 through silver adhesive. The gap between the side wall of the isolation groove 200 and the isolator chip 500 is filled with epoxy resin sealant with a thickness of 20-50 μm. The design of gold wire bonding and flip-chip technology shortens the signal transmission path, reduces parasitic inductance, and improves high-frequency signal integrity; silver adhesive provides a high-thermal-conductivity interface to ensure efficient heat transfer from the isolator chip 500 to the ceramic substrate 100. The epoxy resin sealant has insulation and mechanical cushioning functions, preventing displacement of the isolator chip 500 due to vibration or thermal deformation.
[0029] The heat dissipation assembly 600 includes alternating stacked metal heat-conductive layers 610 and insulating buffer layers 620. The metal heat-conductive layers 610 are made of copper-diamond composite material with a diamond mass fraction of 10%-30% and a particle size of 5-20 μm. The single-layer thickness is 0.1-0.3 mm, and the copper-diamond composite layer has a thermal conductivity of ≥400 W / m·K, which is 1.5 times that of pure copper or more, improving the longitudinal heat conduction efficiency.
[0030] The insulating buffer layer 620 is an aluminum nitride ceramic film deposited on the surface of the metal heat-conductive layer 610 by plasma spraying process with a thickness of 20-50 μm. The insulating buffer layer 620 can not only insulate but also conduct heat, and at the same time, it can alleviate the difference in thermal expansion coefficient between the metal heat-conductive layer 610 and the ceramic substrate 100, preventing interface cracking.
[0031] The heat dissipation assembly 600 is fixed to the back of the ceramic substrate 100 by brazing process, and the brazing material is Ag-Cu-Ti alloy.
[0032] The heat dissipation assembly 600 is provided with a honeycomb-shaped through-hole structure, and the pore size of the honeycomb-shaped through-hole is 1-3 mm. The pore wall is plated with a nickel layer, which can enhance the structural strength and prevent deformation of the through-hole under thermal cycling.
[0033] The heat dissipation channel 300 is filled with graphene, which is filled in the heat dissipation channel 300 in a vertical array form, and can quickly conduct the heat of the isolator chip 500 along the heat dissipation channel 300. The surface of the graphene is coated with silicone grease to form a continuous heat-conducting interface, which can eliminate contact thermal resistance and improve the overall heat conduction efficiency of the channel.
[0034] In the embodiment, the electromagnetic shielding layer 400 and the spiral-shaped heat dissipation channel 300 are arranged on the ceramic substrate 100, high-frequency signal anti-interference is realized, the heat dissipation area is expanded, the heat dissipation efficiency of the isolator chip 500 is improved, and the stability and reliability of the isolator chip 500 in a high-temperature and high-power environment are ensured.
[0035] Embodiment two: as shown in Figure 2 and Figure 3 The embodiment is based on the embodiment one, and different from the embodiment one, the isolator chip packaging heat dissipation structure further comprises a heat dissipation fin 700, the heat dissipation fin 700 is fixed to the back of the heat dissipation assembly 600, the heat dissipation fin 700 is extruded from 6063 aluminum alloy, and the thickness of the heat dissipation fin 700 is 2-5 mm.
[0036] The side, away from the heat dissipation assembly 600, of the heat dissipation fin 700 is provided with a heat dissipation fin, the root of the heat dissipation fin is provided with a flow guide groove with a width of 0.5-1 mm, the flow guide groove guides airflow to be uniformly distributed along the fin surface, local hot spots are avoided, and the heat dissipation effect is further improved.
[0037] It should be noted that the terms "comprising", "containing" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or device.
[0038] Although the embodiments of the utility model have been shown and described, it can be understood by those skilled in the art that various changes, modifications, replacements and variations can be made to the embodiments without departing from the principles and spirits of the utility model, and the scope of the utility model is defined by the appended claims and their equivalents.
Claims
1. An isolator chip package heat dissipation structure, Comprising, characterized in that, Comprising: A ceramic substrate (100) with an isolation groove (200) and a heat dissipation channel (300) on the front side, the isolation groove (200) embedded with an electromagnetic shielding layer (400), the heat dissipation channel (300) penetrating through the ceramic substrate (100) and distributed in a spiral shape; An isolator chip (500) encapsulated in the isolation groove (200) and electrically connected with the ceramic substrate (100); A heat dissipation assembly (600) including alternately stacked metal heat-conductive layers (610) and insulating buffer layers (620), fixed to the back side of the ceramic substrate (100) and in communication with the heat dissipation channel (300).
2. The isolator chip package heat dissipation structure of claim 1, wherein, Further comprising a heat sink (700) fixed to the back side of the heat dissipation assembly (600).
3. The isolator chip package heat dissipation structure of claim 2, wherein, The heat sink (700) is provided with heat dissipation fins on the side away from the heat dissipation assembly (600).
4. The isolator chip package heat dissipation structure of claim 1, wherein, The electromagnetic shielding layer (400) is a composite structure of ferrite material and copper mesh, and closely adheres to the isolator chip (500).
5. The isolator chip package heat dissipation structure of claim 1, wherein, The heat dissipation channel (300) is filled with graphene.
6. The isolator chip package heat dissipation structure of claim 1, wherein, The metal heat-conductive layer (610) is made of copper-diamond composite material.
7. The isolator chip package heat dissipation structure of claim 1, wherein, The insulating buffer layer (620) is an aluminum nitride ceramic film.
8. The isolator chip package heat dissipation structure of claim 1, wherein, The heat dissipation assembly (600) is provided with a honeycomb-shaped through-hole structure.
Citation Information
Patent Citations
Chip packaging heat dissipation structure
CN209434172U