Bottom plate structure for semiconductor packaging device and semiconductor packaging device

Abstract

A bottom plate structure for a semiconductor package device and the semiconductor package device, the bottom plate structure comprising: a bottom plate body, the first surface of which is provided with at least one welding area for welding a package substrate; the retaining wall structure is located on the first surface and arranged along the peripheral edge of the welding area. According to the invention, the retaining wall structure is arranged on the bottom plate body along the peripheral edge of the welding area, and the packaging substrate can be limited through the retaining wall structure, so that the position deviation of the packaging substrate during the flowing of the welding flux is avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, in particular to a bottom plate structure for a semiconductor packaging device and a semiconductor packaging device. BACKGROUND

[0002] The semiconductor packaging is a technology and process of placing, fixing and sealing the semiconductor chip obtained through the wafer manufacturing process, so as to isolate the chip from the external environment and provide the connection between the chip and the external circuit.

[0003] In the soldering packaging process, the packaging substrate is usually connected to the bottom plate by soldering. The heat generated during the operation of the chip is mainly transmitted to the outer surface of the bottom plate by heat conduction, and is finally dissipated to the surrounding medium by heat convection and heat radiation.

[0004] In the related art, the packaging substrate is soldered by using a bottom plate without solder resist ink or a bottom plate with solder resist ink. However, the solder flow can easily cause the position deviation of the packaging substrate on the bottom plate. SUMMARY

[0005] A series of simplified concepts are introduced in the summary part of the application, which will be further described in detail in the detailed description part. The summary part of the application does not mean to try to limit the key features and necessary technical features of the claimed technical solution, and even less to determine the protection scope of the claimed technical solution.

[0006] In view of the existing problems, the present application provides a bottom plate structure for a semiconductor packaging device, comprising:

[0007] A bottom plate body, wherein a first surface of the bottom plate body has at least one soldering area for soldering a packaging substrate;

[0008] A barrier wall structure is arranged on the first surface and along the outer peripheral edge of the soldering area.

[0009] In some embodiments of the present application, the barrier wall structure is a plurality of spaced protrusions extending along the outer peripheral edge of the soldering area.

[0010] Alternatively, the barrier wall structure is a continuous protrusion arranged along the outer peripheral edge of the soldering area.

[0011] In some embodiments of the present application, one or more barrier wall structures are arranged on the first surface, and each barrier wall structure is arranged around one soldering area.

[0012] In some embodiments of the present application, at least two barrier wall structures in the plurality of barrier wall structures are arranged at intervals.

[0013] Alternatively, at least two of the plurality of barrier wall structures have a common portion.

[0014] In some embodiments of the present application, the height of the barrier wall structure is greater than the height of the solder in the soldering area.

[0015] In some embodiments of the present application, the base body is integrally formed with the barrier wall structure.

[0016] In some embodiments of the present application, further comprising a mounting hole located at the edge region of the base body.

[0017] In some embodiments of the present application, the packaging substrate comprises a DBC substrate.

[0018] According to another aspect of the present application, a semiconductor packaging device is provided, which comprises the base plate structure according to any one of the above.

[0019] In some embodiments of the present application, further comprising a plastic encapsulation layer at least on the first surface of the base plate structure.

[0020] According to the base plate structure for semiconductor packaging device and the semiconductor packaging device of the embodiments of the present application, by arranging the barrier wall structure along the outer peripheral edge of the soldering area on the base body, the packaging substrate can be limited by the barrier wall structure, so as to avoid the position deviation of the packaging substrate when the solder flows. BRIEF DESCRIPTION OF DRAWINGS

[0021] The following drawings of the present application are hereby incorporated as a part of the present application for understanding the present application. The drawings of the embodiments of the present application and the description thereof are used to explain the principles of the present application.

[0022] Figure 1 A structural schematic diagram of the base plate structure for semiconductor packaging device of one embodiment of the present application is shown.

[0023] Figure 2 A side view of the base plate structure for semiconductor packaging device of one embodiment of the present application is shown.

[0024] In the drawings:

[0025] 110 base body;

[0026] 111 soldering area;

[0027] 120 barrier wall structure;

[0028] 130 mounting hole. DETAILED DESCRIPTION

[0029] In the following description, numerous specific details are set forth to provide a more thorough understanding of the present application. However, it will be apparent to one skilled in the art that the present application can be practiced without one or more of these specific details. In other instances, well-known

[0030] It should be understood that the present application can be carried out in many different forms without departing from the spirit or essential characteristics of the application. To that end, specifics shown in the figures are to be considered in all aspects as illustrative and not restrictive. In the drawings, the size and relative sizes of layers and regions can be exaggerated for clarity. Like reference numerals designate like elements throughout.

[0031] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will also be understood that, when a term is used in the singular, it can be intended to mean the singular or plural, unless the context clearly dictates otherwise.

[0032] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0033] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0034] In related technologies, the packaging substrate is soldered using a substrate without solder resist ink or a substrate with solder resist ink. However, this technical solution has at least the following problems:

[0035] 1. When the solder flows, it can easily cause the packaging substrate on the base plate to shift position, or even cause adjacent packaging substrates on the base plate to come into contact.

[0036] 2. Due to the positional shift of the packaging substrate, the reflow soldering fixture needs to be redesigned and manufactured, resulting in significant costs.

[0037] 3. When using a base plate without solder resist ink to weld the packaging substrate, it is easy to install the packaging substrate backwards because it is difficult to distinguish the front and back of the base plate, resulting in product scrap.

[0038] 4. For plastic-encapsulated products, when using a base plate with solder resist ink for encapsulation, the product is prone to delamination risk;

[0039] 5. The range of suppliers capable of producing solder resist ink is limited.

[0040] To address at least one of the aforementioned technical problems, this application provides a base plate structure for a semiconductor packaging device, comprising: a base plate body having at least one welding area for welding a packaging substrate on a first surface of the base plate body; and a barrier structure located on the first surface and disposed along the outer peripheral edge of the welding area.

[0041] According to the substrate structure for semiconductor packaging devices of this application, a baffle structure is provided on the substrate body along the outer periphery of the welding area. The baffle structure can limit the position of the packaging substrate and prevent the packaging substrate from shifting when the solder flows.

[0042] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0043] The following is for reference.Figures 1-2 A bottom plate structure for a semiconductor package device according to an embodiment of the present application is described. The bottom plate structure for a semiconductor package device includes a bottom plate body 110 having at least one solder area 111 for soldering a package substrate on a first surface of the bottom plate body 110; and a barrier wall structure 120 disposed on the first surface and along an outer peripheral edge of the solder area 111.

[0044] Specifically, in a package operation process, solder can be disposed within the solder area 111 on the first surface of the bottom plate body 110, and then the package substrate can be placed within the solder area 111, and the package substrate is soldered on the bottom plate structure by melting the solder.

[0045] It is worth noting that, in the soldering process, since the barrier wall structure 120 is disposed along the outer peripheral edge of the solder area 111, the package substrate can be limited, avoiding the position deviation of the package substrate when the solder flows, and further avoiding the adjacent package substrates on the bottom plate from leaning on each other.

[0046] Moreover, the bottom plate structure according to the embodiment can simplify the reflow soldering fixture, increase the adaptability of the reflow soldering fixture, and facilitate the production line management.

[0047] Secondly, by disposing the barrier wall structure 120 on the first surface of the bottom plate body 110, the front and back of the bottom plate structure can be more easily distinguished, thereby avoiding the package substrate being installed reversely and improving the product yield.

[0048] Furthermore, when the bottom plate structure according to the embodiment is used for the package operation of plastic package products, since the use of solder resist ink is avoided, the delamination risk of the plastic package products caused by the solder resist ink can be reduced, and the yield of the plastic package products can be improved.

[0049] In addition, compared with limited suppliers capable of producing solder resist ink, the bottom plate structure according to the embodiment is easier to produce and has a wider range of supplier sources.

[0050] In some embodiments, the semiconductor package device can include a power semiconductor package device (such as an IGBT (Insulated Gate Bipolar Transistor) module, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) module, etc.), a digital semiconductor package device (such as a logic gate module, a counter module, etc.), or any other suitable semiconductor package device, without limitation.

[0051] In some embodiments, the bottom plate structure can be a metal material, which includes copper, aluminum, or any other suitable metal and its alloy.

[0052] In some embodiments, the packaging substrate can include a Direct Bonded Copper (DBC) substrate, a Direct Plating Copper (DPC) substrate, an Active Metal Brazing (AMB) substrate, a Laser Activation Metallization (LAM) substrate, or any other suitable type of substrate, without limitation.

[0053] In some embodiments, the dam structure 120 can be a plurality of spaced-apart protrusions extending along the outer peripheral edge of the soldering area 111, or the dam structure 120 can be a continuous protrusion arranged along the outer peripheral edge of the soldering area 111.

[0054] Exemplarily, as shown in FIG. 1, the dam structure 120 can be a plurality of spaced-apart protrusions extending along the outer peripheral edge of the soldering area 111 (other shapes of protrusions are not excluded), and the plurality of spaced-apart protrusions are arranged around the outer peripheral edge of the soldering area 111, so as to limit the packaging substrate in the soldering area 111 and avoid the packaging substrate from being displaced when the solder flows. Figure 1

[0055] Alternatively, the dam structure 120 can be a continuous protrusion arranged along the outer peripheral edge of the soldering area 111, and the continuous protrusion is arranged around the outer peripheral edge of the soldering area 111, so as to limit the packaging substrate in the soldering area 111 and avoid the packaging substrate from being displaced when the solder flows.

[0056] In some embodiments, the first surface is provided with one or more dam structures 120, and each dam structure 120 is arranged around a soldering area 111.

[0057] Specifically, the number of the dam structures 120 provided on the first surface can be consistent with the number of the soldering areas 111 on the first surface, and each dam structure 120 is arranged around a soldering area 111, so as to limit the packaging substrate in each soldering area 111 and avoid the packaging substrate from being displaced when the solder flows, and meanwhile, when there are a plurality of soldering areas 111 on the first surface, the packaging substrates in the adjacent soldering areas 111 can be prevented from being close to each other.

[0058] In some embodiments, at least two dam structures 120 among the plurality of dam structures 120 are spaced apart; or at least two dam structures 120 among the plurality of dam structures 120 have a common part.

[0059] Exemplarily, as shown in FIG. 1, the dam structure 120 can be a plurality of spaced-apart protrusions extending along the outer peripheral edge of the soldering area 111 (other shapes of protrusions are not excluded), and the plurality of spaced-apart protrusions are arranged around the outer peripheral edge of the soldering area 111, so as to limit the packaging substrate in the soldering area 111 and avoid the packaging substrate from being displaced when the solder flows. Figure 1 ​As shown, four retaining wall structures 120 may be provided on the left side of the first surface. There is a common part between two adjacent retaining wall structures 120 among the four retaining wall structures 120, so that the four retaining wall structures 120 form a "field" - shaped structure. Additionally, a rectangular retaining wall structure 120 may be provided on the right side of the first surface, and the rectangular retaining wall structure 120 is spaced apart from any one of the retaining wall structures 120 in the "field" - shaped structure.

[0060] In some embodiments, the shape of the retaining wall structure 120 can be set according to the shape of the welding area 111, so as to meet the welding requirements for different products.

[0061] In some embodiments, the height of the retaining wall structure 120 is greater than the height of the solder within the welding area 111.

[0062] That is, the height of multiple spaced - apart protrusions extending along the outer periphery of the welding area 111 is greater than the height of the solder within the welding area 111, or the height of a continuous protrusion surrounding the outer periphery of the welding area 111 is greater than the height of the solder within the welding area 111.

[0063] By making the height of the retaining wall structure 120 greater than the height of the solder within the welding area 111, when the encapsulation substrate is placed within the welding area 111, the retaining wall structure 120 is higher than the lower surface of the encapsulation substrate. Thus, the retaining wall structure 120 can play a restricting role on the encapsulation substrate, preventing the encapsulation substrate from shifting in position when the solder flows.

[0064] In some embodiments, the base body and the retaining wall structure 120 can be separately formed and then combined together; or, the base body and the retaining wall structure 120 can also be integrally formed.

[0065] Taking the example of the integral formation of the base body and the retaining wall structure 120, it reduces the assembly link between the base body and the retaining wall structure 120, avoids the generation of material residues and waste, can significantly shorten the production cycle, and the product quality is more stable.

[0066] Moreover, the integrally - formed product has no splicing seams, making the stress distribution more uniform, reducing the risk of structural damage caused by stress concentration at the splicing, thereby improving the overall structural strength and safety. Additionally, the integral - forming process can ensure the dimensional accuracy of the product through precise molds or processing equipment.

[0067] In some embodiments, it further includes mounting holes 130 located in the edge area of the bottom plate body 110.

[0068] Exemplarily, such as Figure 1As shown, mounting holes 130 can be arranged at four corner regions of the bottom plate body 110. The mounting holes 130 can be used to mechanically fix the packaged semiconductor packaging device. For example, on a computer mainboard, the mounting holes 130 on the bottom plate body 110 are used to accurately mount the semiconductor packaging device on the mainboard by means of bolts or other fixing devices. This fixing mode can ensure that the semiconductor packaging device maintains a stable position during computer operation, even if affected by factors such as vibration inside the case and airflow disturbance caused by fan operation, so that displacement does not occur, thereby ensuring the stability of the connection with other electronic components on the mainboard.

[0069] According to yet another aspect of the present application, a semiconductor packaging device is provided. The semiconductor packaging device includes a bottom plate structure.

[0070] The bottom plate structure can be implemented as the bottom plate structure for a semiconductor packaging device described above, and reference can be made to the description above, which will not be repeated here.

[0071] In some embodiments, the semiconductor packaging device can include a power semiconductor packaging device (such as an IGBT (Insulated Gate Bipolar Transistor) module, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) module, etc.), a digital semiconductor packaging device (such as a logic gate module, a counter module, etc.), or any other suitable semiconductor packaging device, without limitation.

[0072] In some embodiments, a plastic packaging layer is further included on at least the first surface of the bottom plate structure. When the bottom plate structure of the present embodiment is used for packaging operations, the use of solder resist ink is avoided, thereby reducing the risk of delamination of plastic packaging products caused by the solder resist ink and improving the yield of plastic packaging products.

[0073] In summary, according to the bottom plate structure for a semiconductor packaging device and the semiconductor packaging device of the present application, the stop wall structure is arranged along the outer peripheral edge of the soldering area on the bottom plate body, and the packaging substrate is limited by the stop wall structure to avoid position deviation of the packaging substrate when the solder flows.

[0074] Although example embodiments have been described herein with reference to the accompanying drawings, it is to be understood that the above-described example embodiments are merely exemplary and are not intended to limit the scope of the present application. Those of ordinary skill in the art can make various changes and modifications without departing from the scope and spirit of the present application. All such changes and modifications are intended to be included within the scope of the present application as claimed in the appended claims.

[0075] Similarly, it is to be understood that the embodiments of the present application can be used in the exact opposite way of that described in the examples, and that the present application should not be construed as limited to only one or the other of the embodiments described in the examples. Similarly, it is to be understood that, for the avoidance of doubt, the

[0076] Further, those skilled in the art will appreciate that the features of the various embodiments described herein are not mutually exclusive, but can be combined in different ways depending upon the needs and resources available. Thus, the application is not to be construed as limited to the specific embodiments disclosed in the examples, but rather only by the claims. Furthermore, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word 'comprising' does not exclude the presence of elements or steps other than those listed in a claim. The word 'first','second', 'third', etc. shall not be construed as limiting the number of steps or as indicating that the steps are to be performed in a chronological sequence, unless otherwise specified. The mere fact that measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

[0077] It is to be noted that the foregoing examples have been presented for purposes of illustration and description only and are not intended to limit the scope of the present application as set forth in the appended claims. Persons skilled in the art will appreciate that variations and modifications of the embodiments described herein can be made without departing from the scope of the application. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The use of the word "a" or "an" does not exclude a plurality of elements, but means "one or more".

Claims

1. A backplane structure for a semiconductor package device, characterized by, Comprising: a bottom plate body having at least one solder area for soldering a package substrate on a first surface thereof; a barrier wall structure on the first surface and along an outer peripheral edge of the solder area.

2. The baseplate structure of claim 1, wherein, The barrier wall structure is a plurality of spaced-apart protrusions extending along the outer peripheral edge of the solder area. Alternatively, the barrier wall structure is a continuous protrusion along the outer peripheral edge of the solder area.

3. The baseplate structure of claim 1, wherein, One or more barrier wall structures are provided on the first surface, each of the barrier wall structures being provided around one of the solder areas.

4. The baseplate structure of claim 3, wherein, At least two of the barrier wall structures are spaced apart. Alternatively, at least two of the barrier wall structures have a common portion therebetween.

5. The baseplate structure of claim 1, wherein, The barrier wall structure has a height greater than a height of solder within the solder area.

6. The baseplate structure of claim 1, wherein, The bottom plate body is integrally formed with the barrier wall structure.

7. The baseplate structure of claim 1, wherein, Further comprising a mounting hole in an edge region of the bottom plate body.

8. The baseplate structure of claim 1, wherein, The package substrate comprises a DBC substrate.

9. A semiconductor package device, comprising: The semiconductor package device comprises the bottom plate structure according to any one of claims 1-8.

10. The semiconductor package device of claim 9, wherein, Further comprising a molding layer on at least the first surface of the bottom plate structure.

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